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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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5de773c1
NC		 12005-05-07 Nick Clifton <nickc@redhat.com>
2
3 * po/nl.po: Updated translation.
4
f4321104
NC		 52005-05-07 Nick Clifton <nickc@redhat.com>
6
7 * Update the address and phone number of the FSF organization in
8 the GPL notices in the following files:
9 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
10 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
11 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
12 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
13 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
14 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
15 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
16 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
17 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
18 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
19 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
20 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
21 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
22 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
23 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
24 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
25 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
26 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
27 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
28 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
29 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
30 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
31 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
32 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
33 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
34 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
35 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
36 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
37 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
38 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
39 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
40 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
41 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
42
10b076a2
JW		 432005-05-05 James E Wilson <wilson@specifixinc.com>
44
45 * ia64-opc.c: Include sysdep.h before libiberty.h.
46
022716b6
NC		 472005-05-05 Nick Clifton <nickc@redhat.com>
48
49 * configure.in (ALL_LINGUAS): Add vi.
50 * configure: Regenerate.
51 * po/vi.po: New.
52
db5152b4
JG		 532005-04-26 Jerome Guitton <guitton@gnat.com>
54
55 * configure.in: Fix the check for basename declaration.
56 * configure: Regenerate.
57
eed0d89a
AM		 582005-04-19 Alan Modra <amodra@bigpond.net.au>
59
60 * ppc-opc.c (RTO): Define.
61 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
62 entries to suit PPC440.
63
791fe849
MK		 642005-04-18 Mark Kettenis <kettenis@gnu.org>
65
66 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
67 Add xcrypt-ctr.
68
ffe58f7c
NC		 692005-04-14 Nick Clifton <nickc@redhat.com>
70
71 * po/fi.po: New translation: Finnish.
72 * configure.in (ALL_LINGUAS): Add fi.
73 * configure: Regenerate.
74
9e9b66a9
AM		 752005-04-14 Alan Modra <amodra@bigpond.net.au>
76
77 * Makefile.am (NO_WERROR): Define.
78 * configure.in: Invoke AM_BINUTILS_WARNINGS.
79 * Makefile.in: Regenerate.
80 * aclocal.m4: Regenerate.
81 * configure: Regenerate.
82
9494d739
NC		 832005-04-04 Nick Clifton <nickc@redhat.com>
84
85 * fr30-asm.c: Regenerate.
86 * frv-asm.c: Regenerate.
87 * iq2000-asm.c: Regenerate.
88 * m32r-asm.c: Regenerate.
89 * openrisc-asm.c: Regenerate.
90
6128c599
JB		 912005-04-01 Jan Beulich <jbeulich@novell.com>
92
93 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
94 visible operands in Intel mode. The first operand of monitor is
95 %rax in 64-bit mode.
96
373ff435
JB		 972005-04-01 Jan Beulich <jbeulich@novell.com>
98
99 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
100 easier future additions.
101
4bd60896
JG		 1022005-03-31 Jerome Guitton <guitton@gnat.com>
103
104 * configure.in: Check for basename.
105 * configure: Regenerate.
106 * config.in: Ditto.
107
4cc91dba
L		 1082005-03-29 H.J. Lu <hongjiu.lu@intel.com>
109
110 * i386-dis.c (SEG_Fixup): New.
111 (Sv): New.
112 (dis386): Use "Sv" for 0x8c and 0x8e.
113
ec72cfe5
NC		 1142005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
115 Nick Clifton <nickc@redhat.com>
116
117 * vax-dis.c: (entry_addr): New varible: An array of user supplied
118 function entry mask addresses.
119 (entry_addr_occupied_slots): New variable: The number of occupied
120 elements in entry_addr.
121 (entry_addr_total_slots): New variable: The total number of
122 elements in entry_addr.
123 (parse_disassembler_options): New function. Fills in the entry_addr
124 array.
125 (free_entry_array): New function. Release the memory used by the
126 entry addr array. Suppressed because there is no way to call it.
127 (is_function_entry): Check if a given address is a function's
128 start address by looking at supplied entry mask addresses and
129 symbol information, if available.
130 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
131
85064c79
L		 1322005-03-23 H.J. Lu <hongjiu.lu@intel.com>
133
134 * cris-dis.c (print_with_operands): Use ~31L for long instead
135 of ~31.
136
de7141c7
L		 1372005-03-20 H.J. Lu <hongjiu.lu@intel.com>
138
139 * mmix-opc.c (O): Revert the last change.
140 (Z): Likewise.
141
e493ab45
L		 1422005-03-19 H.J. Lu <hongjiu.lu@intel.com>
143
144 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
145 (Z): Likewise.
146
d8d7c459
HPN		 1472005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
148
149 * mmix-opc.c (O, Z): Force expression as unsigned long.
150
ebdb0383
NC		 1512005-03-18 Nick Clifton <nickc@redhat.com>
152
153 * ip2k-asm.c: Regenerate.
154 * op/opcodes.pot: Regenerate.
155
1ad12f97
NC		 1562005-03-16 Nick Clifton <nickc@redhat.com>
157 Ben Elliston <bje@au.ibm.com>
158
569acd2c 159 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 160 compiler command line. Enabled by default. Disable via
569acd2c 161 --disable-werror.
1ad12f97
NC		 162 * configure: Regenerate.
163
4eb30afc
AM		 1642005-03-16 Alan Modra <amodra@bigpond.net.au>
165
166 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
167 BOOKE.
168
ea8409f7
AM		 1692005-03-15 Alan Modra <amodra@bigpond.net.au>
170
729ae8d2
AM		 171 * po/es.po: Commit new Spanish translation.
172
ea8409f7
AM		 173 * po/fr.po: Commit new French translation.
174
4f495e61
NC		 1752005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
176
177 * vax-dis.c: Fix spelling error
178 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
179 of just "Entry mask: < r1 ... >"
180
0a003adc
ZW		 1812005-03-12 Zack Weinberg <zack@codesourcery.com>
182
183 * arm-dis.c (arm_opcodes): Document %E and %V.
184 Add entries for v6T2 ARM instructions:
185 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
186 (print_insn_arm): Add support for %E and %V.
885fc257 187 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 188
da99ee72
AM		 1892005-03-10 Jeff Baker <jbaker@qnx.com>
190 Alan Modra <amodra@bigpond.net.au>
191
192 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
193 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
194 (SPRG_MASK): Delete.
195 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 196 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 197 mfsprg4..7 after msprg and consolidate.
198
220abb21
AM		 1992005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
200
201 * vax-dis.c (entry_mask_bit): New array.
202 (print_insn_vax): Decode function entry mask.
203
0e06657a
AH		 2042005-03-07 Aldy Hernandez <aldyh@redhat.com>
205
206 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
207
06647dfd
AM		 2082005-03-05 Alan Modra <amodra@bigpond.net.au>
209
210 * po/opcodes.pot: Regenerate.
211
82b829a7
RR		 2122005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
213
220abb21 214 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 215 (dsmOneArcInst): Use the enum values for the decoding class.
216 Remove redundant case in the switch for decodingClass value 11.
82b829a7 217
c4a530c5
JB		 2182005-03-02 Jan Beulich <jbeulich@novell.com>
219
220 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
221 accesses.
222 (OP_C): Consider lock prefix in non-64-bit modes.
223
47d8304e
AM		 2242005-02-24 Alan Modra <amodra@bigpond.net.au>
225
226 * cris-dis.c (format_hex): Remove ineffective warning fix.
227 * crx-dis.c (make_instruction): Warning fix.
228 * frv-asm.c: Regenerate.
229
ec36c4a4
NC		 2302005-02-23 Nick Clifton <nickc@redhat.com>
231
33b71eeb
NC		 232 * cgen-dis.in: Use bfd_byte for buffers that are passed to
233 read_memory.
06647dfd 234
33b71eeb 235 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 236
ec36c4a4
NC		 237 * crx-dis.c (make_instruction): Move argument structure into inner
238 scope and ensure that all of its fields are initialised before
239 they are used.
240
33b71eeb
NC		 241 * fr30-asm.c: Regenerate.
242 * fr30-dis.c: Regenerate.
243 * frv-asm.c: Regenerate.
244 * frv-dis.c: Regenerate.
245 * ip2k-asm.c: Regenerate.
246 * ip2k-dis.c: Regenerate.
247 * iq2000-asm.c: Regenerate.
248 * iq2000-dis.c: Regenerate.
249 * m32r-asm.c: Regenerate.
250 * m32r-dis.c: Regenerate.
251 * openrisc-asm.c: Regenerate.
252 * openrisc-dis.c: Regenerate.
253 * xstormy16-asm.c: Regenerate.
254 * xstormy16-dis.c: Regenerate.
255
53c9ebc5
AM		 2562005-02-22 Alan Modra <amodra@bigpond.net.au>
257
258 * arc-ext.c: Warning fixes.
259 * arc-ext.h: Likewise.
260 * cgen-opc.c: Likewise.
261 * ia64-gen.c: Likewise.
262 * maxq-dis.c: Likewise.
263 * ns32k-dis.c: Likewise.
264 * w65-dis.c: Likewise.
265 * ia64-asmtab.c: Regenerate.
266
610ad19b
AM		 2672005-02-22 Alan Modra <amodra@bigpond.net.au>
268
269 * fr30-desc.c: Regenerate.
270 * fr30-desc.h: Regenerate.
271 * fr30-opc.c: Regenerate.
272 * fr30-opc.h: Regenerate.
273 * frv-desc.c: Regenerate.
274 * frv-desc.h: Regenerate.
275 * frv-opc.c: Regenerate.
276 * frv-opc.h: Regenerate.
277 * ip2k-desc.c: Regenerate.
278 * ip2k-desc.h: Regenerate.
279 * ip2k-opc.c: Regenerate.
280 * ip2k-opc.h: Regenerate.
281 * iq2000-desc.c: Regenerate.
282 * iq2000-desc.h: Regenerate.
283 * iq2000-opc.c: Regenerate.
284 * iq2000-opc.h: Regenerate.
285 * m32r-desc.c: Regenerate.
286 * m32r-desc.h: Regenerate.
287 * m32r-opc.c: Regenerate.
288 * m32r-opc.h: Regenerate.
289 * m32r-opinst.c: Regenerate.
290 * openrisc-desc.c: Regenerate.
291 * openrisc-desc.h: Regenerate.
292 * openrisc-opc.c: Regenerate.
293 * openrisc-opc.h: Regenerate.
294 * xstormy16-desc.c: Regenerate.
295 * xstormy16-desc.h: Regenerate.
296 * xstormy16-opc.c: Regenerate.
297 * xstormy16-opc.h: Regenerate.
298
db9db6f2
AM		 2992005-02-21 Alan Modra <amodra@bigpond.net.au>
300
301 * Makefile.am: Run "make dep-am"
302 * Makefile.in: Regenerate.
303
bf143b25
NC		 3042005-02-15 Nick Clifton <nickc@redhat.com>
305
306 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
307 compile time warnings.
308 (print_keyword): Likewise.
309 (default_print_insn): Likewise.
310
311 * fr30-desc.c: Regenerated.
312 * fr30-desc.h: Regenerated.
313 * fr30-dis.c: Regenerated.
314 * fr30-opc.c: Regenerated.
315 * fr30-opc.h: Regenerated.
316 * frv-desc.c: Regenerated.
317 * frv-dis.c: Regenerated.
318 * frv-opc.c: Regenerated.
319 * ip2k-asm.c: Regenerated.
320 * ip2k-desc.c: Regenerated.
321 * ip2k-desc.h: Regenerated.
322 * ip2k-dis.c: Regenerated.
323 * ip2k-opc.c: Regenerated.
324 * ip2k-opc.h: Regenerated.
325 * iq2000-desc.c: Regenerated.
326 * iq2000-dis.c: Regenerated.
327 * iq2000-opc.c: Regenerated.
328 * m32r-asm.c: Regenerated.
329 * m32r-desc.c: Regenerated.
330 * m32r-desc.h: Regenerated.
331 * m32r-dis.c: Regenerated.
332 * m32r-opc.c: Regenerated.
333 * m32r-opc.h: Regenerated.
334 * m32r-opinst.c: Regenerated.
335 * openrisc-desc.c: Regenerated.
336 * openrisc-desc.h: Regenerated.
337 * openrisc-dis.c: Regenerated.
338 * openrisc-opc.c: Regenerated.
339 * openrisc-opc.h: Regenerated.
340 * xstormy16-desc.c: Regenerated.
341 * xstormy16-desc.h: Regenerated.
342 * xstormy16-dis.c: Regenerated.
343 * xstormy16-opc.c: Regenerated.
344 * xstormy16-opc.h: Regenerated.
345
d6098898
L		 3462005-02-14 H.J. Lu <hongjiu.lu@intel.com>
347
348 * dis-buf.c (perror_memory): Use sprintf_vma to print out
349 address.
350
5a84f3e0
NC		 3512005-02-11 Nick Clifton <nickc@redhat.com>
352
bc18c937
NC		 353 * iq2000-asm.c: Regenerate.
354
5a84f3e0
NC		 355 * frv-dis.c: Regenerate.
356
0a40490e
JB		 3572005-02-07 Jim Blandy <jimb@redhat.com>
358
359 * Makefile.am (CGEN): Load guile.scm before calling the main
360 application script.
361 * Makefile.in: Regenerated.
362 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
363 Simply pass the cgen-opc.scm path to ${cgen} as its first
364 argument; ${cgen} itself now contains the '-s', or whatever is
365 appropriate for the Scheme being used.
366
c46f8c51
AC		 3672005-01-31 Andrew Cagney <cagney@gnu.org>
368
369 * configure: Regenerate to track ../gettext.m4.
370
60b9a617
JB		 3712005-01-31 Jan Beulich <jbeulich@novell.com>
372
373 * ia64-gen.c (NELEMS): Define.
374 (shrink): Generate alias with missing second predicate register when
375 opcode has two outputs and these are both predicates.
376 * ia64-opc-i.c (FULL17): Define.
377 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
378 here to generate output template.
379 (TBITCM, TNATCM): Undefine after use.
380 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
381 first input. Add ld16 aliases without ar.csd as second output. Add
382 st16 aliases without ar.csd as second input. Add cmpxchg aliases
383 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
384 ar.ccv as third/fourth inputs. Consolidate through...
385 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
386 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
387 * ia64-asmtab.c: Regenerate.
388
a53bf506
AC		 3892005-01-27 Andrew Cagney <cagney@gnu.org>
390
391 * configure: Regenerate to track ../gettext.m4 change.
392
90219bd0
AO		 3932005-01-25 Alexandre Oliva <aoliva@redhat.com>
394
395 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
396 * frv-asm.c: Rebuilt.
397 * frv-desc.c: Rebuilt.
398 * frv-desc.h: Rebuilt.
399 * frv-dis.c: Rebuilt.
400 * frv-ibld.c: Rebuilt.
401 * frv-opc.c: Rebuilt.
402 * frv-opc.h: Rebuilt.
403
45181ed1
AC		 4042005-01-24 Andrew Cagney <cagney@gnu.org>
405
406 * configure: Regenerate, ../gettext.m4 was updated.
407
9e836e3d
FF		 4082005-01-21 Fred Fish <fnf@specifixinc.com>
409
410 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
411 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
412 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
413 * mips-dis.c: Ditto.
414
5e8cb021
AM		 4152005-01-20 Alan Modra <amodra@bigpond.net.au>
416
417 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
418
986e18a5
FF		 4192005-01-19 Fred Fish <fnf@specifixinc.com>
420
421 * mips-dis.c (no_aliases): New disassembly option flag.
422 (set_default_mips_dis_options): Init no_aliases to zero.
423 (parse_mips_dis_option): Handle no-aliases option.
424 (print_insn_mips): Ignore table entries that are aliases
425 if no_aliases is set.
426 (print_insn_mips16): Ditto.
427 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
428 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
429 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
430 * mips16-opc.c (mips16_opcodes): Ditto.
431
e38bc3b5
NC		 4322005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
433
434 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
435 (inheritance diagram): Add missing edge.
436 (arch_sh1_up): Rename arch_sh_up to match external name to make life
437 easier for the testsuite.
438 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
439 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 440 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 441 arch_sh2a_or_sh4_up child.
442 (sh_table): Do renaming as above.
443 Correct comment for ldc.l for gas testsuite to read.
444 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
445 Correct comments for movy.w and movy.l for gas testsuite to read.
446 Correct comments for fmov.d and fmov.s for gas testsuite to read.
447
9df48ba9
L		 4482005-01-12 H.J. Lu <hongjiu.lu@intel.com>
449
450 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
451
2033b4b9
L		 4522005-01-12 H.J. Lu <hongjiu.lu@intel.com>
453
454 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
455
0bcb06d2
AS		 4562005-01-10 Andreas Schwab <schwab@suse.de>
457
458 * disassemble.c (disassemble_init_for_target) <case
459 bfd_arch_ia64>: Set skip_zeroes to 16.
460 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
461
47add74d
TL		 4622004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
463
464 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
465
246f4c05
SS		 4662004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
467
468 * avr-dis.c: Prettyprint. Added printing of symbol names in all
469 memory references. Convert avr_operand() to C90 formatting.
470
0e1200e5
TL		 4712004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
472
473 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
474
89a649f7
TL		 4752004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
476
477 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
478 (no_op_insn): Initialize array with instructions that have no
479 operands.
480 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
481
6255809c
RE		 4822004-11-29 Richard Earnshaw <rearnsha@arm.com>
483
484 * arm-dis.c: Correct top-level comment.
485
2fbad815
RE		 4862004-11-27 Richard Earnshaw <rearnsha@arm.com>
487
488 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
489 architecuture defining the insn.
490 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 491 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
492 field.
2fbad815
RE		 493 Also include opcode/arm.h.
494 * Makefile.am (arm-dis.lo): Update dependency list.
495 * Makefile.in: Regenerate.
496
d81acc42
NC		 4972004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
498
499 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
500 reflect the change to the short immediate syntax.
501
ca4f2377
AM		 5022004-11-19 Alan Modra <amodra@bigpond.net.au>
503
5da8bf1b
AM		 504 * or32-opc.c (debug): Warning fix.
505 * po/POTFILES.in: Regenerate.
506
ca4f2377
AM		 507 * maxq-dis.c: Formatting.
508 (print_insn): Warning fix.
509
b7693d02
DJ		 5102004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
511
512 * arm-dis.c (WORD_ADDRESS): Define.
513 (print_insn): Use it. Correct big-endian end-of-section handling.
514
300dac7e
NC		 5152004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
516 Vineet Sharma <vineets@noida.hcltech.com>
517
518 * maxq-dis.c: New file.
519 * disassemble.c (ARCH_maxq): Define.
610ad19b 520 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 521 instructions..
522 * configure.in: Add case for bfd_maxq_arch.
523 * configure: Regenerate.
524 * Makefile.am: Add support for maxq-dis.c
525 * Makefile.in: Regenerate.
526 * aclocal.m4: Regenerate.
527
42048ee7
TL		 5282004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
529
530 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
531 mode.
532 * crx-dis.c: Likewise.
533
bd21e58e
HPN		 5342004-11-04 Hans-Peter Nilsson <hp@axis.com>
535
536 Generally, handle CRISv32.
537 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
538 (struct cris_disasm_data): New type.
539 (format_reg, format_hex, cris_constraint, print_flags)
540 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
541 callers changed.
542 (format_sup_reg, print_insn_crisv32_with_register_prefix)
543 (print_insn_crisv32_without_register_prefix)
544 (print_insn_crisv10_v32_with_register_prefix)
545 (print_insn_crisv10_v32_without_register_prefix)
546 (cris_parse_disassembler_options): New functions.
547 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
548 parameter. All callers changed.
549 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
550 failure.
551 (cris_constraint) <case 'Y', 'U'>: New cases.
552 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
553 for constraint 'n'.
554 (print_with_operands) <case 'Y'>: New case.
555 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
556 <case 'N', 'Y', 'Q'>: New cases.
557 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
558 (print_insn_cris_with_register_prefix)
559 (print_insn_cris_without_register_prefix): Call
560 cris_parse_disassembler_options.
561 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
562 for CRISv32 and the size of immediate operands. New v32-only
563 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
564 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
565 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
566 Change brp to be v3..v10.
567 (cris_support_regs): New vector.
568 (cris_opcodes): Update head comment. New format characters '[',
569 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
570 Add new opcodes for v32 and adjust existing opcodes to accommodate
571 differences to earlier variants.
572 (cris_cond15s): New vector.
573
9306ca4a
JB		 5742004-11-04 Jan Beulich <jbeulich@novell.com>
575
576 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
577 (indirEb): Remove.
578 (Mp): Use f_mode rather than none at all.
579 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
580 replaces what previously was x_mode; x_mode now means 128-bit SSE
581 operands.
582 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
583 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
584 pinsrw's second operand is Edqw.
585 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
586 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
587 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
588 mode when an operand size override is present or always suffixing.
589 More instructions will need to be added to this group.
590 (putop): Handle new macro chars 'C' (short/long suffix selector),
591 'I' (Intel mode override for following macro char), and 'J' (for
592 adding the 'l' prefix to far branches in AT&T mode). When an
593 alternative was specified in the template, honor macro character when
594 specified for Intel mode.
595 (OP_E): Handle new *_mode values. Correct pointer specifications for
596 memory operands. Consolidate output of index register.
597 (OP_G): Handle new *_mode values.
598 (OP_I): Handle const_1_mode.
599 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
600 respective opcode prefix bits have been consumed.
601 (OP_EM, OP_EX): Provide some default handling for generating pointer
602 specifications.
603
f39c96a9
TL		 6042004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
605
606 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
607 COP_INST macro.
608
812337be
TL		 6092004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
610
611 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
612 (getregliststring): Support HI/LO and user registers.
610ad19b 613 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 614 rearrangement done in CRX opcode header file.
615 (crx_regtab): Likewise.
616 (crx_optab): Likewise.
610ad19b 617 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 618 formats.
619 support new Co-Processor instruction 'cpi'.
620
4030fa5a
NC		 6212004-10-27 Nick Clifton <nickc@redhat.com>
622
623 * opcodes/iq2000-asm.c: Regenerate.
624 * opcodes/iq2000-desc.c: Regenerate.
625 * opcodes/iq2000-desc.h: Regenerate.
626 * opcodes/iq2000-dis.c: Regenerate.
627 * opcodes/iq2000-ibld.c: Regenerate.
628 * opcodes/iq2000-opc.c: Regenerate.
629 * opcodes/iq2000-opc.h: Regenerate.
630
fc3d45e8
TL		 6312004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
632
633 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
634 us4, us5 (respectively).
635 Remove unsupported 'popa' instruction.
636 Reverse operands order in store co-processor instructions.
637
3c55da70
AM		 6382004-10-15 Alan Modra <amodra@bigpond.net.au>
639
640 * Makefile.am: Run "make dep-am"
641 * Makefile.in: Regenerate.
642
7fa3d080
BW		 6432004-10-12 Bob Wilson <bob.wilson@acm.org>
644
645 * xtensa-dis.c: Use ISO C90 formatting.
646
e612bb4d
AM		 6472004-10-09 Alan Modra <amodra@bigpond.net.au>
648
649 * ppc-opc.c: Revert 2004-09-09 change.
650
43cd72b9
BW		 6512004-10-07 Bob Wilson <bob.wilson@acm.org>
652
653 * xtensa-dis.c (state_names): Delete.
654 (fetch_data): Use xtensa_isa_maxlength.
655 (print_xtensa_operand): Replace operand parameter with opcode/operand
656 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
657 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
658 instruction bundles. Use xmalloc instead of malloc.
659
bbac1f2a
NC		 6602004-10-07 David Gibson <david@gibson.dropbear.id.au>
661
662 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
663 initializers.
664
48c9f030
NC		 6652004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
666
667 * crx-opc.c (crx_instruction): Support Co-processor insns.
668 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
669 (getregliststring): Change function to use the above enum.
670 (print_arg): Handle CO-Processor insns.
671 (crx_cinvs): Add 'b' option to invalidate the branch-target
672 cache.
673
12c64a4e
AH		 6742004-10-06 Aldy Hernandez <aldyh@redhat.com>
675
676 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
677 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
678 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
679 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
680 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
681
14127cc4
NC		 6822004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
683
684 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
685 rather than add it.
686
0dd132b6
NC		 6872004-09-30 Paul Brook <paul@codesourcery.com>
688
689 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
690 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
691
3f85e526
L		 6922004-09-17 H.J. Lu <hongjiu.lu@intel.com>
693
694 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
695 (CONFIG_STATUS_DEPENDENCIES): New.
696 (Makefile): Removed.
697 (config.status): Likewise.
698 * Makefile.in: Regenerated.
699
8ae85421
AM		 7002004-09-17 Alan Modra <amodra@bigpond.net.au>
701
702 * Makefile.am: Run "make dep-am".
703 * Makefile.in: Regenerate.
704 * aclocal.m4: Regenerate.
705 * configure: Regenerate.
706 * po/POTFILES.in: Regenerate.
707 * po/opcodes.pot: Regenerate.
708
24443139
AS		 7092004-09-11 Andreas Schwab <schwab@suse.de>
710
711 * configure: Rebuild.
712
2a309db0
AM		 7132004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
714
715 * ppc-opc.c (L): Make this field not optional.
716
42851540
NC		 7172004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
718
719 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
720 Fix parameter to 'm[t|f]csr' insns.
721
979273e3
NN		 7222004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
723
724 * configure.in: Autoupdate to autoconf 2.59.
725 * aclocal.m4: Rebuild with aclocal 1.4p6.
726 * configure: Rebuild with autoconf 2.59.
727 * Makefile.in: Rebuild with automake 1.4p6 (picking up
728 bfd changes for autoconf 2.59 on the way).
729 * config.in: Rebuild with autoheader 2.59.
730
ac28a1cb
RS		 7312004-08-27 Richard Sandiford <rsandifo@redhat.com>
732
733 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
734
30d1c836
ML		 7352004-07-30 Michal Ludvig <mludvig@suse.cz>
736
737 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
738 (GRPPADLCK2): New define.
739 (twobyte_has_modrm): True for 0xA6.
740 (grps): GRPPADLCK2 for opcode 0xA6.
741
0b0ac059
AO		 7422004-07-29 Alexandre Oliva <aoliva@redhat.com>
743
744 Introduce SH2a support.
745 * sh-opc.h (arch_sh2a_base): Renumber.
746 (arch_sh2a_nofpu_base): Remove.
747 (arch_sh_base_mask): Adjust.
748 (arch_opann_mask): New.
749 (arch_sh2a, arch_sh2a_nofpu): Adjust.
750 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
751 (sh_table): Adjust whitespace.
752 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
753 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
754 instruction list throughout.
755 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
756 of arch_sh2a in instruction list throughout.
757 (arch_sh2e_up): Accomodate above changes.
758 (arch_sh2_up): Ditto.
759 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
760 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
761 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
762 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
763 * sh-opc.h (arch_sh2a_nofpu): New.
764 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
765 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
766 instruction.
767 2004-01-20 DJ Delorie <dj@redhat.com>
768 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
769 2003-12-29 DJ Delorie <dj@redhat.com>
770 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
771 sh_opcode_info, sh_table): Add sh2a support.
772 (arch_op32): New, to tag 32-bit opcodes.
773 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
774 2003-12-02 Michael Snyder <msnyder@redhat.com>
775 * sh-opc.h (arch_sh2a): Add.
776 * sh-dis.c (arch_sh2a): Handle.
777 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
778
670ec21d
NC		 7792004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
780
781 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
782
ed049af3
NC		 7832004-07-22 Nick Clifton <nickc@redhat.com>
784
785 PR/280
786 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
787 insns - this is done by objdump itself.
788 * h8500-dis.c (print_insn_h8500): Likewise.
789
20f0a1fc
NC		 7902004-07-21 Jan Beulich <jbeulich@novell.com>
791
792 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
793 regardless of address size prefix in effect.
794 (ptr_reg): Size or address registers does not depend on rex64, but
795 on the presence of an address size override.
796 (OP_MMX): Use rex.x only for xmm registers.
797 (OP_EM): Use rex.z only for xmm registers.
798
6f14957b
MR		 7992004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
800
801 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
802 move/branch operations to the bottom so that VR5400 multimedia
803 instructions take precedence in disassembly.
804
1586d91e
MR		 8052004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
806
807 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
808 ISA-specific "break" encoding.
809
982de27a
NC		 8102004-07-13 Elvis Chiang <elvisfb@gmail.com>
811
812 * arm-opc.h: Fix typo in comment.
813
4300ab10
AS		 8142004-07-11 Andreas Schwab <schwab@suse.de>
815
816 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
817
8577e690
AS		 8182004-07-09 Andreas Schwab <schwab@suse.de>
819
820 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
821
1fe1f39c
NC		 8222004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
823
824 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
825 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
826 (crx-dis.lo): New target.
827 (crx-opc.lo): Likewise.
828 * Makefile.in: Regenerate.
829 * configure.in: Handle bfd_crx_arch.
830 * configure: Regenerate.
831 * crx-dis.c: New file.
832 * crx-opc.c: New file.
833 * disassemble.c (ARCH_crx): Define.
834 (disassembler): Handle ARCH_crx.
835
7a33b495
JW		 8362004-06-29 James E Wilson <wilson@specifixinc.com>
837
838 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
839 * ia64-asmtab.c: Regnerate.
840
98e69875
AM		 8412004-06-28 Alan Modra <amodra@bigpond.net.au>
842
843 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
844 (extract_fxm): Don't test dialect.
845 (XFXFXM_MASK): Include the power4 bit.
846 (XFXM): Add p4 param.
847 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
848
a53b85e2
AO		 8492004-06-27 Alexandre Oliva <aoliva@redhat.com>
850
851 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
852 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
853
d0618d1c
AM		 8542004-06-26 Alan Modra <amodra@bigpond.net.au>
855
856 * ppc-opc.c (BH, XLBH_MASK): Define.
857 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
858
1d9f512f
AM		 8592004-06-24 Alan Modra <amodra@bigpond.net.au>
860
861 * i386-dis.c (x_mode): Comment.
862 (two_source_ops): File scope.
863 (float_mem): Correct fisttpll and fistpll.
864 (float_mem_mode): New table.
865 (dofloat): Use it.
866 (OP_E): Correct intel mode PTR output.
867 (ptr_reg): Use open_char and close_char.
868 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
869 operands. Set two_source_ops.
870
52886d70
AM		 8712004-06-15 Alan Modra <amodra@bigpond.net.au>
872
873 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
874 instead of _raw_size.
875
bad9ceea
JJ		 8762004-06-08 Jakub Jelinek <jakub@redhat.com>
877
878 * ia64-gen.c (in_iclass): Handle more postinc st
879 and ld variants.
880 * ia64-asmtab.c: Rebuilt.
881
0451f5df
MS		 8822004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
883
884 * s390-opc.txt: Correct architecture mask for some opcodes.
885 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
886 in the esa mode as well.
887
f6f9408f
JR		 8882004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
889
890 * sh-dis.c (target_arch): Make unsigned.
891 (print_insn_sh): Replace (most of) switch with a call to
892 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
893 * sh-opc.h: Redefine architecture flags values.
894 Add sh3-nommu architecture.
895 Reorganise <arch>_up macros so they make more visual sense.
896 (SH_MERGE_ARCH_SET): Define new macro.
897 (SH_VALID_BASE_ARCH_SET): Likewise.
898 (SH_VALID_MMU_ARCH_SET): Likewise.
899 (SH_VALID_CO_ARCH_SET): Likewise.
900 (SH_VALID_ARCH_SET): Likewise.
901 (SH_MERGE_ARCH_SET_VALID): Likewise.
902 (SH_ARCH_SET_HAS_FPU): Likewise.
903 (SH_ARCH_SET_HAS_DSP): Likewise.
904 (SH_ARCH_UNKNOWN_ARCH): Likewise.
905 (sh_get_arch_from_bfd_mach): Add prototype.
906 (sh_get_arch_up_from_bfd_mach): Likewise.
907 (sh_get_bfd_mach_from_arch_set): Likewise.
908 (sh_merge_bfd_arc): Likewise.
909
be8c092b
NC		 9102004-05-24 Peter Barada <peter@the-baradas.com>
911
912 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 913 into new match_insn_m68k function. Loop over canidate
914 matches and select first that completely matches.
be8c092b
NC		 915 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
916 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 917 to verify addressing for MAC/EMAC.
be8c092b
NC		 918 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
919 reigster halves since 'fpu' and 'spl' look misleading.
920 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
921 * m68k-opc.c: Rearragne mac/emac cases to use longest for
922 first, tighten up match masks.
923 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
924 'size' from special case code in print_insn_m68k to
925 determine decode size of insns.
926
a30e9cc4
AM		 9272004-05-19 Alan Modra <amodra@bigpond.net.au>
928
929 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
930 well as when -mpower4.
931
9598fbe5
NC		 9322004-05-13 Nick Clifton <nickc@redhat.com>
933
934 * po/fr.po: Updated French translation.
935
6b6e92f4
NC		 9362004-05-05 Peter Barada <peter@the-baradas.com>
937
938 * m68k-dis.c(print_insn_m68k): Add new chips, use core
939 variants in arch_mask. Only set m68881/68851 for 68k chips.
940 * m68k-op.c: Switch from ColdFire chips to core variants.
941
a404d431
AM		 9422004-05-05 Alan Modra <amodra@bigpond.net.au>
943
a30e9cc4 944 PR 147.
a404d431
AM		 945 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
946
f3806e43
BE		 9472004-04-29 Ben Elliston <bje@au.ibm.com>
948
520ceea4
BE		 949 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
950 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 951
1f1799d5
KK		 9522004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
953
954 * sh-dis.c (print_insn_sh): Print the value in constant pool
955 as a symbol if it looks like a symbol.
956
fd99574b
NC		 9572004-04-22 Peter Barada <peter@the-baradas.com>
958
959 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
960 appropriate ColdFire architectures.
961 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
962 mask addressing.
963 Add EMAC instructions, fix MAC instructions. Remove
964 macmw/macml/msacmw/msacml instructions since mask addressing now
965 supported.
966
b4781d44
JJ		 9672004-04-20 Jakub Jelinek <jakub@redhat.com>
968
969 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
970 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
971 suffix. Use fmov*x macros, create all 3 fpsize variants in one
972 macro. Adjust all users.
973
91809fda 9742004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 975
91809fda
NC		 976 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
977 separately.
978
f4453dfa
NC		 9792004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
980
981 * m32r-asm.c: Regenerate.
982
9b0de91a
SS		 9832004-03-29 Stan Shebs <shebs@apple.com>
984
985 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
986 used.
987
e20c0b3d
AM		 9882004-03-19 Alan Modra <amodra@bigpond.net.au>
989
990 * aclocal.m4: Regenerate.
991 * config.in: Regenerate.
992 * configure: Regenerate.
993 * po/POTFILES.in: Regenerate.
994 * po/opcodes.pot: Regenerate.
995
fdd12ef3
AM		 9962004-03-16 Alan Modra <amodra@bigpond.net.au>
997
998 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
999 PPC_OPERANDS_GPR_0.
1000 * ppc-opc.c (RA0): Define.
1001 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1002 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1003 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1004
2dc111b3 10052004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1006
1007 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1008
7bfeee7b
AM		 10092004-03-15 Alan Modra <amodra@bigpond.net.au>
1010
1011 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1012
7ffdda93
ML		 10132004-03-12 Michal Ludvig <mludvig@suse.cz>
1014
1015 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1016 (grps): Delete GRPPLOCK entry.
7ffdda93 1017
cc0ec051
AM		 10182004-03-12 Alan Modra <amodra@bigpond.net.au>
1019
1020 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1021 (M, Mp): Use OP_M.
1022 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1023 (GRPPADLCK): Define.
1024 (dis386): Use NOP_Fixup on "nop".
1025 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1026 (twobyte_has_modrm): Set for 0xa7.
1027 (padlock_table): Delete. Move to..
1028 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1029 and clflush.
1030 (print_insn): Revert PADLOCK_SPECIAL code.
1031 (OP_E): Delete sfence, lfence, mfence checks.
1032
4fd61dcb
JJ		 10332004-03-12 Jakub Jelinek <jakub@redhat.com>
1034
1035 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1036 (INVLPG_Fixup): New function.
1037 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1038
0f10071e
ML		 10392004-03-12 Michal Ludvig <mludvig@suse.cz>
1040
1041 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1042 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1043 (padlock_table): New struct with PadLock instructions.
1044 (print_insn): Handle PADLOCK_SPECIAL.
1045
c02908d2
AM		 10462004-03-12 Alan Modra <amodra@bigpond.net.au>
1047
1048 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1049 (OP_E): Twiddle clflush to sfence here.
1050
d5bb7600
NC		 10512004-03-08 Nick Clifton <nickc@redhat.com>
1052
1053 * po/de.po: Updated German translation.
1054
ae51a426
JR		 10552003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1056
1057 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1058 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1059 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1060 accordingly.
1061
676a64f4
RS		 10622004-03-01 Richard Sandiford <rsandifo@redhat.com>
1063
1064 * frv-asm.c: Regenerate.
1065 * frv-desc.c: Regenerate.
1066 * frv-desc.h: Regenerate.
1067 * frv-dis.c: Regenerate.
1068 * frv-ibld.c: Regenerate.
1069 * frv-opc.c: Regenerate.
1070 * frv-opc.h: Regenerate.
1071
c7a48b9a
RS		 10722004-03-01 Richard Sandiford <rsandifo@redhat.com>
1073
1074 * frv-desc.c, frv-opc.c: Regenerate.
1075
8ae0baa2
RS		 10762004-03-01 Richard Sandiford <rsandifo@redhat.com>
1077
1078 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1079
ce11586c
JR		 10802004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1081
1082 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1083 Also correct mistake in the comment.
1084
6a5709a5
JR		 10852004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1086
1087 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1088 ensure that double registers have even numbers.
1089 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1090 that reserved instruction 0xfffd does not decode the same
1091 as 0xfdfd (ftrv).
1092 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1093 REG_N refers to a double register.
1094 Add REG_N_B01 nibble type and use it instead of REG_NM
1095 in ftrv.
1096 Adjust the bit patterns in a few comments.
1097
e5d2b64f 10982004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1099
1100 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1101
1f04b05f
AH		 11022004-02-20 Aldy Hernandez <aldyh@redhat.com>
1103
1104 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1105
2f3b8700
AH		 11062004-02-20 Aldy Hernandez <aldyh@redhat.com>
1107
1108 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1109
f0b26da6 11102004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1111
1112 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1113 mtivor32, mtivor33, mtivor34.
f0b26da6 1114
23d59c56 11152004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1116
1117 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1118
34920d91
NC		 11192004-02-10 Petko Manolov <petkan@nucleusys.com>
1120
1121 * arm-opc.h Maverick accumulator register opcode fixes.
1122
44d86481
BE		 11232004-02-13 Ben Elliston <bje@wasabisystems.com>
1124
1125 * m32r-dis.c: Regenerate.
1126
17707c23
MS		 11272004-01-27 Michael Snyder <msnyder@redhat.com>
1128
1129 * sh-opc.h (sh_table): "fsrra", not "fssra".
1130
fe3a9bc4
NC		 11312004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1132
1133 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1134 contraints.
1135
ff24f124
JJ		 11362004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1137
1138 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1139
a02a862a
AM		 11402004-01-19 Alan Modra <amodra@bigpond.net.au>
1141
1142 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1143 1. Don't print scale factor on AT&T mode when index missing.
1144
d164ea7f
AO		 11452004-01-16 Alexandre Oliva <aoliva@redhat.com>
1146
1147 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1148 when loaded into XR registers.
1149
cb10e79a
RS		 11502004-01-14 Richard Sandiford <rsandifo@redhat.com>
1151
1152 * frv-desc.h: Regenerate.
1153 * frv-desc.c: Regenerate.
1154 * frv-opc.c: Regenerate.
1155
f532f3fa
MS		 11562004-01-13 Michael Snyder <msnyder@redhat.com>
1157
1158 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1159
e45d0630
PB		 11602004-01-09 Paul Brook <paul@codesourcery.com>
1161
1162 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1163 specific opcodes.
1164
3ba7a1aa
DJ		 11652004-01-07 Daniel Jacobowitz <drow@mvista.com>
1166
1167 * Makefile.am (libopcodes_la_DEPENDENCIES)
1168 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1169 comment about the problem.
1170 * Makefile.in: Regenerate.
1171
ba2d3f07
AO		 11722004-01-06 Alexandre Oliva <aoliva@redhat.com>
1173
1174 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1175 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1176 cut&paste errors in shifting/truncating numerical operands.
1177 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1178 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1179 (parse_uslo16): Likewise.
1180 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1181 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1182 (parse_s12): Likewise.
1183 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1184 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1185 (parse_uslo16): Likewise.
1186 (parse_uhi16): Parse gothi and gotfuncdeschi.
1187 (parse_d12): Parse got12 and gotfuncdesc12.
1188 (parse_s12): Likewise.
1189
3ab48931
NC		 11902004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1191
1192 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1193 instruction which looks similar to an 'rla' instruction.
a0bd404e 1194
c9e214e5 1195For older changes see ChangeLog-0203
252b5132
RH		 1196\f
1197Local Variables:
2f6d2f85
NC		 1198mode: change-log
1199left-margin: 8
1200fill-column: 74
252b5132
RH		 1201version-control: never
1202End:
GDB Binutils - Deliverables
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