[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2010-04-22  Nick Clifton  <nickc@redhat.com>

	* po/opcodes.pot: Updated by the Translation project.
	* po/vi.po: Updated Vietnamese translation.

2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
	bits in opcode.

2010-04-09  Nick Clifton  <nickc@redhat.com>

	* i386-dis.c (print_insn): Remove unused variable op.
	(OP_sI): Remove unused variable mask.

2010-04-07  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>

	* ppc-opc.c (RBOPT): New define.
	("dccci"): Enable for PPCA2.  Make operands optional.
	("iccci"): Likewise.  Do not deprecate for PPC476.

2010-04-02  Masaki Muranaka  <monaka@monami-software.com>

	* cr16-opc.c (cr16_instruction): Fix typo in comment.

2010-03-25  Joseph Myers  <joseph@codesourcery.com>

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	* Makefile.in: Regenerate.
	* configure.in (bfd_tic6x_arch): New.
	* configure: Regenerate.
	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	(disassembler): Handle TI C6X.
	* tic6x-dis.c: New.

2010-03-24  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.

2010-03-23  Joseph Myers  <joseph@codesourcery.com>

	* dis-buf.c (buffer_read_memory): Give error for reading just
	before the start of memory.

2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
	    Quentin Neill <quentin.neill@amd.com>

	* i386-dis.c (OP_LWP_I): Removed.
	(reg_table): Do not use OP_LWP_I, use Iq.
	(OP_LWPCB_E): Remove use of names16.
	(OP_LWP_E): Same.
	* i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
	should not set the Vex.length bit.
	* i386-tbl.h: Regenerated.

2010-02-25  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".

2010-02-24  Nick Clifton  <nickc@redhat.com>

	PR binutils/6773
	* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
	<prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
	(thumb32_opcodes): Likewise.

2010-02-15  Nick Clifton  <nickc@redhat.com>

	* po/vi.po: Updated Vietnamese translation.

2010-02-12  Doug Evans  <dje@sebabeach.org>

	* lm32-opinst.c: Regenerate.

2010-02-11  Doug Evans  <dje@sebabeach.org>

	* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
	(print_address): Delete CGEN_PRINT_ADDRESS.
	* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
	* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
	* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
	* xc16x-dis.c, * xstormy16-dis.c: Regenerate.

	* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
	* frv-desc.c, * frv-desc.h, * frv-opc.c,
	* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
	* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
	* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
	* mep-desc.c, * mep-desc.h, * mep-opc.c,
	* mt-desc.c, * mt-desc.h, * mt-opc.c,
	* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
	* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
	* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Update copyright.
	* i386-gen.c: Likewise.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2010-02-10  Quentin Neill  <quentin.neill@amd.com>
	    Sebastian Pop  <sebastian.pop@amd.com>

	* i386-dis.c (OP_EX_VexImmW): Reintroduced
	function to handle 5th imm8 operand.
	(PREFIX_VEX_3A48): Added.
	(PREFIX_VEX_3A49): Added.
	(VEX_W_3A48_P_2): Added.
	(VEX_W_3A49_P_2): Added.
	(prefix table): Added entries for PREFIX_VEX_3A48
	and PREFIX_VEX_3A49.
	(vex table): Added entries for VEX_W_3A48_P_2 and
	and VEX_W_3A49_P_2.
	* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
	for Vec_Imm4 operands.
	* i386-opc.h (enum): Added Vec_Imm4.
	(i386_operand_type): Added vec_imm4.
	* i386-opc.tbl: Add entries for vpermilp[ds].
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.

2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>

	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	and "pwr7".  Move "a2" into alphabetical order.

2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>

	* ppc-dis.c (ppc_opts): Add titan entry.
	* ppc-opc.c (TITAN, MULHW): Define.
	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).

2010-02-03  Quentin Neill  <quentin.neill@amd.com>

	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	to CPU_BDVER1_FLAGS
	* i386-init.h: Regenerated.

2010-02-03  Anthony Green  <green@moxielogic.com>

	* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
	0x0f, and make 0x00 an illegal instruction.

2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>

	* opcodes/arm-dis.c (struct arm_private_data): New.
	(print_insn_coprocessor, print_insn_arm): Update to use struct
	arm_private_data.
	(is_mapping_symbol, get_map_sym_type): New functions.
	(get_sym_code_type): Check the symbol's section.  Do not check
	mapping symbols.
	(print_insn): Default to disassembling ARM mode code.  Check
	for mapping symbols separately from other symbols.  Use
	struct arm_private_data.

2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EXVexWdqScalar): New.
	(vex_scalar_w_dq_mode): Likewise.
	(prefix_table): Update entries for PREFIX_VEX_3899,
	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	(OP_EX): Likewise.

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (XMScalar): New.
	(EXdScalar): Likewise.
	(EXqScalar): Likewise.
	(EXqScalarS): Likewise.
	(VexScalar): Likewise.
	(EXdVexScalarS): Likewise.
	(EXqVexScalarS): Likewise.
	(XMVexScalar): Likewise.
	(scalar_mode): Likewise.
	(d_scalar_mode): Likewise.
	(d_scalar_swap_mode): Likewise.
	(q_scalar_mode): Likewise.
	(q_scalar_swap_mode): Likewise.
	(vex_scalar_mode): Likewise.
	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	q_scalar_mode, q_scalar_swap_mode.
	(OP_XMM): Handle scalar_mode.
	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	and q_scalar_swap_mode.
	(OP_VEX): Handle vex_scalar_mode.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Bad_Opcode): New.
	(bad_opcode): Likewise.
	(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
	(dis386_twobyte): Likewise.
	(reg_table): Likewise.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(float_reg): Likewise.
	(reg_table): Remove trailing "(bad)" entries.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(get_valid_dis386): Handle bytemode 0.

2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEXScalar): New.

	* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
	instructions.
	* i386-tbl.h: Regenerated.

2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.

	* i386-opc.tbl: Add xsave64 and xrstor64.
	* i386-tbl.h: Regenerated.

2010-01-20  Nick Clifton  <nickc@redhat.com>

	PR 11170
	* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
	based post-indexed addressing.

2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>

	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	* i386-tbl.h: Regenerated.

2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
	comments.

2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (names_mm): New.
	(intel_names_mm): Likewise.
	(att_names_mm): Likewise.
	(names_xmm): Likewise.
	(intel_names_xmm): Likewise.
	(att_names_xmm): Likewise.
	(names_ymm): Likewise.
	(intel_names_ymm): Likewise.
	(att_names_ymm): Likewise.
	(print_insn): Set names_mm, names_xmm and names_ymm.
	(OP_MMX): Use names_mm, names_xmm and names_ymm.
	(OP_XMM): Likewise.
	(OP_EM): Likewise.
	(OP_EMC): Likewise.
	(OP_MXC): Likewise.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_VexReg): Likewise.
	(OP_Vex_2src): Likewise.
	(OP_Vex_2src_1): Likewise.
	(OP_Vex_2src_2): Likewise.
	(OP_REG_VexI4): Likewise.

2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Update comments.

2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (rex_original): Removed.
	(ckprefix): Remove rex_original.
	(print_insn): Update comments.

2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>

	* Makefile.in: Regenerate.
	* configure: Regenerate.

2010-01-07  Doug Evans  <dje@sebabeach.org>

	* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

2010-01-06  Quentin Neill  <quentin.neill@amd.com>

	* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
	* i386-init.h: Regenerated.

2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>

	* arm-dis.c (print_insn): Fixed search for next symbol and data
	dumping condition, and the initial mapping symbol state.

2010-01-05  Doug Evans  <dje@sebabeach.org>

	* cgen-ibld.in: #include "cgen/basic-modes.h".
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

2010-01-04  Nick Clifton  <nickc@redhat.com>

	PR 11123
	* arm-dis.c (print_insn_coprocessor): Initialise value.

2010-01-04  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".

2010-01-02  Doug Evans  <dje@sebabeach.org>

	* cgen-asm.in: Update copyright year.
	* cgen-dis.in: Update copyright year.
	* cgen-ibld.in: Update copyright year.
	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.

For older changes see ChangeLog-2009
\f
Local Variables:
mode: change-log
left-margin: 8
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version-control: never
End:
Commit	Line	Data
9c9c98a5 NC	1	2010-04-22 Nick Clifton <nickc@redhat.com>
	2
	3	* po/opcodes.pot: Updated by the Translation project.
	4	* po/vi.po: Updated Vietnamese translation.
	5
f07af43e L	6	2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
	7
	8	* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
	9	bits in opcode.
	10
3d540e93 NC	11	2010-04-09 Nick Clifton <nickc@redhat.com>
	12
	13	* i386-dis.c (print_insn): Remove unused variable op.
	14	(OP_sI): Remove unused variable mask.
	15
397841b5 AM	16	2010-04-07 Alan Modra <amodra@gmail.com>
	17
	18	* configure: Regenerate.
	19
cee62821 PB	20	2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
	21
	22	* ppc-opc.c (RBOPT): New define.
	23	("dccci"): Enable for PPCA2. Make operands optional.
	24	("iccci"): Likewise. Do not deprecate for PPC476.
	25
accf4463 NC	26	2010-04-02 Masaki Muranaka <monaka@monami-software.com>
	27
	28	* cr16-opc.c (cr16_instruction): Fix typo in comment.
	29
40b36596 JM	30	2010-03-25 Joseph Myers <joseph@codesourcery.com>
	31
	32	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	33	* Makefile.in: Regenerate.
	34	* configure.in (bfd_tic6x_arch): New.
	35	* configure: Regenerate.
	36	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	37	(disassembler): Handle TI C6X.
	38	* tic6x-dis.c: New.
	39
1985c81c MF	40	2010-03-24 Mike Frysinger <vapier@gentoo.org>
	41
	42	* bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
	43
f66187fd JM	44	2010-03-23 Joseph Myers <joseph@codesourcery.com>
	45
	46	* dis-buf.c (buffer_read_memory): Give error for reading just
	47	before the start of memory.
	48
ce7d077e SP	49	2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
	50	Quentin Neill <quentin.neill@amd.com>
	51
	52	* i386-dis.c (OP_LWP_I): Removed.
	53	(reg_table): Do not use OP_LWP_I, use Iq.
	54	(OP_LWPCB_E): Remove use of names16.
	55	(OP_LWP_E): Same.
	56	* i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
	57	should not set the Vex.length bit.
	58	* i386-tbl.h: Regenerated.
	59
63d0fa4e AM	60	2010-02-25 Edmar Wienskoski <edmar@freescale.com>
	61
	62	* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
	63
c060226a NC	64	2010-02-24 Nick Clifton <nickc@redhat.com>
	65
	66	PR binutils/6773
	67	* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
	68	<prefix>asx. Replace <prefix>subaddx with <prefix>sax.
	69	(thumb32_opcodes): Likewise.
	70
ab7875de NC	71	2010-02-15 Nick Clifton <nickc@redhat.com>
	72
	73	* po/vi.po: Updated Vietnamese translation.
	74
fee1d3e8 DE	75	2010-02-12 Doug Evans <dje@sebabeach.org>
	76
	77	* lm32-opinst.c: Regenerate.
	78
37ec9240 DE	79	2010-02-11 Doug Evans <dje@sebabeach.org>
37ec9240 DE	80
9468ae89 DE	81	* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
	82	(print_address): Delete CGEN_PRINT_ADDRESS.
	83	* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
	84	* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
	85	* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
	86	* xc16x-dis.c, * xstormy16-dis.c: Regenerate.
	87
37ec9240 DE	88	* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
	89	* frv-desc.c, * frv-desc.h, * frv-opc.c,
	90	* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
	91	* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
	92	* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
	93	* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
	94	* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
	95	* mep-desc.c, * mep-desc.h, * mep-opc.c,
	96	* mt-desc.c, * mt-desc.h, * mt-opc.c,
	97	* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
	98	* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
	99	* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
	100
c75ef631 L	101	2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
	102
	103	* i386-dis.c: Update copyright.
	104	* i386-gen.c: Likewise.
	105	* i386-opc.h: Likewise.
	106	* i386-opc.tbl: Likewise.
	107
a683cc34 SP	108	2010-02-10 Quentin Neill <quentin.neill@amd.com>
	109	Sebastian Pop <sebastian.pop@amd.com>
	110
	111	* i386-dis.c (OP_EX_VexImmW): Reintroduced
	112	function to handle 5th imm8 operand.
	113	(PREFIX_VEX_3A48): Added.
	114	(PREFIX_VEX_3A49): Added.
	115	(VEX_W_3A48_P_2): Added.
	116	(VEX_W_3A49_P_2): Added.
	117	(prefix table): Added entries for PREFIX_VEX_3A48
	118	and PREFIX_VEX_3A49.
	119	(vex table): Added entries for VEX_W_3A48_P_2 and
	120	and VEX_W_3A49_P_2.
	121	* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
	122	for Vec_Imm4 operands.
	123	* i386-opc.h (enum): Added Vec_Imm4.
	124	(i386_operand_type): Added vec_imm4.
	125	* i386-opc.tbl: Add entries for vpermilp[ds].
	126	* i386-init.h: Regenerated.
	127	* i386-tbl.h: Regenerated.
	128
cdc51b07 RS	129	2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
	130
	131	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	132	and "pwr7". Move "a2" into alphabetical order.
	133
ce3d2015 AM	134	2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
	135
	136	* ppc-dis.c (ppc_opts): Add titan entry.
	137	* ppc-opc.c (TITAN, MULHW): Define.
	138	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
	139
68339fdf SP	140	2010-02-03 Quentin Neill <quentin.neill@amd.com>
	141
	142	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	143	to CPU_BDVER1_FLAGS
	144	* i386-init.h: Regenerated.
	145
f3d55a94 AG	146	2010-02-03 Anthony Green <green@moxielogic.com>
	147
	148	* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
	149	0x0f, and make 0x00 an illegal instruction.
	150
b0e28b39 DJ	151	2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
	152
	153	* opcodes/arm-dis.c (struct arm_private_data): New.
	154	(print_insn_coprocessor, print_insn_arm): Update to use struct
	155	arm_private_data.
	156	(is_mapping_symbol, get_map_sym_type): New functions.
	157	(get_sym_code_type): Check the symbol's section. Do not check
	158	mapping symbols.
	159	(print_insn): Default to disassembling ARM mode code. Check
	160	for mapping symbols separately from other symbols. Use
	161	struct arm_private_data.
	162
1c480963 L	163	2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
	164
	165	* i386-dis.c (EXVexWdqScalar): New.
	166	(vex_scalar_w_dq_mode): Likewise.
	167	(prefix_table): Update entries for PREFIX_VEX_3899,
	168	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	169	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	170	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	171	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	172	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	173	(OP_EX): Likewise.
	174
539f890d L	175	2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
	176
	177	* i386-dis.c (XMScalar): New.
	178	(EXdScalar): Likewise.
	179	(EXqScalar): Likewise.
	180	(EXqScalarS): Likewise.
	181	(VexScalar): Likewise.
	182	(EXdVexScalarS): Likewise.
	183	(EXqVexScalarS): Likewise.
	184	(XMVexScalar): Likewise.
	185	(scalar_mode): Likewise.
	186	(d_scalar_mode): Likewise.
	187	(d_scalar_swap_mode): Likewise.
	188	(q_scalar_mode): Likewise.
	189	(q_scalar_swap_mode): Likewise.
	190	(vex_scalar_mode): Likewise.
	191	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	192	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	193	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	194	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	195	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	196	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	197	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	198	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	199	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	200	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	201	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	202	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	203	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	204	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	205	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	206	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	207	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	208	VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
	209	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	210	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	211	q_scalar_mode, q_scalar_swap_mode.
	212	(OP_XMM): Handle scalar_mode.
	213	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	214	and q_scalar_swap_mode.
	215	(OP_VEX): Handle vex_scalar_mode.
	216
208b4d78 L	217	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	218
	219	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
	220
448b213a L	221	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	222
	223	* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
	224
47cf8fa0 L	225	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	226
	227	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
	228
592d1631 L	229	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	230
	231	* i386-dis.c (Bad_Opcode): New.
	232	(bad_opcode): Likewise.
	233	(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
	234	(dis386_twobyte): Likewise.
	235	(reg_table): Likewise.
	236	(prefix_table): Likewise.
	237	(x86_64_table): Likewise.
	238	(vex_len_table): Likewise.
	239	(vex_w_table): Likewise.
	240	(mod_table): Likewise.
	241	(rm_table): Likewise.
	242	(float_reg): Likewise.
	243	(reg_table): Remove trailing "(bad)" entries.
	244	(prefix_table): Likewise.
	245	(x86_64_table): Likewise.
	246	(vex_len_table): Likewise.
	247	(vex_w_table): Likewise.
	248	(mod_table): Likewise.
	249	(rm_table): Likewise.
	250	(get_valid_dis386): Handle bytemode 0.
	251
712366da L	252	2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
	253
	254	* i386-opc.h (VEXScalar): New.
	255
	256	* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
	257	instructions.
	258	* i386-tbl.h: Regenerated.
	259
706e8205	260	2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
73bb6729 L	261
	262	* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
	263
	264	* i386-opc.tbl: Add xsave64 and xrstor64.
	265	* i386-tbl.h: Regenerated.
	266
99ea83aa NC	267	2010-01-20 Nick Clifton <nickc@redhat.com>
	268
	269	PR 11170
	270	* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
	271	based post-indexed addressing.
	272
a6461c02 SP	273	2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
	274
	275	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	276	* i386-tbl.h: Regenerated.
	277
a2a7d12c L	278	2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
	279
	280	* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
	281	comments.
	282
b9733481 L	283	2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
	284
	285	* i386-dis.c (names_mm): New.
	286	(intel_names_mm): Likewise.
	287	(att_names_mm): Likewise.
	288	(names_xmm): Likewise.
	289	(intel_names_xmm): Likewise.
	290	(att_names_xmm): Likewise.
	291	(names_ymm): Likewise.
	292	(intel_names_ymm): Likewise.
	293	(att_names_ymm): Likewise.
	294	(print_insn): Set names_mm, names_xmm and names_ymm.
	295	(OP_MMX): Use names_mm, names_xmm and names_ymm.
	296	(OP_XMM): Likewise.
	297	(OP_EM): Likewise.
	298	(OP_EMC): Likewise.
	299	(OP_MXC): Likewise.
	300	(OP_EX): Likewise.
	301	(XMM_Fixup): Likewise.
	302	(OP_VEX): Likewise.
	303	(OP_EX_VexReg): Likewise.
	304	(OP_Vex_2src): Likewise.
	305	(OP_Vex_2src_1): Likewise.
	306	(OP_Vex_2src_2): Likewise.
	307	(OP_REG_VexI4): Likewise.
	308
5e6718e4 L	309	2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
	310
	311	* i386-dis.c (print_insn): Update comments.
	312
d869730d L	313	2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
	314
	315	* i386-dis.c (rex_original): Removed.
	316	(ckprefix): Remove rex_original.
	317	(print_insn): Update comments.
	318
3725885a RW	319	2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
	320
	321	* Makefile.in: Regenerate.
	322	* configure: Regenerate.
	323
b7cd1872 DE	324	2010-01-07 Doug Evans <dje@sebabeach.org>
	325
	326	* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
	327	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	328	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	329	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	330	* xstormy16-ibld.c: Regenerate.
	331
69dd9865 SP	332	2010-01-06 Quentin Neill <quentin.neill@amd.com>
	333
	334	* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
	335	* i386-init.h: Regenerated.
	336
e3e535bc NC	337	2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
	338
	339	* arm-dis.c (print_insn): Fixed search for next symbol and data
	340	dumping condition, and the initial mapping symbol state.
	341
fe8afbc4 DE	342	2010-01-05 Doug Evans <dje@sebabeach.org>
	343
	344	* cgen-ibld.in: #include "cgen/basic-modes.h".
	345	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	346	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	347	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	348	* xstormy16-ibld.c: Regenerate.
	349
2edcd244 NC	350	2010-01-04 Nick Clifton <nickc@redhat.com>
	351
	352	PR 11123
	353	* arm-dis.c (print_insn_coprocessor): Initialise value.
	354
0dc93057 AM	355	2010-01-04 Edmar Wienskoski <edmar@freescale.com>
	356
	357	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
	358
05994f45 DE	359	2010-01-02 Doug Evans <dje@sebabeach.org>
	360
	361	* cgen-asm.in: Update copyright year.
	362	* cgen-dis.in: Update copyright year.
	363	* cgen-ibld.in: Update copyright year.
	364	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	365	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	366	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	367	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	368	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	369	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	370	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	371	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	372	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	373	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	374	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	375	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	376	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	377	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	378	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	379	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	380	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	381	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	382	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	383	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	384	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f	385
43ecc30f	386	For older changes see ChangeLog-2009
252b5132 RH	387	\f
252b5132 RH	388	Local Variables:
2f6d2f85 NC	389	mode: change-log
	390	left-margin: 8
	391	fill-column: 74
252b5132 RH	392	version-control: never
252b5132 RH	393	End: