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7102e95e
AS		 12010-07-03 Andreas Schwab <schwab@linux-m68k.org>
2
3 * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
4 ppc_cpu_t before inverting.
5
bdc70b4a
AM		 62010-07-03 Alan Modra <amodra@gmail.com>
7
8 * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
9 * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
10 (PPC64, MFDEC2): Update.
11 (NON32, NO371): Define.
12 (powerpc_opcode): Update to not use old opcode flags, and avoid
13 -m601 duplicates.
14
21375995
DD		 152010-07-03 DJ Delorie <dj@delorie.com>
16
17 * m32c-ibld.c: Regenerate.
18
81a0b7e2
AM		 192010-07-03 Alan Modra <amodra@gmail.com>
20
21 * ppc-opc.c (PWR2COM): Define.
22 (PPCPWR2): Add PPC_OPCODE_COMMON.
23 (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
24 "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
25 "rac" from -mcom.
26
c7b8aa3a
L		 272010-07-01 H.J. Lu <hongjiu.lu@intel.com>
28
29 AVX Programming Reference (June, 2010)
30 * i386-dis.c (PREFIX_0FAE_REG_0): New.
31 (PREFIX_0FAE_REG_1): Likewise.
32 (PREFIX_0FAE_REG_2): Likewise.
33 (PREFIX_0FAE_REG_3): Likewise.
34 (PREFIX_VEX_3813): Likewise.
35 (PREFIX_VEX_3A1D): Likewise.
36 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
37 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
38 PREFIX_VEX_3A1D.
39 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
40 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
41 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
42
43 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
44 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
45 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
46
47 * i386-opc.h (CpuXsaveopt): New.
48 (CpuFSGSBase):Likewise.
49 (CpuRdRnd): Likewise.
50 (CpuF16C): Likewise.
51 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
52 cpuf16c.
53
54 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
55 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
a00eb5e8
L		 56 * i386-init.h: Regenerated.
57 * i386-tbl.h: Likewise.
c7b8aa3a 58
09a8ad8d
AM		 592010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
60
61 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
62 and mtocrf on EFS.
63
360cfc9c
AM		 642010-06-29 Alan Modra <amodra@gmail.com>
65
66 * maxq-dis.c: Delete file.
67 * Makefile.am: Remove references to maxq.
68 * configure.in: Likewise.
69 * disassemble.c: Likewise.
70 * Makefile.in: Regenerate.
71 * configure: Regenerate.
72 * po/POTFILES.in: Regenerate.
73
dc898d5e
AM		 742010-06-29 Alan Modra <amodra@gmail.com>
75
76 * mep-dis.c: Regenerate.
77
8e560766
MGD		 782010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
79
80 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
81
c7e2358a
AM		 822010-06-27 Alan Modra <amodra@gmail.com>
83
84 * arc-dis.c (arc_sprintf): Delete set but unused variables.
85 (decodeInstr): Likewise.
86 * dlx-dis.c (print_insn_dlx): Likewise.
87 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
88 * maxq-dis.c (check_move, print_insn): Likewise.
89 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
90 * msp430-dis.c (msp430_branchinstr): Likewise.
91 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
92 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
93 * sparc-dis.c (print_insn_sparc): Likewise.
94 * fr30-asm.c: Regenerate.
95 * frv-asm.c: Regenerate.
96 * ip2k-asm.c: Regenerate.
97 * iq2000-asm.c: Regenerate.
98 * lm32-asm.c: Regenerate.
99 * m32c-asm.c: Regenerate.
100 * m32r-asm.c: Regenerate.
101 * mep-asm.c: Regenerate.
102 * mt-asm.c: Regenerate.
103 * openrisc-asm.c: Regenerate.
104 * xc16x-asm.c: Regenerate.
105 * xstormy16-asm.c: Regenerate.
106
6ffe3d99
NC		 1072010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
108
109 PR gas/11673
110 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
111
09ec0d17
NC		 1122010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
113
114 PR binutils/11676
115 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
116
e01d869a
AM		 1172010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
118
119 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
120 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
121 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
122 touch floating point regs and are enabled by COM, PPC or PPCCOM.
123 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
124 Treat lwsync as msync on e500.
125
1f4e4950
MGD		 1262010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
127
128 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
129
9d82ec38
MGD		 1302010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
131
e01d869a 132 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
9d82ec38
MGD		 133 constants is the same on 32-bit and 64-bit hosts.
134
c3a6ea62 1352010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
d8b24b95
NC		 136
137 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
138 .short directives so that they can be reassembled.
139
9db8dccb
CM		 1402010-05-26 Catherine Moore <clm@codesourcery.com>
141 David Ung <davidu@mips.com>
142
143 * mips-opc.c: Change membership to I1 for instructions ssnop and
144 ehb.
145
dfc8cf43
L		 1462010-05-26 H.J. Lu <hongjiu.lu@intel.com>
147
148 * i386-dis.c (sib): New.
149 (get_sib): Likewise.
150 (print_insn): Call get_sib.
151 OP_E_memory): Use sib.
152
f79e2745
CM		 1532010-05-26 Catherine Moore <clm@codesoourcery.com>
154
155 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
156 * mips-opc.c (I16): Remove.
157 (mips_builtin_op): Reclassify jalx.
158
51b5d4a8
AM		 1592010-05-19 Alan Modra <amodra@gmail.com>
160
161 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
162 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
163
85d4ac0b
AM		 1642010-05-13 Alan Modra <amodra@gmail.com>
165
166 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
167
4547cb56
NC		 1682010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
169
170 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
171 format.
172 (print_insn_thumb16): Add support for new %W format.
173
6540b386
TG		 1742010-05-07 Tristan Gingold <gingold@adacore.com>
175
176 * Makefile.in: Regenerate with automake 1.11.1.
177 * aclocal.m4: Ditto.
178
3e01a7fd
NC		 1792010-05-05 Nick Clifton <nickc@redhat.com>
180
181 * po/es.po: Updated Spanish translation.
182
9c9c98a5
NC		 1832010-04-22 Nick Clifton <nickc@redhat.com>
184
185 * po/opcodes.pot: Updated by the Translation project.
186 * po/vi.po: Updated Vietnamese translation.
187
f07af43e
L		 1882010-04-16 H.J. Lu <hongjiu.lu@intel.com>
189
190 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
191 bits in opcode.
192
3d540e93
NC		 1932010-04-09 Nick Clifton <nickc@redhat.com>
194
195 * i386-dis.c (print_insn): Remove unused variable op.
196 (OP_sI): Remove unused variable mask.
197
397841b5
AM		 1982010-04-07 Alan Modra <amodra@gmail.com>
199
200 * configure: Regenerate.
201
cee62821
PB		 2022010-04-06 Peter Bergner <bergner@vnet.ibm.com>
203
204 * ppc-opc.c (RBOPT): New define.
205 ("dccci"): Enable for PPCA2. Make operands optional.
206 ("iccci"): Likewise. Do not deprecate for PPC476.
207
accf4463
NC		 2082010-04-02 Masaki Muranaka <monaka@monami-software.com>
209
210 * cr16-opc.c (cr16_instruction): Fix typo in comment.
211
40b36596
JM		 2122010-03-25 Joseph Myers <joseph@codesourcery.com>
213
214 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
215 * Makefile.in: Regenerate.
216 * configure.in (bfd_tic6x_arch): New.
217 * configure: Regenerate.
218 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
219 (disassembler): Handle TI C6X.
220 * tic6x-dis.c: New.
221
1985c81c
MF		 2222010-03-24 Mike Frysinger <vapier@gentoo.org>
223
224 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
225
f66187fd
JM		 2262010-03-23 Joseph Myers <joseph@codesourcery.com>
227
228 * dis-buf.c (buffer_read_memory): Give error for reading just
229 before the start of memory.
230
ce7d077e
SP		 2312010-03-22 Sebastian Pop <sebastian.pop@amd.com>
232 Quentin Neill <quentin.neill@amd.com>
233
234 * i386-dis.c (OP_LWP_I): Removed.
235 (reg_table): Do not use OP_LWP_I, use Iq.
236 (OP_LWPCB_E): Remove use of names16.
237 (OP_LWP_E): Same.
238 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
239 should not set the Vex.length bit.
240 * i386-tbl.h: Regenerated.
241
63d0fa4e
AM		 2422010-02-25 Edmar Wienskoski <edmar@freescale.com>
243
244 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
245
c060226a
NC		 2462010-02-24 Nick Clifton <nickc@redhat.com>
247
248 PR binutils/6773
249 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
250 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
251 (thumb32_opcodes): Likewise.
252
ab7875de
NC		 2532010-02-15 Nick Clifton <nickc@redhat.com>
254
255 * po/vi.po: Updated Vietnamese translation.
256
fee1d3e8
DE		 2572010-02-12 Doug Evans <dje@sebabeach.org>
258
259 * lm32-opinst.c: Regenerate.
260
37ec9240
DE		 2612010-02-11 Doug Evans <dje@sebabeach.org>
262
9468ae89
DE		 263 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
264 (print_address): Delete CGEN_PRINT_ADDRESS.
265 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
266 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
267 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
268 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
269
37ec9240
DE		 270 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
271 * frv-desc.c, * frv-desc.h, * frv-opc.c,
272 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
273 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
274 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
275 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
276 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
277 * mep-desc.c, * mep-desc.h, * mep-opc.c,
278 * mt-desc.c, * mt-desc.h, * mt-opc.c,
279 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
280 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
281 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
282
c75ef631
L		 2832010-02-11 H.J. Lu <hongjiu.lu@intel.com>
284
285 * i386-dis.c: Update copyright.
286 * i386-gen.c: Likewise.
287 * i386-opc.h: Likewise.
288 * i386-opc.tbl: Likewise.
289
a683cc34
SP		 2902010-02-10 Quentin Neill <quentin.neill@amd.com>
291 Sebastian Pop <sebastian.pop@amd.com>
292
293 * i386-dis.c (OP_EX_VexImmW): Reintroduced
294 function to handle 5th imm8 operand.
295 (PREFIX_VEX_3A48): Added.
296 (PREFIX_VEX_3A49): Added.
297 (VEX_W_3A48_P_2): Added.
298 (VEX_W_3A49_P_2): Added.
299 (prefix table): Added entries for PREFIX_VEX_3A48
300 and PREFIX_VEX_3A49.
301 (vex table): Added entries for VEX_W_3A48_P_2 and
302 and VEX_W_3A49_P_2.
303 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
304 for Vec_Imm4 operands.
305 * i386-opc.h (enum): Added Vec_Imm4.
306 (i386_operand_type): Added vec_imm4.
307 * i386-opc.tbl: Add entries for vpermilp[ds].
308 * i386-init.h: Regenerated.
309 * i386-tbl.h: Regenerated.
310
cdc51b07
RS		 3112010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
312
313 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
314 and "pwr7". Move "a2" into alphabetical order.
315
ce3d2015
AM		 3162010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
317
318 * ppc-dis.c (ppc_opts): Add titan entry.
319 * ppc-opc.c (TITAN, MULHW): Define.
320 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
321
68339fdf
SP		 3222010-02-03 Quentin Neill <quentin.neill@amd.com>
323
324 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
325 to CPU_BDVER1_FLAGS
326 * i386-init.h: Regenerated.
327
f3d55a94
AG		 3282010-02-03 Anthony Green <green@moxielogic.com>
329
330 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
331 0x0f, and make 0x00 an illegal instruction.
332
b0e28b39
DJ		 3332010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
334
335 * opcodes/arm-dis.c (struct arm_private_data): New.
336 (print_insn_coprocessor, print_insn_arm): Update to use struct
337 arm_private_data.
338 (is_mapping_symbol, get_map_sym_type): New functions.
339 (get_sym_code_type): Check the symbol's section. Do not check
340 mapping symbols.
341 (print_insn): Default to disassembling ARM mode code. Check
342 for mapping symbols separately from other symbols. Use
343 struct arm_private_data.
344
1c480963
L		 3452010-01-28 H.J. Lu <hongjiu.lu@intel.com>
346
347 * i386-dis.c (EXVexWdqScalar): New.
348 (vex_scalar_w_dq_mode): Likewise.
349 (prefix_table): Update entries for PREFIX_VEX_3899,
350 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
351 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
352 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
353 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
354 (intel_operand_size): Handle vex_scalar_w_dq_mode.
355 (OP_EX): Likewise.
356
539f890d
L		 3572010-01-27 H.J. Lu <hongjiu.lu@intel.com>
358
359 * i386-dis.c (XMScalar): New.
360 (EXdScalar): Likewise.
361 (EXqScalar): Likewise.
362 (EXqScalarS): Likewise.
363 (VexScalar): Likewise.
364 (EXdVexScalarS): Likewise.
365 (EXqVexScalarS): Likewise.
366 (XMVexScalar): Likewise.
367 (scalar_mode): Likewise.
368 (d_scalar_mode): Likewise.
369 (d_scalar_swap_mode): Likewise.
370 (q_scalar_mode): Likewise.
371 (q_scalar_swap_mode): Likewise.
372 (vex_scalar_mode): Likewise.
373 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
374 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
375 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
376 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
377 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
378 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
379 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
380 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
381 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
382 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
383 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
384 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
385 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
386 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
387 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
388 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
389 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
390 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
391 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
392 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
393 q_scalar_mode, q_scalar_swap_mode.
394 (OP_XMM): Handle scalar_mode.
395 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
396 and q_scalar_swap_mode.
397 (OP_VEX): Handle vex_scalar_mode.
398
208b4d78
L		 3992010-01-24 H.J. Lu <hongjiu.lu@intel.com>
400
401 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
402
448b213a
L		 4032010-01-24 H.J. Lu <hongjiu.lu@intel.com>
404
405 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
406
47cf8fa0
L		 4072010-01-24 H.J. Lu <hongjiu.lu@intel.com>
408
409 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
410
592d1631
L		 4112010-01-24 H.J. Lu <hongjiu.lu@intel.com>
412
413 * i386-dis.c (Bad_Opcode): New.
414 (bad_opcode): Likewise.
415 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
416 (dis386_twobyte): Likewise.
417 (reg_table): Likewise.
418 (prefix_table): Likewise.
419 (x86_64_table): Likewise.
420 (vex_len_table): Likewise.
421 (vex_w_table): Likewise.
422 (mod_table): Likewise.
423 (rm_table): Likewise.
424 (float_reg): Likewise.
425 (reg_table): Remove trailing "(bad)" entries.
426 (prefix_table): Likewise.
427 (x86_64_table): Likewise.
428 (vex_len_table): Likewise.
429 (vex_w_table): Likewise.
430 (mod_table): Likewise.
431 (rm_table): Likewise.
432 (get_valid_dis386): Handle bytemode 0.
433
712366da
L		 4342010-01-23 H.J. Lu <hongjiu.lu@intel.com>
435
436 * i386-opc.h (VEXScalar): New.
437
438 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
439 instructions.
440 * i386-tbl.h: Regenerated.
441
706e8205 4422010-01-21 H.J. Lu <hongjiu.lu@intel.com>
73bb6729
L		 443
444 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
445
446 * i386-opc.tbl: Add xsave64 and xrstor64.
447 * i386-tbl.h: Regenerated.
448
99ea83aa
NC		 4492010-01-20 Nick Clifton <nickc@redhat.com>
450
451 PR 11170
452 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
453 based post-indexed addressing.
454
a6461c02
SP		 4552010-01-15 Sebastian Pop <sebastian.pop@amd.com>
456
457 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
458 * i386-tbl.h: Regenerated.
459
a2a7d12c
L		 4602010-01-14 H.J. Lu <hongjiu.lu@intel.com>
461
462 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
463 comments.
464
b9733481
L		 4652010-01-14 H.J. Lu <hongjiu.lu@intel.com>
466
467 * i386-dis.c (names_mm): New.
468 (intel_names_mm): Likewise.
469 (att_names_mm): Likewise.
470 (names_xmm): Likewise.
471 (intel_names_xmm): Likewise.
472 (att_names_xmm): Likewise.
473 (names_ymm): Likewise.
474 (intel_names_ymm): Likewise.
475 (att_names_ymm): Likewise.
476 (print_insn): Set names_mm, names_xmm and names_ymm.
477 (OP_MMX): Use names_mm, names_xmm and names_ymm.
478 (OP_XMM): Likewise.
479 (OP_EM): Likewise.
480 (OP_EMC): Likewise.
481 (OP_MXC): Likewise.
482 (OP_EX): Likewise.
483 (XMM_Fixup): Likewise.
484 (OP_VEX): Likewise.
485 (OP_EX_VexReg): Likewise.
486 (OP_Vex_2src): Likewise.
487 (OP_Vex_2src_1): Likewise.
488 (OP_Vex_2src_2): Likewise.
489 (OP_REG_VexI4): Likewise.
490
5e6718e4
L		 4912010-01-13 H.J. Lu <hongjiu.lu@intel.com>
492
493 * i386-dis.c (print_insn): Update comments.
494
d869730d
L		 4952010-01-12 H.J. Lu <hongjiu.lu@intel.com>
496
497 * i386-dis.c (rex_original): Removed.
498 (ckprefix): Remove rex_original.
499 (print_insn): Update comments.
500
3725885a
RW		 5012010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
502
503 * Makefile.in: Regenerate.
504 * configure: Regenerate.
505
b7cd1872
DE		 5062010-01-07 Doug Evans <dje@sebabeach.org>
507
508 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
509 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
510 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
511 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
512 * xstormy16-ibld.c: Regenerate.
513
69dd9865
SP		 5142010-01-06 Quentin Neill <quentin.neill@amd.com>
515
516 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
517 * i386-init.h: Regenerated.
518
e3e535bc
NC		 5192010-01-06 Daniel Gutson <dgutson@codesourcery.com>
520
521 * arm-dis.c (print_insn): Fixed search for next symbol and data
522 dumping condition, and the initial mapping symbol state.
523
fe8afbc4
DE		 5242010-01-05 Doug Evans <dje@sebabeach.org>
525
526 * cgen-ibld.in: #include "cgen/basic-modes.h".
527 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
528 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
529 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
530 * xstormy16-ibld.c: Regenerate.
531
2edcd244
NC		 5322010-01-04 Nick Clifton <nickc@redhat.com>
533
534 PR 11123
535 * arm-dis.c (print_insn_coprocessor): Initialise value.
536
0dc93057
AM		 5372010-01-04 Edmar Wienskoski <edmar@freescale.com>
538
539 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
540
05994f45
DE		 5412010-01-02 Doug Evans <dje@sebabeach.org>
542
543 * cgen-asm.in: Update copyright year.
544 * cgen-dis.in: Update copyright year.
545 * cgen-ibld.in: Update copyright year.
546 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
547 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
548 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
549 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
550 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
551 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
552 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
553 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
554 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
555 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
556 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
557 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
558 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
559 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
560 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
561 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
562 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
563 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
564 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
565 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
566 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f 567
43ecc30f 568For older changes see ChangeLog-2009
252b5132
RH		 569\f
570Local Variables:
2f6d2f85
NC		 571mode: change-log
572left-margin: 8
573fill-column: 74
252b5132
RH		 574version-control: never
575End:
GDB Binutils - Deliverables
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