Remove support for the (deprecated) openrisc and or32 configurations and replace
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12014-04-22 Christian Svensson <blue@cmd.nu>
2
3 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
4 * configure.in: Likewise.
5 * disassemble.c: Likewise.
6 * or1k-asm.c: New file.
7 * or1k-desc.c: New file.
8 * or1k-desc.h: New file.
9 * or1k-dis.c: New file.
10 * or1k-ibld.c: New file.
11 * or1k-opc.c: New file.
12 * or1k-opc.h: New file.
13 * or1k-opinst.c: New file.
14 * Makefile.in: Regenerate.
15 * configure: Regenerate.
16 * openrisc-asm.c: Delete.
17 * openrisc-desc.c: Delete.
18 * openrisc-desc.h: Delete.
19 * openrisc-dis.c: Delete.
20 * openrisc-ibld.c: Delete.
21 * openrisc-opc.c: Delete.
22 * openrisc-opc.h: Delete.
23 * or32-dis.c: Delete.
24 * or32-opc.c: Delete.
25
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262014-04-04 Ilya Tocar <ilya.tocar@intel.com>
27
28 * i386-dis.c (rm_table): Add encls, enclu.
29 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
30 (cpu_flags): Add CpuSE1.
31 * i386-opc.h (enum): Add CpuSE1.
32 (i386_cpu_flags): Add cpuse1.
33 * i386-opc.tbl: Add encls, enclu.
34 * i386-init.h: Regenerated.
35 * i386-tbl.h: Likewise.
36
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372014-04-02 Anthony Green <green@moxielogic.com>
38
39 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
40 instructions, sex.b and sex.s.
41
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422014-03-26 Jiong Wang <jiong.wang@arm.com>
43
44 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
45 instructions.
46
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472014-03-20 Ilya Tocar <ilya.tocar@intel.com>
48
49 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
50 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
51 vscatterqps.
52 * i386-tbl.h: Regenerate.
53
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542014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
55
56 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
57 %hstick_enable added.
58
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592014-03-19 Nick Clifton <nickc@redhat.com>
60
61 * rx-decode.opc (bwl): Allow for bogus instructions with a size
62 field of 3.
b41c812c 63 (sbwl, ubwl, SCALE): Likewise.
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64 * rx-decode.c: Regenerate.
65
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662014-03-12 Alan Modra <amodra@gmail.com>
67
68 * Makefile.in: Regenerate.
69
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702014-03-05 Alan Modra <amodra@gmail.com>
71
72 Update copyright years.
73
cd0c81e9 742014-03-04 Heiher <r@hev.cc>
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75
76 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
77
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782014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
79
80 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
81 so that they come after the Loongson extensions.
82
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832014-03-03 Alan Modra <amodra@gmail.com>
84
85 * i386-gen.c (process_copyright): Emit copyright notice on one line.
86
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872014-02-28 Alan Modra <amodra@gmail.com>
88
89 * msp430-decode.c: Regenerate.
90
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912014-02-27 Jiong Wang <jiong.wang@arm.com>
92
93 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
94 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
95
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962014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
97
98 * aarch64-opc.c (print_register_offset_address): Call
99 get_int_reg_name to prepare the register name.
100
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1012014-02-25 Ilya Tocar <ilya.tocar@intel.com>
102
103 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
104 * i386-tbl.h: Regenerate.
105
1062014-02-20 Ilya Tocar <ilya.tocar@intel.com>
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107
108 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
109 (cpu_flags): Add CpuPREFETCHWT1.
110 * i386-init.h: Regenerate.
111 * i386-opc.h (CpuPREFETCHWT1): New.
112 (i386_cpu_flags): Add cpuprefetchwt1.
113 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
114 * i386-tbl.h: Regenerate.
115
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1162014-02-20 Ilya Tocar <ilya.tocar@intel.com>
117
118 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
119 to CpuAVX512F.
120 * i386-tbl.h: Regenerate.
121
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1222014-02-19 H.J. Lu <hongjiu.lu@intel.com>
123
124 * i386-gen.c (output_cpu_flags): Don't output trailing space.
125 (output_opcode_modifier): Likewise.
126 (output_operand_type): Likewise.
127 * i386-init.h: Regenerated.
128 * i386-tbl.h: Likewise.
129
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1302014-02-12 Ilya Tocar <ilya.tocar@intel.com>
131
132 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
133 MOD_0FC7_REG_5.
134 (PREFIX enum): Add PREFIX_0FAE_REG_7.
135 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
136 (prefix_table): Add clflusopt.
137 (mod_table): Add xrstors, xsavec, xsaves.
138 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
139 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
140 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
141 * i386-init.h: Regenerate.
142 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
143 xsaves64, xsavec, xsavec64.
144 * i386-tbl.h: Regenerate.
145
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1462014-02-10 Alan Modra <amodra@gmail.com>
147
148 * po/POTFILES.in: Regenerate.
149 * po/opcodes.pot: Regenerate.
150
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1512014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
152 Jan Beulich <jbeulich@suse.com>
153
154 PR binutils/16490
155 * i386-dis.c (OP_E_memory): Fix shift computation for
156 vex_vsib_q_w_dq_mode.
157
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1582014-01-09 Bradley Nelson <bradnelson@google.com>
159 Roland McGrath <mcgrathr@google.com>
160
161 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
162 last_rex_prefix is -1.
163
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1642014-01-08 H.J. Lu <hongjiu.lu@intel.com>
165
166 * i386-gen.c (process_copyright): Update copyright year to 2014.
167
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1682014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
169
170 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
171
5fb776a6 172For older changes see ChangeLog-2013
252b5132 173\f
5fb776a6 174Copyright (C) 2014 Free Software Foundation, Inc.
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175
176Copying and distribution of this file, with or without modification,
177are permitted in any medium without royalty provided the copyright
178notice and this notice are preserved.
179
252b5132 180Local Variables:
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181mode: change-log
182left-margin: 8
183fill-column: 74
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184version-control: never
185End:
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