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Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
7f399153
L		 12009-12-16 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
4 Vex0F3A, XOP08, XOP09 and XOP0A. Add VexOpcode.
5
6 * i386-opc.h (Vex0F): Removed.
7 (Vex0F38): Likewise.
8 (Vex0F3A): Likewise.
9 (VexOpcode): New.
10 (VEX0F): Likewise.
11 (VEX0F38): Likewise.
12 (VEX0F3A): Likewise.
13 (XOP08): Defined as a macro.
14 (XOP09): Likewise.
15 (XOP0A): Likewise.
16 (i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
17 xop09 and xop0a. Add vexopcode.
18
19 * i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
20 VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
21 XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
22 * i386-tbl.h: Regenerated.
23
8c43a48b
L		 242009-12-15 H.J. Lu <hongjiu.lu@intel.com>
25
26 * i386-opc.h (VEX2SOURCES): Renamed to ...
27 (XOP2SOURCES): This.
28
8cd7925b
L		 292009-12-15 H.J. Lu <hongjiu.lu@intel.com>
30
31 * i386-gen.c (opcode_modifiers): Remove Vex3Sources and
32 Vex2Sources. Add VexSources.
33
25ac7f26 34 * i386-opc.h (Vex2Sources): Removed.
8cd7925b
L		 35 (Vex3Sources): Likewise.
36 (VEX2SOURCES): New.
37 (VEX3SOURCES): Likewise.
38 (VexSources): Likewise.
39 (i386_opcode_modifier): Remove vex2sources and vex3sources.
40 Add vexsources.
41
42 * i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
43 Vex3Sourceswith VexSources=2.
44 * i386-tbl.h: Regenerated.
45
1ef99a7b
L		 462009-12-15 H.J. Lu <hongjiu.lu@intel.com>
47
48 * i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add
49 VexW.
50
51 * i386-opc.h (VexW0): Removed.
52 (VexW1): Likewise.
53 (VEXW0): New.
54 (VEXW1): Likewise.
55 (VexW): Likewise.
56 (i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw.
57
58 * i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
59 Vex=2.
8cd7925b 60 * i386-tbl.h: Regenerated.
1ef99a7b 61
bcf2684f
L		 622009-12-15 H.J. Lu <hongjiu.lu@intel.com>
63
64 * i386-dis.c (VEX_W_3818_P_2_M_0): New.
65 (vex_w_table): Add VEX_W_3818_P_2_M_0.
66 (mod_table): Use VEX_W_3818_P_2_M_0.
67
a179a9fd
L		 682009-12-15 H.J. Lu <hongjiu.lu@intel.com>
69
70 * i386-dis.c (vex_w_table): Reformat.
71
53aa04a0
L		 722009-12-15 H.J. Lu <hongjiu.lu@intel.com>
73
74 * i386-dis.c (VEX_W_382X_P_2_M_0): New.
75 (vex_w_table): Add VEX_W_382X_P_2_M_0.
76 (mod_table): Use VEX_W_382X_P_2_M_0.
77
efdb52b7
L		 782009-12-15 H.J. Lu <hongjiu.lu@intel.com>
79
80 * i386-dis.c (vex_w_table): Reformat.
81
9e30b8e0
L		 822009-12-15 H.J. Lu <hongjiu.lu@intel.com>
83
84 * i386-dis.c (USE_VEX_W_TABLE): New.
85 (VEX_W_TABLE): Likewise.
86 (VEX_W_XXX): Likewise.
87 (vex_w_table): Likewise.
88 (prefix_table): Use VEX_W_XXX.
89 (vex_table): Likewise.
90 (vex_len_table): Likewise.
91 (mod_table): Likewise.
92 (get_valid_dis386): Handle USE_VEX_W_TABLE.
93
94 * i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit
95 isn't used.
96 * i386-tbl.h: Regenerated.
97
e3c58833
L		 982009-12-15 H.J. Lu <hongjiu.lu@intel.com>
99
100 * i386-opc.h (VEX128): New.
101 (VEX256): Likewise.
102
4c807e72
L		 1032009-12-14 H.J. Lu <hongjiu.lu@intel.com>
104
105 * i386-dis.c (vex_len_table): Reformat.
106
976f1fde
L		 1072009-12-14 H.J. Lu <hongjiu.lu@intel.com>
108
109 * i386-dis.c (MOD_VEX_51): Renamed to ...
110 (MOD_VEX_50): This.
111 (vex_table): Updated.
112 (mod_table): Likewise.
113
ab8e2090
NC		 1142009-12-14 Nick Clifton <nickc@redhat.com>
115
116 PR binutils/10924
117 * arm-dis.c (arm_opcodes): Specify %R in cases where using r15
118 results in unpredictable behaviour.
119 (print_insn_arm): Handle %R.
120
759a05ce
L		 1212009-12-11 H.J. Lu <hongjiu.lu@intel.com>
122
123 * i386-dis.c (get_valid_dis386): Set vex.w to 0 for VEX C5
124 prefix.
125 (print_insn): Don't set vex.w here.
126
5639ff87
L		 1272009-12-11 H.J. Lu <hongjiu.lu@intel.com>
128
129 * i386-dis.c (print_insn): Set vex.w to 0.
130
02e647f9
SP		 1312009-12-11 Quentin Neill <quentin.neill@amd.com>
132
133 * i386-dis.c (get_vex_imm8): Extend logic to apply in all cases,
134 to avoid fetching ahead for the immediate bytes when OP_E_memory
135 has already been called. Fix indentation.
136
91d6fa6a
NC		 1372009-12-11 Nick Clifton <nickc@redhat.com>
138
139 * Makefile.in: Regenerate.
140 * configure: Regenerate.
141 * arm-dis.c: Fix shadowed variable warnings.
142 * cgen-opc.c: Likewise.
143 * cr16-dis.c: Likewise.
144 * crx-dis.c: Likewise.
145 * d30v-dis.c: Likewise.
146 * fr30-dis.c: Likewise.
147 * frv-opc.c: Likewise.
148 * h8500-dis.c: Likewise.
149 * i386-dis.c: Likewise.
150 * i960-dis.c: Likewise.
151 * ia64-gen.c: Likewise.
152 * ia64-opc.c: Likewise.
153 * m32c-asm.c: Likewise.
154 * m32c-dis.c: Likewise.
155 * m68k-dis.c: Likewise.
156 * maxq-dis.c: Likewise.
157 * mcore-dis.c: Likewise.
158 * mep-asm.c: Likewise.
159 * microblaze-dis.c: Likewise.
160 * mmix-dis.c: Likewise.
161 * ns32k-dis.c: Likewise.
162 * or32-opc.c: Likewise.
163 * s390-dis.c: Likewise.
164 * sh64-dis.c: Likewise.
165 * spu-dis.c: Likewise.
166 * tic30-dis.c: Likewise.
167
07a28fab
NC		 1682009-12-09 Nick Clifton <nickc@redhat.com>
169
170 PR 10924
171 * arm-dis.c (print_insn_arm): Mark insns that use the PC in
172 post-indexed addressing as unpredictable.
173
eacc9c89
L		 1742009-12-03 H.J. Lu <hongjiu.lu@intel.com>
175
176 * i386-dis.c (FXSAVE_Fixup): New.
177 (FXSAVE): Likewise.
178 (mod_table): Use FXSAVE on fxsave and fxrstor.
179
180 * i386-opc.tbl: Add fxsave64 and fxrstor64.
181 * i386-tbl.h: Regenerated.
182
03ee1b7f
NC		 1832009-12-02 Nick Clifton <nickc@redhat.com>
184 Richard Earnshaw <rearnsha@arm.com>
185
186 PR gas/11013
187 * arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
188 and QDSUB.
189
ee9fd255
NC		 1902009-11-30 Massimo Ruo Roch <massimo.ruoroch@polito.it>
191
192 PR gas/11030
193 * m68k-opc.c (m68k_opcodes): Allow the STLDSR instruction on the
194 Coldfire ISA A+.
195
ccc5981b
SP		 1962009-11-17 Quentin Neill <quentin.neill@amd.com>
197 Sebastian Pop <sebastian.pop@amd.com>
198
199 * i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
200 decoding the second source operand from the immediate byte.
201 (OP_EX_VexW): Pass an extra integer to identify the second
202 and third source arguments.
203
18d0c96e
L		 2042009-11-19 H.J. Lu <hongjiu.lu@intel.com>
205
206 * i386-opc.tbl: Add IsLockable to cmpxch16b.
207 * i386-tbl.h: Regenerated.
208
945ee430
NC		 2092009-11-19 Nick Clifton <nickc@redhat.com>
210
211 PR binutils/10924
212 * arm-dis.c (print_insn_arm): Do not print an offset of zero when
213 decoding Immediaate Offset addressing.
214
41effecb
SP		 2152009-11-18 Sebastian Pop <sebastian.pop@amd.com>
216
217 PR binutils/10973
218 * i386-dis.c (get_vex_imm8): Do not increment codep.
219 Avoid incrementing bytes_before_imm when OP_E_memory
220 has already forwarded the codep pointer.
221 (OP_EX_VexW): Increment codep to skip mod/rm byte.
222
f0ae4a24
SP		 2232009-11-18 Sebastian Pop <sebastian.pop@amd.com>
224
225 * i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
226 (VEX_LEN_XOP_08_A1): Removed.
227 (xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
228 VEX_LEN_XOP_08_A1.
229 (vex_len_table): Same.
230 * i386-gen.c (CPU_CVT16_FLAGS): Removed.
231 (cpu_flags): Remove field for CpuCVT16.
232 * i386-opc.h (CpuCVT16): Removed.
233 (i386_cpu_flags): Remove bitfield cpucvt16.
234 (i386-opc.tbl): Remove CVT16 instructions.
235 * i386-init.h: Regenerated.
236 * i386-tbl.h: Regenerated.
237
5dd85c99
SP		 2382009-11-17 Sebastian Pop <sebastian.pop@amd.com>
239 Quentin Neill <quentin.neill@amd.com>
240
241 * i386-dis.c (OP_Vex_2src_1): New.
242 (OP_Vex_2src_2): New.
243 (Vex_2src_1): New.
244 (Vex_2src_2): New.
245 (XOP_08): Added.
246 (VEX_LEN_XOP_08_A0): Added.
247 (VEX_LEN_XOP_08_A1): Added.
248 (VEX_LEN_XOP_09_80): Added.
249 (VEX_LEN_XOP_09_81): Added.
250 (xop_table): Added an entry for XOP_08. Handle xop instructions.
251 (vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
252 VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
253 (get_valid_dis386): Handle XOP_08.
254 (OP_Vex_2src): New.
255 * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
256 (cpu_flags): Add CpuXOP and CpuCVT16.
257 (opcode_modifiers): Add XOP08, Vex2Sources.
258 * i386-opc.h (CpuXOP): Added.
259 (CpuCVT16): Added.
260 (i386_cpu_flags): Add cpuxop and cpucvt16.
261 (XOP08): Added.
262 (Vex2Sources): Added.
263 (i386_opcode_modifier): Add xop08, vex2sources.
264 * i386-opc.tbl: Add entries for XOP and CVT16 instructions.
265 * i386-init.h: Regenerated.
266 * i386-tbl.h: Regenerated.
267
aefd8a40
NC		 2682009-11-17 Nick Clifton <nickc@redhat.com>
269
270 PR binutils/10924
271 * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
272 instruction variants. Add pattern for MRS variant that was being
273 confused with CMP.
274 (arm_decode_shift): Place error message in a comment.
275 (print_insn_arm): Note that writing back to the PC is
276 unpredictable.
277 Only print 'p' variants of cmp/cmn/teq/tst instructions if
278 decoding for pre-V6 architectures.
279
0bb027fd
RR		 2802009-11-17 Edward Nevill <edward.nevill@arm.com>
281
282 * arm-dis.c (print_insn_thumb32): Handle undefined instruction.
283
c7e770a0
DE		 2842009-11-14 Doug Evans <dje@sebabeach.org>
285
286 * Makefile.am (stamp-xc16x): Use ../cpu/xc16x.cpu instead of
287 ../cgen/cpu.
288 * Makefile.in: Regenerate.
289
8b3f93e7
L		 2902009-11-13 H.J. Lu <hongjiu.lu@intel.com>
291
292 * i386-dis.c (OP_E_extended): Removed.
293
2a70cca4
L		 2942009-11-13 H.J. Lu <hongjiu.lu@intel.com>
295
296 * i386-dis.c (print_insn): Check rex_ignored.
297
f16cd0d5
L		 2982009-11-13 H.J. Lu <hongjiu.lu@intel.com>
299
300 * i386-dis.c (ckprefix): Updated to return 0 if number of
301 prefixes > 14 and record the last position for each prefix.
302 (lock_prefix): Removed.
303 (data_prefix): Likewise.
304 (addr_prefix): Likewise.
305 (repz_prefix): Likewise.
306 (repnz_prefix): Likewise.
307 (last_lock_prefix): New.
308 (last_repz_prefix): Likewise.
309 (last_repnz_prefix): Likewise.
310 (last_data_prefix): Likewise.
311 (last_addr_prefix): Likewise.
312 (last_rex_prefix): Likewise.
313 (last_seg_prefix): Likewise.
314 (MAX_CODE_LENGTH): Likewise.
315 (ADDR16_PREFIX): Likewise.
316 (ADDR32_PREFIX): Likewise.
317 (DATA16_PREFIX): Likewise.
318 (DATA32_PREFIX): Likewise.
319 (REP_PREFIX): Likewise.
320 (seg_prefix): Likewise.
321 (all_prefixes): Change size to MAX_CODE_LENGTH - 1.
322 (prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
323 DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
324 (get_valid_dis386): Updated.
325 (OP_C): Likewise.
326 (OP_Monitor): Likewise.
327 (REP_Fixup): Likewise.
328 (print_insn): Display all prefixes.
329 (putop): Set PREFIX_DATA on used_prefixes only if it is used.
330 (intel_operand_size): Likewise.
331 (OP_E_register): Likewise.
332 (OP_G): Likewise.
333 (OP_REG): Likewise.
334 (OP_IMREG): Likewise.
335 (OP_I): Likewise.
336 (OP_I64): Likewise.
337 (OP_sI): Likewise.
338 (CRC32_Fixup): Likewise.
339 (MOVBE_Fixup): Likewise.
340 (OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
341 in 16bit mode.
342 (OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
343 used_prefixes only if it is used.
344
20efc689
L		 3452009-11-12 H.J. Lu <hongjiu.lu@intel.com>
346
347 * i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
348 or, sbb, sub, xor and xchg with register only operands.
349 * i386-tbl.h: Regenerated.
350
c32fa91d
L		 3512009-11-12 H.J. Lu <hongjiu.lu@intel.com>
352
353 * i386-gen.c (opcode_modifiers): Add IsLockable.
354
355 * i386-opc.h (IsLockable): New.
356 (i386_opcode_modifier): Add islockable.
357
358 * i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
359 bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
360 xor, xadd and xchg.
361 * i386-tbl.h: Regenerated.
362
79862e45
DJ		 3632009-11-12 Daniel Jacobowitz <dan@codesourcery.com>
364
365 * arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove
366 generic coprocessor instructions for FPA loads and stores.
367 (print_insn_coprocessor): Remove %C support. Display address for
368 PC-relative offsets in %A.
369
f310f33d
L		 3702009-11-11 H.J. Lu <hongjiu.lu@intel.com>
371
372 * i386-dis.c (all_prefixes): New.
373 (ckprefix): Set all_prefixes.
374 (print_insn): Print all_prefixes instead of lock_prefix,
375 repz_prefix, repnz_prefix, addr_prefix and data_prefix.
376
c1e26897
NC		 3772009-11-11 Nick Clifton <nickc@redhat.com>
378
379 PR binutils/10924
380 * arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
381 (print_insn_arm): Extend %s format control code to check for
382 unpredictable addressing modes. Add support for %S format control
383 code which suppresses this check.
384 (W_BIT, I_BIT, U_BIT, P_BIT): New macros.
385 (WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
386 PRE_BIT_SET): New macros.
387 (print_insn_coprocessor): Use the new macros instead of magic
388 constants.
389 (print_arm_address): Likewise.
390 (pirnt_insn_arm): Likewise.
391 (print_insn_thumb32): Likewise.
392
41327c9d
NC		 3932009-11-11 Nick Clifton <nickc@redhat.com>
394
395 * po/id.po: Updated Indonesian translation.
396
0d999f33
MK		 3972009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com>
398
399 * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
400
c48244a5
SP		 4012009-11-06 Sebastian Pop <sebastian.pop@amd.com>
402
403 * i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
404 reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
405 B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
406 the xop_table.
407 (get_valid_dis386): Removed unused condition (from cut/n/paste) for
408 XOP instructions.
409
f88c9eb0
SP		 4102009-11-05 Sebastian Pop <sebastian.pop@amd.com>
411 Quentin Neill <quentin.neill@amd.com>
412
413 * opcodes/i386-dis.c (OP_LWPCB_E): New.
414 (OP_LWP_E): New.
415 (OP_LWP_I): New.
416 (USE_XOP_8F_TABLE): New.
417 (XOP_8F_TABLE): New.
418 (REG_XOP_LWPCB): New.
419 (REG_XOP_LWP): New.
420 (XOP_09): New.
421 (XOP_0A): New.
422 (reg_table): Redirect REG_8F to XOP_8F_TABLE.
423 Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
424 (xop_table): New.
425 (get_valid_dis386): Handle USE_XOP_8F_TABLE.
426 Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
427 to access to the vex_table.
428 (OP_LWPCB_E): New.
429 (OP_LWP_E): New.
430 (OP_LWP_I): New.
431 * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
432 (cpu_flags): Add CpuLWP.
433 (opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
434 * opcodes/i386-opc.h (CpuLWP): New.
435 (i386_cpu_flags): Add bit cpulwp.
436 (VexLWP): New.
437 (XOP09): New.
438 (XOP0A): New.
439 (i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
440 * opcodes/i386-opc.tbl (llwpcb): Added.
441 (lwpval): Added.
442 (lwpins): Added.
443
0d734b5d
DD		 4442009-11-04 DJ Delorie <dj@redhat.com>
445
446 * rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
447 (mvtcp, mvfcp, opecp): Remove.
448 * rx-decode.c: Regenerate.
449 * rx-dis.c (cpen): Remove.
450
d51b88d3
DE		 4512009-11-03 Doug Evans <dje@sebabeach.org>
452
453 * m32c-desc.c: Regenerate.
454 * mep-desc.c: Regenerate.
455
62f3b8c8
PB		 4562009-11-02 Paul Brook <paul@codesourcery.com>
457
458 * arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
459 Add VFPv4 instructions.
460
206c2556
L		 4612009-10-29 Sebastian Pop <sebastian.pop@amd.com>
462
463 * i386-dis.c (OP_VEX_FMA): Removed.
464 (VexFMA): Removed.
465 (Vex128FMA): Removed.
466 (prefix_table): First source operand of FMA4 insns is decoded
467 with Vex not with VexFMA.
468 (OP_EX_VexW): Second source operand is decoded with get_vex_imm8
469 when vex.w is set. Third source operand is decoded with
470
a2b2318d
AM		 4712009-10-27 Alan Modra <amodra@bigpond.net.au>
472
473 * Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.
474 * Makefile.in: Regenerate.
475 * po/POTFILES.in: Regenerate.
476
ac1e9eca
DE		 4772009-10-23 Doug Evans <dje@sebabeach.org>
478
479 * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h.
480 * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h.
481 * cgen-bitset.c: Update.
482 * fr30-desc.h: Regenerate.
483 * frv-desc.h: Regenerate.
484 * ip2k-desc.h: Regenerate.
485 * iq2000-desc.h: Regenerate.
486 * lm32-desc.h: Regenerate.
487 * m32c-desc.h: Regenerate.
488 * m32c-opc.h: Regenerate.
489 * m32r-desc.h: Regenerate.
490 * mep-desc.h: Regenerate.
491 * mt-desc.h: Regenerate.
492 * openrisc-desc.h: Regenerate.
493 * xc16x-desc.h: Regenerate.
494 * xstormy16-desc.h: Regenerate.
495
f282425e
DD		 4962009-10-22 DJ Delorie <dj@redhat.com>
497
498 * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
499 * rx-decode.c: Regenerated.
500
4b06377f
L		 5012009-10-20 H.J. Lu <hongjiu.lu@intel.com>
502
503 PR gas/10775
504 * i386-dis.c: Document LB, LS and LV macros.
505 (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
506 with the 64-bit displacement or immediate operand.
507 (putop): Handle LB, LS and LV macros.
508
cedb97b6
DE		 5092009-10-18 Doug Evans <dje@sebabeach.org>
510
511 * lm32-opinst.c: Regenerate.
512 * m32c-desc.c: Regenerate.
513 * m32r-opinst.c: Regenerate.
514 * openrisc-ibld.c: Regenerate.
515 * xc16x-desc.c: Regenerate.
516 * xc16x-desc.h: Regenerate.
517
d1119f7a
DE		 5182009-10-17 Doug Evans <dje@sebabeach.org>
519
520 * Makefile.am (CGEN_CPUS): Add iq2000, lm32.
521 (FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are
522 sorted alphabetically.
523 (stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen
524 stamp-* rules are sorted alphabetically.
525 * Makefile.in: Regenerate.
526
52a6c1fe
L		 5272009-10-16 H.J. Lu <hongjiu.lu@intel.com>
528
529 * i386-opc.h: Use enum instead of nested macros.
530
3873ba12
L		 5312009-10-16 H.J. Lu <hongjiu.lu@intel.com>
532
533 * i386-dis.c: Simplify enums.
534
51e7da1b
L		 5352009-10-15 H.J. Lu <hongjiu.lu@intel.com>
536 Ineiev <ineiev@gmail.com>
537
538 PR binutils/10767
539 * i386-dis.c: Use enum instead of nested macros.
540
c39846ed
L		 5412009-10-15 H.J. Lu <hongjiu.lu@intel.com>
542
543 * i386-dis.c (MAX_BYTEMODE): Removed.
544
6a327e17
AM		 5452009-10-14 Tomas Hurka <tom@hukatronic.cz>
546
547 PR 969
548 * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
549
55b126d4
L		 5502009-10-13 H.J. Lu <hongjiu.lu@intel.com>
551
552 * i386-dis.c (print_insn): Always clear need_vex, need_vex_reg
553 and vex_w_done.
554
ef299415
ME		 5552009-10-07 Michael Eager <eager@eagercon.com>
556
55b126d4 557 * microblaze-dis.c: Add include for microblaze-dis.h,
ef299415 558 eliminate local extern decls.
55b126d4 559 * microblaze-dis.h: New.
ef299415 560
245caaea
NC		 5612009-10-06 Nick Clifton <nickc@redhat.com>
562
563 * po/fi.po: Updated Finnish translation.
564
49293ef7
NC		 5652009-10-03 Andreas Schwab <schwab@linux-m68k.org>
566
567 * opc2c.c: Include "libiberty.h" and <errno.h>.
568 (orig_filename): Constify.
569 (dump_lines): Fix line number directive.
570 (main): Set orig_filename to basename of input file. Use
571 xstrerror.
572
573 * Makefile.am (rx-dis.lo): Remove explicit dependencies.
574 ($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD)
575 instead of $(EXEEXT).
576 (opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use
577 $(LINK_FOR_BUILD). Link with libiberty.
578 (MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD).
579 (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c.
580 * Makefile.in: Regenerated.
581 * rx-decode.c: Regenerated.
582
8977d4b2
AM		 5832009-10-03 Paul Reed <paulreed@paddedcell.com>
584
585 * arm-dis.c (print_insn): Check symtab_size not *symtab.
586
f98fa534
L		 5872009-10-02 H.J. Lu <hongjiu.lu@intel.com>
588
589 * i386-opc.tbl: Drop Disp64 on jump and loop instructions.
590 * i386-tbl.h: Regenerated.
591
9fe54b1c
PB		 5922009-10-02 Peter Bergner <bergner@vnet.ibm.com>
593
594 * ppc-dis.c (ppc_opts): Add "476" entry.
595 * ppc-opc.c (PPC476): Define.
596 (powerpc_opcodes): Update mnemonics where required for 476.
597
634b50f2
PB		 5982009-10-01 Peter Bergner <bergner@vnet.ibm.com>
599
600 * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
601 * ppc-dis.c (ppc_opts): Likewise.
602 Rename "ppca2" to "a2".
603
4ded9dda
SR		 6042009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
605
606 * crx-dis.c (match_opcode): Truncate mcode to 32-bit.
607
c7927a3c
NC		 6082009-09-29 DJ Delorie <dj@redhat.com>
609
610 * Makefile.am: Add RX files.
611 * configure.in: Add support for RX target.
612 * disassemble.c: Likewise.
613 * Makefile.in: Regenerate.
614 * configure: Regenerate.
615 * opc2c.c: New file.
616 * rx-decode.c: New file.
617 * rx-decode.opc: New file.
618 * rx-dis.c: New file.
619
8765b556
PB		 6202009-09-29 Peter Bergner <bergner@vnet.ibm.com>
621
622 * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
623 "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
624
fe2d172c
ME		 6252009-09-25 Michael Eager <eager@eagercon.com>
626
e0c483d6
AM		 627 * microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address,
628 microblaze_decode_insn): Add declarations.
629 (get_delay_slots_microblaze): Remove.
fe2d172c 630
21d799b5
NC		 6312009-09-25 Martin Thuresson <martint@google.com>
632
e0c483d6 633 Update sources to make arc and arm targets compile cleanly with
21d799b5
NC		 634 -Wc++-compat:
635 * arc-dis.c Fix casts.
636 * arc-ext.c: Add casts.
637 * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
638 enum.
639
2bf05e57
L		 6402009-09-24 H.J. Lu <hongjiu.lu@intel.com>
641
642 * i386-gen.c (opcode_modifiers): Remove Vex256.
643 (set_bitfield): Handle XXX=V.
644
645 * i386-opc.h (Vex): Update comments.
646 (Vex256): Removed.
647 (VexNDS): Updated.
e0c483d6 648 (i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
2bf05e57
L		 649
650 * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
651 * i386-tbl.h: Regenerated.
652
8a00d392
NC		 6532009-09-23 Nick Clifton <nickc@redhat.com>
654
655 * po/fr.po: Updated French translation.
656
e0d602ec
BE		 6572009-09-21 Ben Elliston <bje@au.ibm.com>
658 Peter Bergner <bergner@vnet.ibm.com>
659
660 * ppc-dis.c (ppc_opts): Add "ppca2" entry.
661 * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
662 eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
663 icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
664 ici mnemonics.
665 (ERAT_T): New operand.
666 (XWC_MASK): New mask.
667 (XOPL2): New macro.
668 (PPCA2): Define.
669
ca58b19f
NC		 6702009-09-18 Nick Clifton <nickc@redhat.com>
671
672 * po/es.po: Updated Spanish translation.
673 * po/vi.po: Updated Vietnamese translation.
674
05203043
L		 6752009-09-15 H.J. Lu <hongjiu.lu@intel.com>
676
677 * i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
678 disp == -disp.
679
df58f7b0
NC		 6802009-09-14 Nick Clifton <nickc@redhat.com>
681
682 * po/nl.po: Updated Dutch translation.
683
1e9cc1c2
NC		 6842009-09-11 Nick Clifton <nickc@redhat.com>
685
686 * po/opcodes.pot: Updated by the Translation project.
687
6882009-09-11 Martin Thuresson <martint@google.com>
689
690 Updated sources to compile cleanly with -Wc++-compat:
691 * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
692 * ldcref.c: Add casts.
693 * ldctor.c: Add casts.
694 * ldexp.c
695 * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
696 * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
697 * ldlang.h (enum statement_enum): Move to top level.
698 * ldmain.c: Add casts.
699 * ldwrite.c: Add casts.
700 * lexsup.c: Add casts. (enum control_enum): Move to top level.
701 * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
702
c8676ae4 7032009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 704
c8676ae4
AK		 705 * s390-dis.c (print_insn_s390): Avoid 'long long'.
706
7330f9c3 7072009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 708
7330f9c3
AK		 709 * s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
710 (print_insn_s390): Signextend and shift pcrel operands before printing.
711
9daa0d29
L		 7122009-09-09 H.J. Lu <hongjiu.lu@intel.com>
713
714 * i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
715 VEX_LEN_AE_R_X_M_0 in comments.
716
495c5f87
DD		 7172009-09-08 DJ Delorie <dj@redhat.com>
718
719 * mep-opc.c: Regenerate.
720
84c71969
AS		 7212009-09-08 Andreas Schwab <schwab@linux-m68k.org>
722
723 * z8kgen.c (struct op): Replace unused flavor with id.
724 (opt): Remove extra xorb entry.
725 (func): Use id field as fallback.
726 (sub): Return new string, caller changed.
727 (internal): Allocate end marker. Assign unique id before sorting.
728 (gas): Likewise. Fix loop end condition.
729 * z8k-opc.h: Regenerate.
730
bdc7fcfe
AM		 7312009-09-08 Alan Modra <amodra@bigpond.net.au>
732
733 * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
734
815c0482
AM		 7352009-09-07 Alan Modra <amodra@bigpond.net.au>
736
737 * z8kgen.c (func): Fix thinko last patch.
738
eae14d64
AM		 7392009-09-07 Alan Modra <amodra@bigpond.net.au>
740
741 * z8kgen.c (func): Stabilize qsort of identically named entries.
742 * z8k-opc.h: Regenerate.
743
23f938f1
TG		 7442009-09-07 Tristan Gingold <gingold@adacore.com>
745
746 * po/opcodes.pot: Regenerate.
747
2eee5593
AM		 7482009-09-07 Alan Modra <amodra@bigpond.net.au>
749
750 * configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
751 * configure: Regenerate.
752 * Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
753 (BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
754 (i386-gen, ia64-gen, z8kgen): ..here.
755 * Makefile.in: Regenerate.
756
ae794f60
TG		 7572009-09-07 Tristan Gingold <gingold@adacore.com>
758
759 * z8k-opc.h: Regenerate.
760
96d56e9f
NC		 7612009-09-05 Martin Thuresson <martin@mtme.org>
762
763 * ia64-dis.c (print_insn_ia64): Update code to use renamed member.
764 * m88k-dis.c (m88kdis): Rename variable class to in_class.
765 * tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol):
766 Rename argument class to symbol_class.
767
66a6900a
JZ		 7682009-09-04 Jie Zhang <jie.zhang@analog.com>
769
770 * bfin-dis.c (decode_pseudodbg_assert_0): Change according
771 to the new encoding of DBGA, DBGAH, and DBGAL.
772 (_print_insn_bfin): Likewise.
773
ad15c38e
JZ		 7742009-09-03 Jie Zhang <jie.zhang@analog.com>
775
776 * bfin-dis.c (_print_insn_bfin): Don't declare.
777 (print_insn_bfin): Don't declare.
778 (dregs_pair): Remove.
779 (ignore_bits): Remove.
780 (ccstat): Remove.
781
c958a8a8
JZ		 7822009-09-03 Jie Zhang <jie.zhang@analog.com>
783
784 * bfin-dis.c (IS_DREG): Define.
785 (IS_PREG): Define.
786 (IS_AREG): Define.
787 (IS_GENREG): Define.
788 (IS_DAGREG): Define.
789 (IS_SYSREG): Define.
790 (decode_REGMV_0): Check illegal register move instructions.
791
3df5879c
DK		 7922009-09-03 Dave Korn <dave.korn.cygwin@gmail.com>
793
794 * Makefile.am (BUILD_LIBINTL): New variable.
795 (i386-gen$(EXEEXT_FOR_BUILD)): Use it.
796 (ia64-gen$(EXEEXT_FOR_BUILD)): And here.
797 (z8kgen$(EXEEXT_FOR_BUILD)): And here.
798 * Makefile.in: Regenerate.
799
05316052
DD		 8002009-09-01 DJ Delorie <dj@redhat.com>
801
802 * mep-asm.c: Regenerate.
803 * mep-desc.c: Regenerate.
804 * mep-opc.c: Regenerate.
805
e06ae0d4
TG		 8062009-09-01 Tristan Gingold <gingold@adacore.com>
807
808 * makefile.vms: Ported to Itanium VMS. Remove useless targets and
809 dependencies. Remove unused FORMAT variable.
810 * configure.com: New file to create build.com DCL script for
811 Itanium VMS or Alpha VMS.
812
d3ce72d0
NC		 8132009-08-29 Martin Thuresson <martin@mtme.org>
814
815 * cris-dis.c (bytes_to_skip): Update code to use new name.
816 * i386-dis.c (putop): Update code to use new name.
817 * i386-gen.c (process_i386_opcodes): Update code to use
818 new name.
819 * i386-opc.h (struct template): Rename struct template to
820 insn_template. Update code accordingly.
821 * i386-tbl.h (i386_optab): Update type to use new name.
822 * ia64-dis.c (print_insn_ia64): Rename variable template
823 to template_val.
824 * tic30-dis.c (struct instruction, get_tic30_instruction):
825 Update code to use new name.
826 * tic54x-dis.c (has_lkaddr, get_insn_size)
827 (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
828 Update code to use new name.
829 * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
830 Update type to new name.
831 * z8kgen.c (internal, gas): Rename variable new to new_op.
832
791f3971
L		 8332009-08-28 H.J. Lu <hongjiu.lu@intel.com>
834
835 * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
836 Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
837 (LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
838 CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
839 * Makefile.in: Regenerated.
840
573e8a1c
RW		 8412009-08-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
842
843 * Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
844 [INSTALL_LIBBFD]: ... here, ...
845 [INSTALL_LIBBFD]: ... and empty overrides here.
846 [!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
847 [!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
848 * Makefile.in: Regenerate.
849 * configure: Regenerate.
850
f7922329
NC		 8512009-08-26 Philippe De Muyter <phdm@macqel.be>
852
853 * m68k-dis.c (print_insn_arg): Add movecr register names for
854 coldfire v4e families.
855
ff13a42d
RW		 8562009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
857
858 * Makefile.am (SUBDIRS): Build '.' before 'po'.
859 (COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
860 (MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
861 (i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
862 using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
863 (i386-gen.o): New rule.
864 ($(srcdir)/i386-init.h): Adjust.
865 (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
866 (ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
867 (ia64-gen.o): New rule.
868 (ia64_asmtab_deps): New variable.
869 ($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
870 (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
871 (s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
872 likewise.
873 (s390-opc.tab): Adjust.
874 (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
875 rules.
876 (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
877 * Makefile.in: Regenerate.
878 * z8kgen.c (gas): Avoid '/*' in comment.
879 * z8k-opc.h (func): Regenerate.
880
6f01793d
RW		 8812009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
882
883 * Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
884 from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
885 i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
886 ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
887 msp430-dis.c added.
888 (LIBOPCODES_CFILES): New variable, adding to
889 TARGET_LIBOPCODES_CFILES also non-target library sources.
890 (CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
891 files.
892 (ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
893 (EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
894 * Makefile.in: Regenerate.
895 * po/POTFILES.in: Regenerate.
896
81ecdfbb
RW		 8972009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
898
14ec8efd
RW		 899 * Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
900 [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
901 [INSTALL_LIBBFD] (bfdinclude_DATA): New.
902 [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
903 [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
904 is built shared even if it is not to be installed.
905 (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
906 (install_libopcodes, uninstall_libopcodes): Remove.
907 (AM_CPPFLAGS): Renamed from ...
908 (INCLUDES): ... this.
909 * Makefile.in: Regenerate.
910
758227f0
RW		 911 * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
912 1.11, foreign, no-dist.
913 (MKDEP, m32c_opc_h): Remove variables.
914 (disassemble.lo): Rewrite using automake-style dependency
915 tracking rules; only list the dependency upon the primary source
916 file, but no included headers.
917 (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
918 (i386-gen.o, ia64-gen.o): Remove dependency statements.
919 (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
920 ensure all dependency fragments are included in the Makefile.
921 (s390-opc.lo): Depend on s390-opc.tab.
922 (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
923 (mkdep section): Remove.
924 * Makefile.in: Regenerate.
925 * po/POTFILES.in: Regenerate.
926
af542c2e
RW		 927 * Makefile.am (install-pdf, install-html): Remove.
928 * Makefile.in: Regenerate.
929
81ecdfbb
RW		 930 * Makefile.in: Regenerate.
931 * aclocal.m4: Likewise.
932 * config.in: Likewise.
933 * configure: Likewise.
934
7ba29e2a
NC		 9352009-08-06 Michael Eager <eager@eagercon.com>
936
937 * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
938 CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
939 * Makefile.in: Regenerate.
940 * configure.in: Add bfd_microblaze_arch target.
941 * configure: Regenerate.
e0c483d6 942 * disassemble.c: Define ARCH_microblaze, return
7ba29e2a
NC		 943 print_insn_microblaze().
944 * microblaze-dis.c: New MicroBlaze disassembler.
945 * microblaze-opc.h: New MicroBlaze opcode definitions.
946 * microblaze-opcm.h: New MicroBlaze opcode types.
947
8a9036a4
L		 9482009-07-25 H.J. Lu <hongjiu.lu@intel.com>
949
950 * configure.in: Handle bfd_l1om_arch.
951 * disassemble.c (disassembler): Likewise.
952
953 * configure: Regenerated.
954
955 * i386-dis.c (print_insn): Handle bfd_mach_l1om and
956 bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
957
958 * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
959 Add CPU_L1OM_FLAGS.
960 (cpu_flags): Add CpuL1OM.
961 (set_bitfield): Take an argument to set the value field.
962 (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
963 (process_i386_opcode_modifier): Updated.
964 (process_i386_operand_type): Likewise.
965 * i386-init.h: Regenerated.
966 * i386-tbl.h: Likewise.
967
968 * i386-opc.h (CpuL1OM): New.
969 (CpuXsave): Updated.
970 (i386_cpu_flags): Add cpul1om.
971
309d3373
JB		 9722009-07-24 Jan Beulich <jbeulich@novell.com>
973
974 * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
975 frstpm.
976 * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
977 (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
978 (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
979 * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
980 Define.
981 (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
982 and cpufisttp.
983 * i386-opc.tbl: Qualify floating point instructions by their
984 respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
985 and fsincos to be avilable only on 387. Fix fstsw ax to be
986 available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
987 and frstpm.
988 * i386-init.h, i386-tbl.h: Regenerate.
989
7769efb2
NC		 9902009-07-20 Nick Clifton <nickc@redhat.com>
991
992 PR 10288
993 * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
994 offset or indexed based addressing mode 3.
995
74bdfecf
NC		 9962009-07-14 Nick Clifton <nickc@redhat.com>
997
998 PR 10288
999 * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
1000 patterns.
1001 (arm_decode_shift): Catch illegal register based shifts.
1002 (print_insn_arm): Properly handle negative register r0
1003 post-indexed addressing.
1004
d1aaab3c
DK		 10052009-07-10 Doug Kwan <dougkwan@google.com>
1006
1007 * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
1008 lower 32 bits of long types to make hexadecimal output consistent
1009 on both 32-bit and 64-bit hosts.
1010
87337981
AM		 10112009-07-10 Alan Modra <amodra@bigpond.net.au>
1012
1013 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
1014 * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
1015 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
1016 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
1017 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
1018 * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
1019 * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
1020 * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
1021 * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
1022 * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
e0c483d6 1023 * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
87337981
AM		 1024 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
1025
1103f72c
NC		 10262009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
1027
1028 * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
1029
78c66db8
NC		 10302009-07-07 Nick Clifton <nickc@redhat.com>
1031
1032 PR 10288
1033 * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
1034 addressing modes.
1035
22102fb0
DD		 10362009-07-06 DJ Delorie <dj@redhat.com>
1037
1038 * mep-desc.c: Regenerate.
1039 * mep-desc.h: Regenerate.
1040 * mep-opc.c: Regenerate.
1041 * mep-opc.h: Regenerate.
1042
922d8de8
DR		 10432009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
1044
1045 * i386-opc.h (CpuFMA4): Add CpuFMA4.
1046 (i386_cpu_flags): New.
1047 * i386-gen.c: Add CPU_FMA4_FLAGS.
1048 * i386-opc.tbl: Add FMA4 instructions.
1049 * i386-tbl.h: Regenerate.
1050 * i386-init.h: Regenerate.
1051 * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
1052 (OP_XMM_VexW): Ditto.
1053 (OP_EX_VexW): Ditto.
1054 (VEXI4_Fixup): Ditto.
1055 (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
1056 (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
1057 (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
1058 (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
1059 (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
1060 (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
1061 (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
1062 (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
1063 (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
1064 (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
1065 (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
1066 (get_vex_imm8): New. handle FMA4.
1067 (OP_EX_VexReg): Ditto.
e0c483d6 1068
fe56b6ce
NC		 10692009-06-30 Nick Clifton <nickc@redhat.com>
1070
1071 PR 10288
1072 * arm-dis.c (coprocessor): Print the LDC and STC versions of the
1073 LFM and SFM instructions as comments,.
1074 Improve consistency of formatting for instructions displayed as
1075 comments and decimal values displayed with their hexadecimal
1076 equivalents.
1077 Formatting tidy ups.
1078
05413229
NC		 10792009-06-29 Nick Clifton <nickc@redhat.com>
1080
1081 PR 10288
1082 * arm-dis.c (enum opcode_sentinels): New: Used to mark the
1083 boundary between variaant and generic coprocessor instuctions.
1084 (coprocessor): Use it.
1085 Fix architecture version of MCRR and MRRC instructions.
1086 (arm_opcdes): Fix patterns for STRB and STRH instructions.
1087 (print_insn_coprocessor): Check architecture and extension masks.
1088 Print a hexadecimal version of any decimal constant that is
1089 outside of the range of -16 to +32.
1090 (print_arm_address): Add a return value of the offset used in the
1091 adress, if it is worth printing a hexadecimal version of it.
1092 (print_insn_neon): Print a hexadecimal version of any decimal
1093 constant that is outside of the range of -16 to +32.
1094 (print_insn_arm): Likewise.
1095 (print_insn_thumb16): Likewise.
1096 (print_insn_thumb32): Likewise.
e0c483d6 1097
05413229
NC		 1098 PR 10297
1099 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
1100 of an undefined instruction.
1101 (arm_opcodes): Use it.
1102 (thumb_opcod): Use it.
1103 (thumb32_opc): Use it.
1104
378a0c07
DD		 11052009-06-23 DJ Delorie <dj@redhat.com>
1106
dab97f24
DD		 1107 * mep-desc.c: Regenerate.
1108 * mep-desc.h: Regenerate.
1109 * mep-dis.c: Regenerate.
1110 * mep-ibld.c: Regenerate.
1111 * mep-opc.c: Regenerate.
1112
378a0c07
DD		 1113 * mep-asm.c: Regenerate.
1114 * mep-opc.c: Regenerate.
1115 * mep-opc.h: Regenerate.
1116
aece7d2e
NC		 11172009-06-22 Nick Clifton <nickc@redhat.com>
1118
1119 * po/fi.po: Updated Finish translation.
1120
1998a8e0
AM		 11212009-06-22 Alan Modra <amodra@bigpond.net.au>
1122
1123 * m32c-asm.c: Regenerate.
1124
b33bafa0
AM		 11252009-06-22 Alan Modra <amodra@bigpond.net.au>
1126
1127 * score-dis.c (print_insn_score48, print_insn_score32): Move default
1128 case label to proper lexical block.
1129 * score7-dis.c (print_insn_score32): Likewise.
1130
ce21feb4
MS		 11312009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
1132
1133 * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
1134 MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
1135 * s390-opc.txt (nopr, nop): Use new instruction format.
1136
0313a2b8
NC		 11372009-06-18 Nick Clifton <nickc@redhat.com>
1138
1139 PR 10288
1140 * arm-dis.c (print_insn_coprocessor): Check that a user specified
1141 ARM architecture supports the matched instruction.
1142 (print_insn_arm): Likewise.
1143 (select_arm_features): New function. Fills in the fields of an
1144 arm_feature_set structure based on a given arm machine number.
1145 (print_insn): Initialise an arm_feature_set structure.
1146
6db7e006
MR		 11472009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
1148
1149 * vax-dis.c (is_function_entry): Return success for synthetic
1150 symbols too.
1151 (is_plt_tail): New function.
1152 (print_insn_vax): Decode PLT entry offset longword.
1153
522fe561
NC		 11542009-06-15 Nick Clifton <nickc@redhat.com>
1155
fe2ceba1
NC		 1156 PR 10186
1157 * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
1158 instruction.
1159
522fe561
NC		 1160 PR 10173
1161 * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
1162
1316c8b3
NC		 11632009-06-15 Nick Clifton <nickc@redhat.com>
1164
1165 PR 10263
1166 * arm-dis.c (print_insn): Ignore is_data if the user has requested
1167 the disassembly of data as well as instructions.
1168
f6475b48
DE		 11692009-06-11 Doug Evans <dje@sebabeach.org>
1170
1171 * cgen.sh: Handle multiple simultaneous runs for parallel makes.
1172
f865a31d
AG		 11732009-06-11 Anthony Green <green@moxielogic.com>
1174
1175 * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
1176 (moxie_form3_opc_info): Add branch instructions.
1177 * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
1178 encoded instructions.
1179
0e7c7f11
AG		 11802009-06-06 Anthony Green <green@moxielogic.com>
1181
1182 * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
1183 * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
1184
67a648f1
AM		 11852009-06-04 Alan Modra <amodra@bigpond.net.au>
1186
1187 * dep-in.sed: Don't use \n in replacement part of s command.
1188 * Makefile.am (DEP1): LC_ALL for uniq.
1189 * Makefile.in: Regenerate.
1190
06c582ac
NC		 11912009-06-02 Nick Clifton <nickc@redhat.com>
1192
1193 * po/nl.po: Updated Dutch translation.
1194
3164099e
TG		 11952009-06-02 Tristan Gingold <gingold@adacore.com>
1196
1197 * ia64-gen.c (parse_resource_users, print_dependency_table,
1198 add_dis_table_ent, finish_distable, insert_bit_table_ent,
1199 add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
1200 get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
1201 insert_completer_entry, print_completer_entry, print_completer_table,
1202 opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
1203
d285268e
DD		 12042009-05-28 DJ Delorie <dj@redhat.com>
1205
1206 * mep-asm.c: Regenerate.
1207 * mep-desc.c: Regenerate.
1208
2f3565a3
DD		 12092009-05-26 DJ Delorie <dj@redhat.com>
1210
1211 * mep-asm.c: Regenerate.
1212 * mep-desc.c: Regenerate.
1213 * mep-desc.h: Regenerate.
1214 * mep-dis.c: Regenerate.
1215 * mep-ibld.c: Regenerate.
1216 * mep-opc.c: Regenerate.
1217 * mep-opc.h: Regenerate.
1218
f12e7348
NC		 12192009-05-26 Nick Clifton <nickc@redhat.com>
1220
1221 * po/id.po: Updated Indonesian translation.
1222 * po/opcodes.pot: Updated template file.
1223
9e097a72
AM		 12242009-05-26 Alan Modra <amodra@bigpond.net.au>
1225
1226 * dep-in.sed: Don't modify .o to .lo here. Output one filename
1227 per line with all lines having continuation backslash. Prefix
1228 first line with "A", following lines with "B".
1229 * Makefile.am (DEP): Don't use dep.sed here.
1230 (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
1231 dep.sed here on dependencies, sort and uniq.
1232 * Makefile.in: Regenerate.
1233
4f8318f8
TG		 12342009-05-25 Tristan Gingold <gingold@adacore.com>
1235
1236 * makefile.vms (OPT): New variable.
1237 (CFLAGS): Update compilation flags.
1238
1d74713b
DD		 12392009-05-22 DJ Delorie <dj@redhat.com>
1240
1241 * mep-asm.c: Regenerate.
1242 * mep-desc.c: Regenerate.
1243 * mep-desc.h: Regenerate.
1244 * mep-dis.c: Regenerate.
1245 * mep-ibld.c: Regenerate.
1246 * mep-opc.c: Regenerate.
1247 * mep-opc.h: Regenerate.
1248
c1e679ec
DR		 12492009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
1250
1251 * i386-opc.h (Cpusse5): Delete.
1252 (i386_cpu_flags): Delete.
1253 * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
1254 * i386-opc.tbl: Remove SSE5 instructions.
1255 * i386-tbl.h: Regenerate.
1256 * i386-init.h: Regenerate.
1257 * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
1258 (print_drex_arg): Delete.
1259 (OP_DREX4): Delete.
1260 (OP_DREX3): Delete.
1261 (OP_DREX_ICMP): Delete.
1262 (OP_DREX_FCMP): Delete.
1263 (DREX_*): Delete.
1264 (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
e0c483d6 1265
2b3decb5
AM		 12662009-05-22 Alan Modra <amodra@bigpond.net.au>
1267
1268 * Makefile.am: Run "make dep-am".
1269 * Makefile.in: Regenerate.
1270 * po/POTFILES.in: Regenerate.
1271
eb956800
DD		 12722009-05-19 DJ Delorie <dj@redhat.com>
1273
1274 * mep-asm.c: Regenerate.
1275 * mep-opc.c: Regenerate.
1276
3526b680
DD		 12772009-04-30 DJ Delorie <dj@redhat.com>
1278
1279 * mep-asm.c: Regenerate.
1280 * mep-desc.c: Regenerate.
1281 * mep-desc.h: Regenerate.
1282 * mep-dis.c: Regenerate.
1283 * mep-ibld.c: Regenerate.
1284 * mep-opc.c: Regenerate.
1285 * mep-opc.h: Regenerate.
1286
45be3704
DD		 12872009-04-17 DJ Delorie <dj@redhat.com
1288
1289 * mep-desc.c: Regenerate.
1290 * mep-ibld.c: Regenerate.
1291 * mep-opc.c: Regenerate.
1292 * mep-opc.h: Regenerate.
1293
20135e4c
NC		 12942009-04-15 Anthony Green <green@moxielogic.com>
1295
1296 * moxie-opc.c, moxie-dis.c: Created.
1297 * Makefile.am: Build the moxie source files.
1298 * configure.in: Add moxie support.
1299 * Makefile.in, configure: Rebuilt.
1300 * disassemble.c (disassembler): Add moxie support.
1301 (ARCH_moxie): Define.
1302
ac5c19e6
JB		 13032009-04-15 Jan Beulich <jbeulich@novell.com>
1304
1305 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
1306 extension to None.
1307 (pshab, pshaw, pshad, pshaq): Likewise.
1308 * i386-tbl.h: Re-generate.
1309
52de720d
DD		 13102009-04-08 DJ Delorie <dj@redhat.com
1311
1312 * mep-asm.c: Regenerate.
1313 * mep-desc.c: Regenerate.
1314 * mep-desc.h: Regenerate.
1315 * mep-dis.c: Regenerate.
1316 * mep-ibld.c: Regenerate.
1317 * mep-opc.c: Regenerate.
1318 * mep-opc.h: Regenerate.
1319
858d7a6d
PB		 13202009-04-07 Peter Bergner <bergner@vnet.ibm.com>
1321
1322 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
1323 "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
1324 Reorder entries so the extended mnemonics are listed before tlbilx.
1325
70dc4e32
PB		 13262009-04-02 Peter Bergner <bergner@vnet.ibm.com>
1327
1328 * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
1329 due to -many/-Many.
1330 (print_insn_powerpc): Make sure we only deprecate instructions using
1331 the original dialect and not a modified dialect due to -Many handling.
1332 Move the handling of the condition register and default operands to
1333 the end of the if/else if/else chain.
1334 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1335 instructions from newer processors are listed before older ones.
1336 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
1337 that have instructions with conflicting opcodes.
1338
e401b04c
PB		 13392009-04-01 Peter Bergner <bergner@vnet.ibm.com>
1340
1341 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
1342 E500MC entries.
1343
b8f9ee44
CL		 13442009-04-01 Christophe Lyon <christophe.lyon@st.com>
1345
1346 * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
1347
d460e92e
JM		 13482009-03-30 Joseph Myers <joseph@codesourcery.com>
1349
1350 * arm-dis.c (print_insn): Also check section matches in backwards
1351 search for mapping symbol.
1352
d34b5006
L		 13532009-03-26 H.J. Lu <hongjiu.lu@intel.com>
1354
1355 * i386-dis.c (get_valid_dis386): Abort on unhandled table.
1356
8d25cc3d
AM		 13572009-03-18 Alan Modra <amodra@bigpond.net.au>
1358
3889c459 1359 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
8d25cc3d
AM		 1360 * Makefile.am: Run "make dep-am".
1361 * Makefile.in: Regenerate.
1362 * openrisc-opc.c: Regenerate.
1363
34dd024a
NC		 13642009-03-10 Nick Clifton <nickc@redhat.com>
1365
1366 * po/id.po: Updated Indonesian translation.
1367
69fe9ce5
AM		 13682009-03-10 Alan Modra <amodra@bigpond.net.au>
1369
1370 * ppc-dis.c: Include "opintl.h".
1371 (struct ppc_mopt, ppc_opts): New.
1372 (ppc_parse_cpu): New function.
1373 (powerpc_init_dialect): Use it.
1374 (print_ppc_disassembler_options): Dump options from ppc_opts.
1375 Internationalize message.
1376
d11fd249
NC		 13772009-03-06 Nick Clifton <nickc@redhat.com>
1378
1379 * po/es.po: Updated Spanish translation.
1380
51dec227
AM		 13812009-03-04 Alan Modra <amodra@bigpond.net.au>
1382
1383 PR 6768
1384 * configure.in: Test for ld --as-needed support. Link shared
1385 libopcodes against libm.
1386 * configure: Regenerate.
1387
c72ab5f2
PB		 13882009-03-03 Peter Bergner <bergner@vnet.ibm.com>
1389
1390 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1391 instructions from newer processors are listed before older ones.
1392
a1f7ca36
AM		 13932009-03-03 Alan Modra <amodra@bigpond.net.au>
1394
1395 * Makefile.am: Run "make dep-am".
1396 (HFILES): Move lm32-desc.h and lm32-opc.h from..
1397 (CFILES): ..here.
1398 * Makefile.in: Regenerate.
1399
c3b7224a
NC		 14002009-03-02 Qinwei <qinwei@sunnorth.com.cn>
1401
1402 * score7-dis.c: New file.
1403 * Makefile.am: Add dependencies for score7-dis.c.
1404 * Makefile.in: Regenerate.
1405 * configure.in: Add score7-dis to score files.
1406 * configure: Regenerate.
1407 * score-dis.c: Add support for score7 architecture.
1408 * score-opc.h: Likewise.
1409
58e24671
RW		 14102009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
1411
1412 * configure: Regenerate.
1413
d6f574e0
L		 14142009-02-27 H.J. Lu <hongjiu.lu@intel.com>
1415
1416 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
1417
066be9f7
PB		 14182009-02-26 Peter Bergner <bergner@vnet.ibm.com>
1419
1420 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
1421 the power7 and the isel instructions.
1422 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
1423 (insert_dm, extract_dm): Likewise.
1424 (XB6): Update comment to include XX2 form.
1425 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
1426 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
1427 (RemoveXX3DM): Delete.
1428 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
1429 "mftgpr">: Deprecate for POWER7.
1430 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
1431 "frsqrte.">: Deprecate the three operand form and enable the two
1432 operand form for POWER7 and later.
1433 <"wait">: Extend to accept optional parameter. Enable for POWER7.
1434 <"waitsrv", "waitimpl">: Add extended opcodes.
1435 <"ldbrx", "stdbrx">: Enable for POWER7.
1436 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
1437 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
1438 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
1439 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
1440 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
1441 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
1442 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
1443 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
1444 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
1445 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
1446 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
1447 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
1448 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
1449 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
1450 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
1451 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
1452 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
1453 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
1454 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
1455 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
1456 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
1457 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
1458 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
1459 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
1460 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
1461 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
1462 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
1463 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
1464 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
1465 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
1466 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
1467 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
1468 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
1469 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
1470 "xxspltw", "xxswapd">: Add VSX opcodes.
1471
4c664d7b
L		 14722009-02-23 H.J. Lu <hongjiu.lu@intel.com>
1473
1474 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
1475 (operand_types): Remove Vex_Imm4.
1476
1477 * i386-opc.h (Vex_Imm4): Removed.
1478 (OTMax): Updated.
1479 (i386_operand_type): Remove vex_imm4.
1480
1481 * i386-opc.tbl: Remove Vex_Imm4 comments.
1482 * i386-init.h: Regenerated.
1483 * i386-tbl.h: Likewise.
1484
4ce8808b
RE		 14852009-02-23 Richard Earnshaw <rearnsha@arm.com>
1486
1487 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
1488 vq{r}shr{u}n.s64 insnstructions.
1489
0e55be16
PB		 14902009-02-19 Peter Bergner <bergner@vnet.ibm.com>
1491
1492 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
1493 operand to be a float point register (FRT/FRS).
1494
b1c9882d
AN		 14952009-02-18 Adam Nemet <anemet@caviumnetworks.com>
1496
1497 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
1498 dmfc2 and dmtc2 before the architecture-level variants.
1499
137f2437
NC		 15002009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
1501
1502 * fr30-opc.c: Regenerate.
1503 * frv-opc.c: Regenerate.
1504 * ip2k-opc.c: Regenerate.
1505 * iq2000-opc.c: Regenerate.
1506 * lm32-opc.c: Regenerate.
1507 * m32c-opc.c: Regenerate.
1508 * m32r-opc.c: Regenerate.
1509 * mep-opc.c: Regenerate.
1510 * mt-opc.c: Regenerate.
1511 * xc16x-opc.c: Regenerate.
1512 * xstormy16-opc.c: Regenerate.
1513 * tic54x-dis.c (print_instruction): Avoid compiler warning on
1514 sprintf call.
1515
87298967
NS		 15162009-02-12 Nathan Sidwell <nathan@codesourcery.com>
1517
1518 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
1519
80890a61
PB		 15202009-02-05 Peter Bergner <bergner@vnet.ibm.com>
1521
1522 * ppc-opc.c: Update copyright year.
1523 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
1524 ordering for POWER4 and later and use the correct Server ordering.
1525
ce2f5b3c
L		 15262009-02-04 H.J. Lu <hongjiu.lu@intel.com>
1527
1528 AVX Programming Reference (January, 2009)
1529 * i386-dis.c (PREFIX_VEX_3A44): New.
1530 (VEX_LEN_3A44_P_2): Likewise.
1531 (PREFIX_VEX_3A48): Updated.
1532 (VEX_LEN_3A4C_P_2): Likewise.
1533 (prefix_table): Add PREFIX_VEX_3A44.
1534 (vex_table): Likewise.
1535 (vex_len_table): Add VEX_LEN_3A44_P_2.
1536
1537 * i386-opc.tbl: Add PCLMUL + AVX instructions.
1538 * i386-tbl.h: Regenerated.
1539
52b6b6b9
JM		 15402009-02-03 Sandip Matte <sandip@rmicorp.com>
1541
1542 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
1543 (mips_arch_choices): Add XLR entry.
1544 * mips-opc.c (XLR): Define.
1545 (mips_builtin_opcodes): Add XLR instructions.
1546
31dd3154
JM		 15472009-02-03 Carlos O'Donell <carlos@codesourcery.com>
1548
1549 * Makefile.am: Add install-pdf target.
1550 * po/Make-in: Add install-pdf target.
1551 * Makefile.in: Regenerate.
1552
c1a0a41f
DD		 15532009-02-02 DJ Delorie <dj@redhat.com>
1554
1555 * mep-asm.c: Regenerate.
1556 * mep-desc.c: Regenerate.
1557 * mep-desc.h: Regenerate.
1558 * mep-dis.c: Regenerate.
1559 * mep-ibld.c: Regenerate.
1560 * mep-opc.c: Regenerate.
1561 * mep-opc.h: Regenerate.
1562
087b80de
JM		 15632009-01-29 Mark Mitchell <mark@codesourcery.com>
1564
1565 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
1566 qsub, and qdsub.
1567
159073e6
NC		 15682009-01-28 Chao-ying Fu <fu@mips.com>
1569
e0c483d6 1570 * mips-opc.c (suxc1): Add the flag of FP_D.
159073e6 1571
6f3b91a6
AM		 15722009-01-20 Alan Modra <amodra@bigpond.net.au>
1573
1574 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
1575 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
1576 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
1577 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
1578 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
1579 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
1580 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
1581 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
1582
29670fb9
AM		 15832009-01-16 Alan Modra <amodra@bigpond.net.au>
1584
1585 * configure.in (commonbfdlib): Delete.
1586 (SHARED_LIBADD): Add pic libiberty if such is available.
1587 * configure: Regenerate.
1588 * po/POTFILES.in: Regenerate.
1589
21169fcf
PB		 15902009-01-14 Peter Bergner <bergner@vnet.ibm.com>
1591
1592 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
1593 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
1594 operand form and enable the four operand form for POWER6 and later.
1595 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
1596 three operand form for POWER6 and later.
1597
4ca47a51
MF		 15982009-01-14 Mike Frysinger <vapier@gentoo.org>
1599
1600 * bfin-dis.c (OUTS): Use "%s" as format string.
1601
8acd5377
L		 16022009-01-13 H.J. Lu <hongjiu.lu@intel.com>
1603
1604 * i386-gen.c (cpu_flag_init): Remove a white space.
1605 (operand_type_init): Likewise.
1606
c1ec1875
L		 16072009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1608
1609 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
1610 * i386-tbl.h: Regenerated.
1611
c7532693
L		 16122009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1613
1614 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
1615 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
1616 subS, xorS and cmpS.
1617
bd5295b2
L		 16182009-01-10 H.J. Lu <hongjiu.lu@intel.com>
1619
1620 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
1621 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
1622 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
1623 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
1624 and CpuSYSCALL.
1625 (lineno): Removed.
1626 (set_bitfield): Take an argument, lineno. Don't report lineno
1627 on error if it is -1.
1628 (process_i386_cpu_flag): Take an argument, lineno.
1629 (process_i386_opcode_modifier): Likewise.
1630 (process_i386_operand_type): Likewise.
1631 (output_i386_opcode): Likewise.
1632 (opcode_hash_entry): Add lineno.
1633 (process_i386_opcodes): Updated.
1634 (process_i386_registers): Likewise.
1635 (process_i386_initializers): Likewise.
1636
1637 * i386-opc.h (CpuP4): Removed.
1638 (CpuK6): Likewise.
1639 (CpuK8): Likewise.
1640 (CpuClflush): New.
1641 (CpuSYSCALL): Likewise.
1642 (CpuMMX): Updated.
1643 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
1644 cpuclflush and cpusyscall.
1645
1646 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
1647 syscall and sysret.
1648 * i386-init.h: Regenerated.
1649 * i386-tbl.h: Likewise.
1650
1b7f3fb0
L		 16512009-01-09 H.J. Lu <hongjiu.lu@intel.com>
1652
1653 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
1654 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
1655 (cpu_flags): Add CpuRdtscp.
1656 (set_bitfield): Remove CpuSledgehammer check.
1657
1658 * i386-opc.h (CpuRdtscp): New.
1659 (CpuLM): Updated.
1660 (i386_cpu_flags): Add cpurdtscp.
1661
1662 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
1663 * i386-init.h: Regenerated.
1664 * i386-tbl.h: Likewise.
1665
1cb0a767
PB		 16662009-01-09 Peter Bergner <bergner@vnet.ibm.com>
1667
1668 * ppc-opc.c (PPCNONE): Define.
1669 (NOPOWER4): Delete.
1670 (powerpc_opcodes): Initialize the new "deprecated" field.
1671
168e3097
L		 16722009-01-06 H.J. Lu <hongjiu.lu@intel.com>
1673
1674 AVX Programming Reference (December, 2008)
1675 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
1676 (VEX_LEN_E7_P_2_M_0): Likewise.
1677 (VEX_LEN_2C_P_1): Updated.
1678 (VEX_LEN_E8_P_2): Likewise.
1679 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
1680 (mod_table): Likewise.
1681
1682 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
1683 * i386-tbl.h: Regenerated.
1684
22da050b
L		 16852009-01-05 H.J. Lu <hongjiu.lu@intel.com>
1686
1687 * i386-gen.c (process_copyright): Update for 2009.
1688
1689 * i386-init.h: Regenerated.
1690 * i386-tbl.h: Likewise.
1691
0bfee649 16922009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 1693
0bfee649
L		 1694 AVX Programming Reference (December, 2008)
1695 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 1696 (OP_EX_VexW): Likewise.
0bfee649 1697 (OP_EX_VexImmW): Likewise.
c0f3af97 1698 (OP_XMM_VexW): Likewise.
c0f3af97 1699 (VEXI4_Fixup): Likewise.
c0f3af97 1700 (VPERMIL2_Fixup): Likewise.
c0f3af97 1701 (VexI4): Likewise.
0bfee649
L		 1702 (VexFMA): Likewise.
1703 (Vex128FMA): Likewise.
c0f3af97
L		 1704 (EXVexW): Likewise.
1705 (EXdVexW): Likewise.
1706 (EXqVexW): Likewise.
0bfee649 1707 (EXVexImmW): Likewise.
c0f3af97 1708 (XMVexW): Likewise.
c0f3af97 1709 (VPERMIL2): Likewise.
0bfee649
L		 1710 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
1711 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
1712 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
1713 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
1714 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
1715 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
1716 (get_vex_imm8): Likewise.
1717 (OP_EX_VexReg): Likewise.
1718 vpermil2_op): Likewise.
1719 (EXVexWdq): New.
1720 (vex_w_dq_mode): Likewise.
1721 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
1722 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
1723 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
1724 (es_reg): Updated.
1725 (PREFIX_VEX_38DB): Likewise.
1726 (PREFIX_VEX_3A4A): Likewise.
1727 (PREFIX_VEX_3A60): Likewise.
1728 (PREFIX_VEX_3ADF): Likewise.
1729 (VEX_LEN_3ADF_P_2): Likewise.
1730 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
e0c483d6 1731 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
0bfee649
L		 1732 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
1733 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
1734 PREFIX_VEX_3896...PREFIX_VEX_389F,
1735 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
1736 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 1737 (vex_table): Likewise.
0bfee649
L		 1738 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
1739 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
1740 (putop): Support "%XW".
1741 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 1742
0bfee649 1743 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 1744
0bfee649
L		 1745 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
1746 instructions. Add new FMA instructions.
28dbc079
L		 1747 * i386-tbl.h: Regenerated.
1748
e0c483d6 17492009-01-02 Matthias Klose <doko@ubuntu.com>
3fe15143 1750
e0c483d6
AM		 1751 * or32-opc.c (or32_print_register, or32_print_immediate,
1752 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 1753
0bfee649 1754For older changes see ChangeLog-2008
252b5132
RH		 1755\f
1756Local Variables:
2f6d2f85
NC		 1757mode: change-log
1758left-margin: 8
1759fill-column: 74
252b5132
RH		 1760version-control: never
1761End:
GDB Binutils - Deliverables
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