* gas/config/tc-arm.c (parse_neon_alignment): New function.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
8e560766
MGD
12010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
2
3 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
4
c7e2358a
AM
52010-06-27 Alan Modra <amodra@gmail.com>
6
7 * arc-dis.c (arc_sprintf): Delete set but unused variables.
8 (decodeInstr): Likewise.
9 * dlx-dis.c (print_insn_dlx): Likewise.
10 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
11 * maxq-dis.c (check_move, print_insn): Likewise.
12 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
13 * msp430-dis.c (msp430_branchinstr): Likewise.
14 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
15 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
16 * sparc-dis.c (print_insn_sparc): Likewise.
17 * fr30-asm.c: Regenerate.
18 * frv-asm.c: Regenerate.
19 * ip2k-asm.c: Regenerate.
20 * iq2000-asm.c: Regenerate.
21 * lm32-asm.c: Regenerate.
22 * m32c-asm.c: Regenerate.
23 * m32r-asm.c: Regenerate.
24 * mep-asm.c: Regenerate.
25 * mt-asm.c: Regenerate.
26 * openrisc-asm.c: Regenerate.
27 * xc16x-asm.c: Regenerate.
28 * xstormy16-asm.c: Regenerate.
29
6ffe3d99
NC
302010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
31
32 PR gas/11673
33 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
34
09ec0d17
NC
352010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
36
37 PR binutils/11676
38 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
39
e01d869a
AM
402010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
41
42 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
43 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
44 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
45 touch floating point regs and are enabled by COM, PPC or PPCCOM.
46 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
47 Treat lwsync as msync on e500.
48
1f4e4950
MGD
492010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
50
51 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
52
9d82ec38
MGD
532010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
54
e01d869a 55 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
9d82ec38
MGD
56 constants is the same on 32-bit and 64-bit hosts.
57
c3a6ea62 582010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
d8b24b95
NC
59
60 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
61 .short directives so that they can be reassembled.
62
9db8dccb
CM
632010-05-26 Catherine Moore <clm@codesourcery.com>
64 David Ung <davidu@mips.com>
65
66 * mips-opc.c: Change membership to I1 for instructions ssnop and
67 ehb.
68
dfc8cf43
L
692010-05-26 H.J. Lu <hongjiu.lu@intel.com>
70
71 * i386-dis.c (sib): New.
72 (get_sib): Likewise.
73 (print_insn): Call get_sib.
74 OP_E_memory): Use sib.
75
f79e2745
CM
762010-05-26 Catherine Moore <clm@codesoourcery.com>
77
78 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
79 * mips-opc.c (I16): Remove.
80 (mips_builtin_op): Reclassify jalx.
81
51b5d4a8
AM
822010-05-19 Alan Modra <amodra@gmail.com>
83
84 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
85 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
86
85d4ac0b
AM
872010-05-13 Alan Modra <amodra@gmail.com>
88
89 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
90
4547cb56
NC
912010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
92
93 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
94 format.
95 (print_insn_thumb16): Add support for new %W format.
96
6540b386
TG
972010-05-07 Tristan Gingold <gingold@adacore.com>
98
99 * Makefile.in: Regenerate with automake 1.11.1.
100 * aclocal.m4: Ditto.
101
3e01a7fd
NC
1022010-05-05 Nick Clifton <nickc@redhat.com>
103
104 * po/es.po: Updated Spanish translation.
105
9c9c98a5
NC
1062010-04-22 Nick Clifton <nickc@redhat.com>
107
108 * po/opcodes.pot: Updated by the Translation project.
109 * po/vi.po: Updated Vietnamese translation.
110
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L
1112010-04-16 H.J. Lu <hongjiu.lu@intel.com>
112
113 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
114 bits in opcode.
115
3d540e93
NC
1162010-04-09 Nick Clifton <nickc@redhat.com>
117
118 * i386-dis.c (print_insn): Remove unused variable op.
119 (OP_sI): Remove unused variable mask.
120
397841b5
AM
1212010-04-07 Alan Modra <amodra@gmail.com>
122
123 * configure: Regenerate.
124
cee62821
PB
1252010-04-06 Peter Bergner <bergner@vnet.ibm.com>
126
127 * ppc-opc.c (RBOPT): New define.
128 ("dccci"): Enable for PPCA2. Make operands optional.
129 ("iccci"): Likewise. Do not deprecate for PPC476.
130
accf4463
NC
1312010-04-02 Masaki Muranaka <monaka@monami-software.com>
132
133 * cr16-opc.c (cr16_instruction): Fix typo in comment.
134
40b36596
JM
1352010-03-25 Joseph Myers <joseph@codesourcery.com>
136
137 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
138 * Makefile.in: Regenerate.
139 * configure.in (bfd_tic6x_arch): New.
140 * configure: Regenerate.
141 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
142 (disassembler): Handle TI C6X.
143 * tic6x-dis.c: New.
144
1985c81c
MF
1452010-03-24 Mike Frysinger <vapier@gentoo.org>
146
147 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
148
f66187fd
JM
1492010-03-23 Joseph Myers <joseph@codesourcery.com>
150
151 * dis-buf.c (buffer_read_memory): Give error for reading just
152 before the start of memory.
153
ce7d077e
SP
1542010-03-22 Sebastian Pop <sebastian.pop@amd.com>
155 Quentin Neill <quentin.neill@amd.com>
156
157 * i386-dis.c (OP_LWP_I): Removed.
158 (reg_table): Do not use OP_LWP_I, use Iq.
159 (OP_LWPCB_E): Remove use of names16.
160 (OP_LWP_E): Same.
161 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
162 should not set the Vex.length bit.
163 * i386-tbl.h: Regenerated.
164
63d0fa4e
AM
1652010-02-25 Edmar Wienskoski <edmar@freescale.com>
166
167 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
168
c060226a
NC
1692010-02-24 Nick Clifton <nickc@redhat.com>
170
171 PR binutils/6773
172 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
173 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
174 (thumb32_opcodes): Likewise.
175
ab7875de
NC
1762010-02-15 Nick Clifton <nickc@redhat.com>
177
178 * po/vi.po: Updated Vietnamese translation.
179
fee1d3e8
DE
1802010-02-12 Doug Evans <dje@sebabeach.org>
181
182 * lm32-opinst.c: Regenerate.
183
37ec9240
DE
1842010-02-11 Doug Evans <dje@sebabeach.org>
185
9468ae89
DE
186 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
187 (print_address): Delete CGEN_PRINT_ADDRESS.
188 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
189 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
190 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
191 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
192
37ec9240
DE
193 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
194 * frv-desc.c, * frv-desc.h, * frv-opc.c,
195 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
196 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
197 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
198 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
199 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
200 * mep-desc.c, * mep-desc.h, * mep-opc.c,
201 * mt-desc.c, * mt-desc.h, * mt-opc.c,
202 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
203 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
204 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
205
c75ef631
L
2062010-02-11 H.J. Lu <hongjiu.lu@intel.com>
207
208 * i386-dis.c: Update copyright.
209 * i386-gen.c: Likewise.
210 * i386-opc.h: Likewise.
211 * i386-opc.tbl: Likewise.
212
a683cc34
SP
2132010-02-10 Quentin Neill <quentin.neill@amd.com>
214 Sebastian Pop <sebastian.pop@amd.com>
215
216 * i386-dis.c (OP_EX_VexImmW): Reintroduced
217 function to handle 5th imm8 operand.
218 (PREFIX_VEX_3A48): Added.
219 (PREFIX_VEX_3A49): Added.
220 (VEX_W_3A48_P_2): Added.
221 (VEX_W_3A49_P_2): Added.
222 (prefix table): Added entries for PREFIX_VEX_3A48
223 and PREFIX_VEX_3A49.
224 (vex table): Added entries for VEX_W_3A48_P_2 and
225 and VEX_W_3A49_P_2.
226 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
227 for Vec_Imm4 operands.
228 * i386-opc.h (enum): Added Vec_Imm4.
229 (i386_operand_type): Added vec_imm4.
230 * i386-opc.tbl: Add entries for vpermilp[ds].
231 * i386-init.h: Regenerated.
232 * i386-tbl.h: Regenerated.
233
cdc51b07
RS
2342010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
235
236 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
237 and "pwr7". Move "a2" into alphabetical order.
238
ce3d2015
AM
2392010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
240
241 * ppc-dis.c (ppc_opts): Add titan entry.
242 * ppc-opc.c (TITAN, MULHW): Define.
243 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
244
68339fdf
SP
2452010-02-03 Quentin Neill <quentin.neill@amd.com>
246
247 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
248 to CPU_BDVER1_FLAGS
249 * i386-init.h: Regenerated.
250
f3d55a94
AG
2512010-02-03 Anthony Green <green@moxielogic.com>
252
253 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
254 0x0f, and make 0x00 an illegal instruction.
255
b0e28b39
DJ
2562010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
257
258 * opcodes/arm-dis.c (struct arm_private_data): New.
259 (print_insn_coprocessor, print_insn_arm): Update to use struct
260 arm_private_data.
261 (is_mapping_symbol, get_map_sym_type): New functions.
262 (get_sym_code_type): Check the symbol's section. Do not check
263 mapping symbols.
264 (print_insn): Default to disassembling ARM mode code. Check
265 for mapping symbols separately from other symbols. Use
266 struct arm_private_data.
267
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L
2682010-01-28 H.J. Lu <hongjiu.lu@intel.com>
269
270 * i386-dis.c (EXVexWdqScalar): New.
271 (vex_scalar_w_dq_mode): Likewise.
272 (prefix_table): Update entries for PREFIX_VEX_3899,
273 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
274 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
275 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
276 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
277 (intel_operand_size): Handle vex_scalar_w_dq_mode.
278 (OP_EX): Likewise.
279
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2802010-01-27 H.J. Lu <hongjiu.lu@intel.com>
281
282 * i386-dis.c (XMScalar): New.
283 (EXdScalar): Likewise.
284 (EXqScalar): Likewise.
285 (EXqScalarS): Likewise.
286 (VexScalar): Likewise.
287 (EXdVexScalarS): Likewise.
288 (EXqVexScalarS): Likewise.
289 (XMVexScalar): Likewise.
290 (scalar_mode): Likewise.
291 (d_scalar_mode): Likewise.
292 (d_scalar_swap_mode): Likewise.
293 (q_scalar_mode): Likewise.
294 (q_scalar_swap_mode): Likewise.
295 (vex_scalar_mode): Likewise.
296 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
297 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
298 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
299 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
300 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
301 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
302 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
303 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
304 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
305 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
306 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
307 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
308 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
309 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
310 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
311 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
312 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
313 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
314 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
315 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
316 q_scalar_mode, q_scalar_swap_mode.
317 (OP_XMM): Handle scalar_mode.
318 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
319 and q_scalar_swap_mode.
320 (OP_VEX): Handle vex_scalar_mode.
321
208b4d78
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3222010-01-24 H.J. Lu <hongjiu.lu@intel.com>
323
324 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
325
448b213a
L
3262010-01-24 H.J. Lu <hongjiu.lu@intel.com>
327
328 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
329
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3302010-01-24 H.J. Lu <hongjiu.lu@intel.com>
331
332 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
333
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3342010-01-24 H.J. Lu <hongjiu.lu@intel.com>
335
336 * i386-dis.c (Bad_Opcode): New.
337 (bad_opcode): Likewise.
338 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
339 (dis386_twobyte): Likewise.
340 (reg_table): Likewise.
341 (prefix_table): Likewise.
342 (x86_64_table): Likewise.
343 (vex_len_table): Likewise.
344 (vex_w_table): Likewise.
345 (mod_table): Likewise.
346 (rm_table): Likewise.
347 (float_reg): Likewise.
348 (reg_table): Remove trailing "(bad)" entries.
349 (prefix_table): Likewise.
350 (x86_64_table): Likewise.
351 (vex_len_table): Likewise.
352 (vex_w_table): Likewise.
353 (mod_table): Likewise.
354 (rm_table): Likewise.
355 (get_valid_dis386): Handle bytemode 0.
356
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L
3572010-01-23 H.J. Lu <hongjiu.lu@intel.com>
358
359 * i386-opc.h (VEXScalar): New.
360
361 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
362 instructions.
363 * i386-tbl.h: Regenerated.
364
706e8205 3652010-01-21 H.J. Lu <hongjiu.lu@intel.com>
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L
366
367 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
368
369 * i386-opc.tbl: Add xsave64 and xrstor64.
370 * i386-tbl.h: Regenerated.
371
99ea83aa
NC
3722010-01-20 Nick Clifton <nickc@redhat.com>
373
374 PR 11170
375 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
376 based post-indexed addressing.
377
a6461c02
SP
3782010-01-15 Sebastian Pop <sebastian.pop@amd.com>
379
380 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
381 * i386-tbl.h: Regenerated.
382
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3832010-01-14 H.J. Lu <hongjiu.lu@intel.com>
384
385 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
386 comments.
387
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L
3882010-01-14 H.J. Lu <hongjiu.lu@intel.com>
389
390 * i386-dis.c (names_mm): New.
391 (intel_names_mm): Likewise.
392 (att_names_mm): Likewise.
393 (names_xmm): Likewise.
394 (intel_names_xmm): Likewise.
395 (att_names_xmm): Likewise.
396 (names_ymm): Likewise.
397 (intel_names_ymm): Likewise.
398 (att_names_ymm): Likewise.
399 (print_insn): Set names_mm, names_xmm and names_ymm.
400 (OP_MMX): Use names_mm, names_xmm and names_ymm.
401 (OP_XMM): Likewise.
402 (OP_EM): Likewise.
403 (OP_EMC): Likewise.
404 (OP_MXC): Likewise.
405 (OP_EX): Likewise.
406 (XMM_Fixup): Likewise.
407 (OP_VEX): Likewise.
408 (OP_EX_VexReg): Likewise.
409 (OP_Vex_2src): Likewise.
410 (OP_Vex_2src_1): Likewise.
411 (OP_Vex_2src_2): Likewise.
412 (OP_REG_VexI4): Likewise.
413
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4142010-01-13 H.J. Lu <hongjiu.lu@intel.com>
415
416 * i386-dis.c (print_insn): Update comments.
417
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4182010-01-12 H.J. Lu <hongjiu.lu@intel.com>
419
420 * i386-dis.c (rex_original): Removed.
421 (ckprefix): Remove rex_original.
422 (print_insn): Update comments.
423
3725885a
RW
4242010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
425
426 * Makefile.in: Regenerate.
427 * configure: Regenerate.
428
b7cd1872
DE
4292010-01-07 Doug Evans <dje@sebabeach.org>
430
431 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
432 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
433 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
434 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
435 * xstormy16-ibld.c: Regenerate.
436
69dd9865
SP
4372010-01-06 Quentin Neill <quentin.neill@amd.com>
438
439 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
440 * i386-init.h: Regenerated.
441
e3e535bc
NC
4422010-01-06 Daniel Gutson <dgutson@codesourcery.com>
443
444 * arm-dis.c (print_insn): Fixed search for next symbol and data
445 dumping condition, and the initial mapping symbol state.
446
fe8afbc4
DE
4472010-01-05 Doug Evans <dje@sebabeach.org>
448
449 * cgen-ibld.in: #include "cgen/basic-modes.h".
450 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
451 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
452 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
453 * xstormy16-ibld.c: Regenerate.
454
2edcd244
NC
4552010-01-04 Nick Clifton <nickc@redhat.com>
456
457 PR 11123
458 * arm-dis.c (print_insn_coprocessor): Initialise value.
459
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4602010-01-04 Edmar Wienskoski <edmar@freescale.com>
461
462 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
463
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4642010-01-02 Doug Evans <dje@sebabeach.org>
465
466 * cgen-asm.in: Update copyright year.
467 * cgen-dis.in: Update copyright year.
468 * cgen-ibld.in: Update copyright year.
469 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
470 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
471 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
472 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
473 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
474 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
475 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
476 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
477 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
478 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
479 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
480 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
481 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
482 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
483 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
484 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
485 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
486 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
487 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
488 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
489 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f 490
43ecc30f 491For older changes see ChangeLog-2009
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492\f
493Local Variables:
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494mode: change-log
495left-margin: 8
496fill-column: 74
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497version-control: never
498End:
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