* psympriv.h (add_psymbol_to_list, init_psymbol_list)
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
8901a3cd
PM
12010-09-10 Pierre Muller <muller@ics.u-strasbg.fr>
2
3 * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
4 dlx_insn_type array.
5
d9e3625e
L
62010-08-31 H.J. Lu <hongjiu.lu@intel.com>
7
8 PR binutils/11960
9 * i386-dis.c (sIv): New.
10 (dis386): Replace Iq with sIv on "pushT".
11 (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
12 (x86_64_table): Replace {T|}/{P|} with P.
13 (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
14 (OP_sI): Update v_mode. Remove w_mode.
15
f383de66
NF
162010-08-27 Nathan Froyd <froydnj@codesourcery.com>
17
18 * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
19 on E500 and E500MC.
20
1ab03f4b
L
212010-08-17 H.J. Lu <hongjiu.lu@intel.com>
22
23 * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
24 prefetchw.
25
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L
262010-08-06 Quentin Neill <quentin.neill@amd.com>
27
28 * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
29 to processor flags for PENTIUMPRO processors and later.
30 * i386-opc.h (enum): Add CpuNop.
31 (i386_cpu_flags): Add cpunop bit.
32 * i386-opc.tbl: Change nop cpu_flags.
33 * i386-init.h: Regenerated.
34 * i386-tbl.h: Likewise.
35
b49dfb4a
L
362010-08-06 Quentin Neill <quentin.neill@amd.com>
37
38 * i386-opc.h (enum): Fix typos in comments.
39
6ca4eb77
AM
402010-08-06 Alan Modra <amodra@gmail.com>
41
42 * disassemble.c: Formatting.
43 (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
44
92d4d42e
L
452010-08-05 H.J. Lu <hongjiu.lu@intel.com>
46
47 * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
48 * i386-tbl.h: Regenerated.
49
b414985b
L
502010-08-05 H.J. Lu <hongjiu.lu@intel.com>
51
52 * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
53
54 * i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b.
55 * i386-tbl.h: Regenerated.
56
f9c7014e
DD
572010-07-29 DJ Delorie <dj@redhat.com>
58
59 * rx-decode.opc (SRR): New.
60 (rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
61 r0,r0) and NOP3 (max r0,r0) special cases.
62 * rx-decode.c: Regenerate.
6ca4eb77 63
592a252b
L
642010-07-28 H.J. Lu <hongjiu.lu@intel.com>
65
66 * i386-dis.c: Add 0F to VEX opcode enums.
67
3cf79a01
DD
682010-07-27 DJ Delorie <dj@redhat.com>
69
70 * rx-decode.opc (store_flags): Remove, replace with F_* macros.
71 (rx_decode_opcode): Likewise.
72 * rx-decode.c: Regenerate.
73
1cd986c5
NC
742010-07-23 Naveen.H.S <naveen.S@kpitcummins.com>
75 Ina Pandit <ina.pandit@kpitcummins.com>
76
77 * v850-dis.c (v850_sreg_names): Updated structure for system
78 registers.
79 (float_cc_names): new structure for condition codes.
80 (print_value): Update the function that prints value.
81 (get_operand_value): New function to get the operand value.
82 (disassemble): Updated to handle the disassembly of instructions.
83 (print_insn_v850): Updated function to print instruction for different
84 families.
85 * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
86 extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
87 extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
88 insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
89 extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
90 extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
91 extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
92 insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
93 (insert_d8_7, insert_d5_4, insert_i5div): Remove.
94 (v850_operands): Update with the relocation name. Also update
95 the instructions with specific set of processors.
96
52e7f43d
RE
972010-07-08 Tejas Belagod <tejas.belagod@arm.com>
98
99 * arm-dis.c (print_insn_arm): Add cases for printing more
100 symbolic operands.
101 (print_insn_thumb32): Likewise.
102
c680e7f6
MR
1032010-07-06 Maciej W. Rozycki <macro@codesourcery.com>
104
105 * mips-dis.c (print_insn_mips): Correct branch instruction type
106 determination.
107
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MR
1082010-07-06 Maciej W. Rozycki <macro@codesourcery.com>
109
110 * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
111 type and delay slot determination.
112 (print_insn_mips16): Extend branch instruction type and delay
113 slot determination to cover all instructions.
114 * mips16-opc.c (BR): Remove macro.
115 (UBR, CBR): New macros.
116 (mips16_opcodes): Update branch annotation for "b", "beqz",
117 "bnez", "bteqz" and "btnez". Add branch annotation for "jalrc"
118 and "jrc".
119
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1202010-07-05 H.J. Lu <hongjiu.lu@intel.com>
121
122 AVX Programming Reference (June, 2010)
123 * i386-dis.c (mod_table): Replace rdrnd with rdrand.
124 * i386-opc.tbl: Likewise.
125 * i386-tbl.h: Regenerated.
126
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L
1272010-07-05 H.J. Lu <hongjiu.lu@intel.com>
128
129 * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
130
7102e95e
AS
1312010-07-03 Andreas Schwab <schwab@linux-m68k.org>
132
133 * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
134 ppc_cpu_t before inverting.
3a5530ea
AS
135 (ppc_parse_cpu): Likewise.
136 (print_insn_powerpc): Likewise.
7102e95e 137
bdc70b4a
AM
1382010-07-03 Alan Modra <amodra@gmail.com>
139
140 * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
141 * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
142 (PPC64, MFDEC2): Update.
143 (NON32, NO371): Define.
144 (powerpc_opcode): Update to not use old opcode flags, and avoid
145 -m601 duplicates.
146
21375995
DD
1472010-07-03 DJ Delorie <dj@delorie.com>
148
149 * m32c-ibld.c: Regenerate.
150
81a0b7e2
AM
1512010-07-03 Alan Modra <amodra@gmail.com>
152
153 * ppc-opc.c (PWR2COM): Define.
154 (PPCPWR2): Add PPC_OPCODE_COMMON.
155 (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
156 "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
157 "rac" from -mcom.
158
c7b8aa3a
L
1592010-07-01 H.J. Lu <hongjiu.lu@intel.com>
160
161 AVX Programming Reference (June, 2010)
162 * i386-dis.c (PREFIX_0FAE_REG_0): New.
163 (PREFIX_0FAE_REG_1): Likewise.
164 (PREFIX_0FAE_REG_2): Likewise.
165 (PREFIX_0FAE_REG_3): Likewise.
166 (PREFIX_VEX_3813): Likewise.
167 (PREFIX_VEX_3A1D): Likewise.
168 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
169 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
170 PREFIX_VEX_3A1D.
171 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
172 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
173 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
174
175 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
176 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
177 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
178
179 * i386-opc.h (CpuXsaveopt): New.
77321f53 180 (CpuFSGSBase): Likewise.
c7b8aa3a
L
181 (CpuRdRnd): Likewise.
182 (CpuF16C): Likewise.
183 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
184 cpuf16c.
185
186 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
187 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
a00eb5e8
L
188 * i386-init.h: Regenerated.
189 * i386-tbl.h: Likewise.
c7b8aa3a 190
09a8ad8d
AM
1912010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
192
193 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
194 and mtocrf on EFS.
195
360cfc9c
AM
1962010-06-29 Alan Modra <amodra@gmail.com>
197
198 * maxq-dis.c: Delete file.
199 * Makefile.am: Remove references to maxq.
200 * configure.in: Likewise.
201 * disassemble.c: Likewise.
202 * Makefile.in: Regenerate.
203 * configure: Regenerate.
204 * po/POTFILES.in: Regenerate.
205
dc898d5e
AM
2062010-06-29 Alan Modra <amodra@gmail.com>
207
208 * mep-dis.c: Regenerate.
209
8e560766
MGD
2102010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
211
212 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
213
c7e2358a
AM
2142010-06-27 Alan Modra <amodra@gmail.com>
215
216 * arc-dis.c (arc_sprintf): Delete set but unused variables.
217 (decodeInstr): Likewise.
218 * dlx-dis.c (print_insn_dlx): Likewise.
219 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
220 * maxq-dis.c (check_move, print_insn): Likewise.
221 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
222 * msp430-dis.c (msp430_branchinstr): Likewise.
223 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
224 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
225 * sparc-dis.c (print_insn_sparc): Likewise.
226 * fr30-asm.c: Regenerate.
227 * frv-asm.c: Regenerate.
228 * ip2k-asm.c: Regenerate.
229 * iq2000-asm.c: Regenerate.
230 * lm32-asm.c: Regenerate.
231 * m32c-asm.c: Regenerate.
232 * m32r-asm.c: Regenerate.
233 * mep-asm.c: Regenerate.
234 * mt-asm.c: Regenerate.
235 * openrisc-asm.c: Regenerate.
236 * xc16x-asm.c: Regenerate.
237 * xstormy16-asm.c: Regenerate.
238
6ffe3d99
NC
2392010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
240
241 PR gas/11673
242 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
243
09ec0d17
NC
2442010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
245
246 PR binutils/11676
247 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
248
e01d869a
AM
2492010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
250
251 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
252 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
253 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
254 touch floating point regs and are enabled by COM, PPC or PPCCOM.
255 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
256 Treat lwsync as msync on e500.
257
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MGD
2582010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
259
260 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
261
9d82ec38
MGD
2622010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
263
e01d869a 264 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
9d82ec38
MGD
265 constants is the same on 32-bit and 64-bit hosts.
266
c3a6ea62 2672010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
d8b24b95
NC
268
269 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
270 .short directives so that they can be reassembled.
271
9db8dccb
CM
2722010-05-26 Catherine Moore <clm@codesourcery.com>
273 David Ung <davidu@mips.com>
274
275 * mips-opc.c: Change membership to I1 for instructions ssnop and
276 ehb.
277
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L
2782010-05-26 H.J. Lu <hongjiu.lu@intel.com>
279
280 * i386-dis.c (sib): New.
281 (get_sib): Likewise.
282 (print_insn): Call get_sib.
283 OP_E_memory): Use sib.
284
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CM
2852010-05-26 Catherine Moore <clm@codesoourcery.com>
286
287 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
288 * mips-opc.c (I16): Remove.
289 (mips_builtin_op): Reclassify jalx.
290
51b5d4a8
AM
2912010-05-19 Alan Modra <amodra@gmail.com>
292
293 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
294 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
295
85d4ac0b
AM
2962010-05-13 Alan Modra <amodra@gmail.com>
297
298 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
299
4547cb56
NC
3002010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
301
302 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
303 format.
304 (print_insn_thumb16): Add support for new %W format.
305
6540b386
TG
3062010-05-07 Tristan Gingold <gingold@adacore.com>
307
308 * Makefile.in: Regenerate with automake 1.11.1.
309 * aclocal.m4: Ditto.
310
3e01a7fd
NC
3112010-05-05 Nick Clifton <nickc@redhat.com>
312
313 * po/es.po: Updated Spanish translation.
314
9c9c98a5
NC
3152010-04-22 Nick Clifton <nickc@redhat.com>
316
317 * po/opcodes.pot: Updated by the Translation project.
318 * po/vi.po: Updated Vietnamese translation.
319
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L
3202010-04-16 H.J. Lu <hongjiu.lu@intel.com>
321
322 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
323 bits in opcode.
324
3d540e93
NC
3252010-04-09 Nick Clifton <nickc@redhat.com>
326
327 * i386-dis.c (print_insn): Remove unused variable op.
328 (OP_sI): Remove unused variable mask.
329
397841b5
AM
3302010-04-07 Alan Modra <amodra@gmail.com>
331
332 * configure: Regenerate.
333
cee62821
PB
3342010-04-06 Peter Bergner <bergner@vnet.ibm.com>
335
336 * ppc-opc.c (RBOPT): New define.
337 ("dccci"): Enable for PPCA2. Make operands optional.
338 ("iccci"): Likewise. Do not deprecate for PPC476.
339
accf4463
NC
3402010-04-02 Masaki Muranaka <monaka@monami-software.com>
341
342 * cr16-opc.c (cr16_instruction): Fix typo in comment.
343
40b36596
JM
3442010-03-25 Joseph Myers <joseph@codesourcery.com>
345
346 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
347 * Makefile.in: Regenerate.
348 * configure.in (bfd_tic6x_arch): New.
349 * configure: Regenerate.
350 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
351 (disassembler): Handle TI C6X.
352 * tic6x-dis.c: New.
353
1985c81c
MF
3542010-03-24 Mike Frysinger <vapier@gentoo.org>
355
356 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
357
f66187fd
JM
3582010-03-23 Joseph Myers <joseph@codesourcery.com>
359
360 * dis-buf.c (buffer_read_memory): Give error for reading just
361 before the start of memory.
362
ce7d077e
SP
3632010-03-22 Sebastian Pop <sebastian.pop@amd.com>
364 Quentin Neill <quentin.neill@amd.com>
365
366 * i386-dis.c (OP_LWP_I): Removed.
367 (reg_table): Do not use OP_LWP_I, use Iq.
368 (OP_LWPCB_E): Remove use of names16.
369 (OP_LWP_E): Same.
370 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
371 should not set the Vex.length bit.
372 * i386-tbl.h: Regenerated.
373
63d0fa4e
AM
3742010-02-25 Edmar Wienskoski <edmar@freescale.com>
375
376 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
377
c060226a
NC
3782010-02-24 Nick Clifton <nickc@redhat.com>
379
380 PR binutils/6773
381 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
382 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
383 (thumb32_opcodes): Likewise.
384
ab7875de
NC
3852010-02-15 Nick Clifton <nickc@redhat.com>
386
387 * po/vi.po: Updated Vietnamese translation.
388
fee1d3e8
DE
3892010-02-12 Doug Evans <dje@sebabeach.org>
390
391 * lm32-opinst.c: Regenerate.
392
37ec9240
DE
3932010-02-11 Doug Evans <dje@sebabeach.org>
394
9468ae89
DE
395 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
396 (print_address): Delete CGEN_PRINT_ADDRESS.
397 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
398 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
399 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
400 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
401
37ec9240
DE
402 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
403 * frv-desc.c, * frv-desc.h, * frv-opc.c,
404 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
405 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
406 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
407 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
408 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
409 * mep-desc.c, * mep-desc.h, * mep-opc.c,
410 * mt-desc.c, * mt-desc.h, * mt-opc.c,
411 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
412 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
413 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
414
c75ef631
L
4152010-02-11 H.J. Lu <hongjiu.lu@intel.com>
416
417 * i386-dis.c: Update copyright.
418 * i386-gen.c: Likewise.
419 * i386-opc.h: Likewise.
420 * i386-opc.tbl: Likewise.
421
a683cc34
SP
4222010-02-10 Quentin Neill <quentin.neill@amd.com>
423 Sebastian Pop <sebastian.pop@amd.com>
424
425 * i386-dis.c (OP_EX_VexImmW): Reintroduced
426 function to handle 5th imm8 operand.
427 (PREFIX_VEX_3A48): Added.
428 (PREFIX_VEX_3A49): Added.
429 (VEX_W_3A48_P_2): Added.
430 (VEX_W_3A49_P_2): Added.
431 (prefix table): Added entries for PREFIX_VEX_3A48
432 and PREFIX_VEX_3A49.
433 (vex table): Added entries for VEX_W_3A48_P_2 and
434 and VEX_W_3A49_P_2.
435 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
436 for Vec_Imm4 operands.
437 * i386-opc.h (enum): Added Vec_Imm4.
438 (i386_operand_type): Added vec_imm4.
439 * i386-opc.tbl: Add entries for vpermilp[ds].
440 * i386-init.h: Regenerated.
441 * i386-tbl.h: Regenerated.
442
cdc51b07
RS
4432010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
444
445 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
446 and "pwr7". Move "a2" into alphabetical order.
447
ce3d2015
AM
4482010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
449
450 * ppc-dis.c (ppc_opts): Add titan entry.
451 * ppc-opc.c (TITAN, MULHW): Define.
452 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
453
68339fdf
SP
4542010-02-03 Quentin Neill <quentin.neill@amd.com>
455
456 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
457 to CPU_BDVER1_FLAGS
458 * i386-init.h: Regenerated.
459
f3d55a94
AG
4602010-02-03 Anthony Green <green@moxielogic.com>
461
462 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
463 0x0f, and make 0x00 an illegal instruction.
464
b0e28b39
DJ
4652010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
466
467 * opcodes/arm-dis.c (struct arm_private_data): New.
468 (print_insn_coprocessor, print_insn_arm): Update to use struct
469 arm_private_data.
470 (is_mapping_symbol, get_map_sym_type): New functions.
471 (get_sym_code_type): Check the symbol's section. Do not check
472 mapping symbols.
473 (print_insn): Default to disassembling ARM mode code. Check
474 for mapping symbols separately from other symbols. Use
475 struct arm_private_data.
476
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4772010-01-28 H.J. Lu <hongjiu.lu@intel.com>
478
479 * i386-dis.c (EXVexWdqScalar): New.
480 (vex_scalar_w_dq_mode): Likewise.
481 (prefix_table): Update entries for PREFIX_VEX_3899,
482 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
483 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
484 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
485 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
486 (intel_operand_size): Handle vex_scalar_w_dq_mode.
487 (OP_EX): Likewise.
488
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4892010-01-27 H.J. Lu <hongjiu.lu@intel.com>
490
491 * i386-dis.c (XMScalar): New.
492 (EXdScalar): Likewise.
493 (EXqScalar): Likewise.
494 (EXqScalarS): Likewise.
495 (VexScalar): Likewise.
496 (EXdVexScalarS): Likewise.
497 (EXqVexScalarS): Likewise.
498 (XMVexScalar): Likewise.
499 (scalar_mode): Likewise.
500 (d_scalar_mode): Likewise.
501 (d_scalar_swap_mode): Likewise.
502 (q_scalar_mode): Likewise.
503 (q_scalar_swap_mode): Likewise.
504 (vex_scalar_mode): Likewise.
505 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
506 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
507 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
508 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
509 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
510 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
511 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
512 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
513 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
514 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
515 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
516 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
517 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
518 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
519 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
520 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
521 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
522 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
523 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
524 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
525 q_scalar_mode, q_scalar_swap_mode.
526 (OP_XMM): Handle scalar_mode.
527 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
528 and q_scalar_swap_mode.
529 (OP_VEX): Handle vex_scalar_mode.
530
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5312010-01-24 H.J. Lu <hongjiu.lu@intel.com>
532
533 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
534
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5352010-01-24 H.J. Lu <hongjiu.lu@intel.com>
536
537 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
538
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5392010-01-24 H.J. Lu <hongjiu.lu@intel.com>
540
541 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
542
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5432010-01-24 H.J. Lu <hongjiu.lu@intel.com>
544
545 * i386-dis.c (Bad_Opcode): New.
546 (bad_opcode): Likewise.
547 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
548 (dis386_twobyte): Likewise.
549 (reg_table): Likewise.
550 (prefix_table): Likewise.
551 (x86_64_table): Likewise.
552 (vex_len_table): Likewise.
553 (vex_w_table): Likewise.
554 (mod_table): Likewise.
555 (rm_table): Likewise.
556 (float_reg): Likewise.
557 (reg_table): Remove trailing "(bad)" entries.
558 (prefix_table): Likewise.
559 (x86_64_table): Likewise.
560 (vex_len_table): Likewise.
561 (vex_w_table): Likewise.
562 (mod_table): Likewise.
563 (rm_table): Likewise.
564 (get_valid_dis386): Handle bytemode 0.
565
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5662010-01-23 H.J. Lu <hongjiu.lu@intel.com>
567
568 * i386-opc.h (VEXScalar): New.
569
570 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
571 instructions.
572 * i386-tbl.h: Regenerated.
573
706e8205 5742010-01-21 H.J. Lu <hongjiu.lu@intel.com>
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575
576 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
577
578 * i386-opc.tbl: Add xsave64 and xrstor64.
579 * i386-tbl.h: Regenerated.
580
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5812010-01-20 Nick Clifton <nickc@redhat.com>
582
583 PR 11170
584 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
585 based post-indexed addressing.
586
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5872010-01-15 Sebastian Pop <sebastian.pop@amd.com>
588
589 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
590 * i386-tbl.h: Regenerated.
591
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5922010-01-14 H.J. Lu <hongjiu.lu@intel.com>
593
594 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
595 comments.
596
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5972010-01-14 H.J. Lu <hongjiu.lu@intel.com>
598
599 * i386-dis.c (names_mm): New.
600 (intel_names_mm): Likewise.
601 (att_names_mm): Likewise.
602 (names_xmm): Likewise.
603 (intel_names_xmm): Likewise.
604 (att_names_xmm): Likewise.
605 (names_ymm): Likewise.
606 (intel_names_ymm): Likewise.
607 (att_names_ymm): Likewise.
608 (print_insn): Set names_mm, names_xmm and names_ymm.
609 (OP_MMX): Use names_mm, names_xmm and names_ymm.
610 (OP_XMM): Likewise.
611 (OP_EM): Likewise.
612 (OP_EMC): Likewise.
613 (OP_MXC): Likewise.
614 (OP_EX): Likewise.
615 (XMM_Fixup): Likewise.
616 (OP_VEX): Likewise.
617 (OP_EX_VexReg): Likewise.
618 (OP_Vex_2src): Likewise.
619 (OP_Vex_2src_1): Likewise.
620 (OP_Vex_2src_2): Likewise.
621 (OP_REG_VexI4): Likewise.
622
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6232010-01-13 H.J. Lu <hongjiu.lu@intel.com>
624
625 * i386-dis.c (print_insn): Update comments.
626
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6272010-01-12 H.J. Lu <hongjiu.lu@intel.com>
628
629 * i386-dis.c (rex_original): Removed.
630 (ckprefix): Remove rex_original.
631 (print_insn): Update comments.
632
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6332010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
634
635 * Makefile.in: Regenerate.
636 * configure: Regenerate.
637
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6382010-01-07 Doug Evans <dje@sebabeach.org>
639
640 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
641 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
642 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
643 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
644 * xstormy16-ibld.c: Regenerate.
645
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6462010-01-06 Quentin Neill <quentin.neill@amd.com>
647
648 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
649 * i386-init.h: Regenerated.
650
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6512010-01-06 Daniel Gutson <dgutson@codesourcery.com>
652
653 * arm-dis.c (print_insn): Fixed search for next symbol and data
654 dumping condition, and the initial mapping symbol state.
655
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6562010-01-05 Doug Evans <dje@sebabeach.org>
657
658 * cgen-ibld.in: #include "cgen/basic-modes.h".
659 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
660 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
661 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
662 * xstormy16-ibld.c: Regenerate.
663
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6642010-01-04 Nick Clifton <nickc@redhat.com>
665
666 PR 11123
667 * arm-dis.c (print_insn_coprocessor): Initialise value.
668
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6692010-01-04 Edmar Wienskoski <edmar@freescale.com>
670
671 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
672
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6732010-01-02 Doug Evans <dje@sebabeach.org>
674
675 * cgen-asm.in: Update copyright year.
676 * cgen-dis.in: Update copyright year.
677 * cgen-ibld.in: Update copyright year.
678 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
679 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
680 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
681 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
682 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
683 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
684 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
685 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
686 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
687 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
688 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
689 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
690 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
691 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
692 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
693 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
694 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
695 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
696 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
697 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
698 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f 699
43ecc30f 700For older changes see ChangeLog-2009
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701\f
702Local Variables:
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703mode: change-log
704left-margin: 8
705fill-column: 74
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706version-control: never
707End:
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