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2005-07-29 Paul Brook <paul@codesourcery.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
92e90b6e
PB		 12005-07-29 Paul Brook <paul@codesourcery.com>
2
3 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
4 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
5
fd54057a
DD		 62005-07-25 DJ Delorie <dj@redhat.com>
7
8 * m32c-asm.c Regenerate.
9 * m32c-dis.c Regenerate.
10
760c0f6a
DD		 112005-07-20 DJ Delorie <dj@redhat.com>
12
13 * disassemble.c (disassemble_init_for_target): M32C ISAs are
14 enums, so convert them to bit masks, which attributes are.
15
85da3a56
NC		 162005-07-18 Nick Clifton <nickc@redhat.com>
17
18 * configure.in: Restore alpha ordering to list of arches.
19 * configure: Regenerate.
20 * disassemble.c: Restore alpha ordering to list of arches.
21
222005-07-18 Nick Clifton <nickc@redhat.com>
23
24 * m32c-asm.c: Regenerate.
25 * m32c-desc.c: Regenerate.
26 * m32c-desc.h: Regenerate.
27 * m32c-dis.c: Regenerate.
28 * m32c-ibld.h: Regenerate.
29 * m32c-opc.c: Regenerate.
30 * m32c-opc.h: Regenerate.
31
22cbf2e7
L		 322005-07-18 H.J. Lu <hongjiu.lu@intel.com>
33
34 * i386-dis.c (PNI_Fixup): Update comment.
35 (VMX_Fixup): Properly handle the suffix check.
36
0aea0460
DA		 372005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
38
39 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
40 mfctl disassembly.
41
0f82ff91
AM		 422005-07-16 Alan Modra <amodra@bigpond.net.au>
43
44 * Makefile.am: Run "make dep-am".
45 (stamp-m32c): Fix cpu dependencies.
46 * Makefile.in: Regenerate.
47 * ip2k-dis.c: Regenerate.
48
90700ea2
L		 492007-07-15 H.J. Lu <hongjiu.lu@intel.com>
50
51 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
52 (VMX_Fixup): New. Fix up Intel VMX Instructions.
53 (Em): New.
54 (Gm): New.
55 (VM): New.
56 (dis386_twobyte): Updated entries 0x78 and 0x79.
57 (twobyte_has_modrm): Likewise.
58 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
59 (OP_G): Handle m_mode.
60
49f58d10
JB		 612005-07-14 Jim Blandy <jimb@redhat.com>
62
63 Add support for the Renesas M32C and M16C.
64 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
65 * m32c-desc.h, m32c-opc.h: New.
66 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
67 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
68 m32c-opc.c.
69 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
70 m32c-ibld.lo, m32c-opc.lo.
71 (CLEANFILES): List stamp-m32c.
72 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
73 (CGEN_CPUS): Add m32c.
74 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
75 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
76 (m32c_opc_h): New variable.
77 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
78 (m32c-opc.lo): New rules.
79 * Makefile.in: Regenerated.
80 * configure.in: Add case for bfd_m32c_arch.
81 * configure: Regenerated.
82 * disassemble.c (ARCH_m32c): New.
83 [ARCH_m32c]: #include "m32c-desc.h".
84 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
85 (disassemble_init_for_target) [ARCH_m32c]: Same.
86
87 * cgen-ops.h, cgen-types.h: New files.
88 * Makefile.am (HFILES): List them.
89 * Makefile.in: Regenerated.
90
0fd3a477
JW		 912005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
92
93 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
94 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
95 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
96 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
97 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
98 v850-dis.c: Fix format bugs.
99 * ia64-gen.c (fail, warn): Add format attribute.
100 * or32-opc.c (debug): Likewise.
101
22f8fcbd
NC		 1022005-07-07 Khem Raj <kraj@mvista.com>
103
104 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
105 disassembly pattern.
106
d125c27b
AM		 1072005-07-06 Alan Modra <amodra@bigpond.net.au>
108
109 * Makefile.am (stamp-m32r): Fix path to cpu files.
110 (stamp-m32r, stamp-iq2000): Likewise.
111 * Makefile.in: Regenerate.
112 * m32r-asm.c: Regenerate.
113 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
114 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
115
3ec2b351
NC		 1162005-07-05 Nick Clifton <nickc@redhat.com>
117
118 * iq2000-asm.c: Regenerate.
119 * ms1-asm.c: Regenerate.
120
30123838
JB		 1212005-07-05 Jan Beulich <jbeulich@novell.com>
122
123 * i386-dis.c (SVME_Fixup): New.
124 (grps): Use it for the lidt entry.
125 (PNI_Fixup): Call OP_M rather than OP_E.
126 (INVLPG_Fixup): Likewise.
127
b0eec63e
L		 1282005-07-04 H.J. Lu <hongjiu.lu@intel.com>
129
130 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
131
47b0e7ad
NC		 1322005-07-01 Nick Clifton <nickc@redhat.com>
133
134 * a29k-dis.c: Update to ISO C90 style function declarations and
135 fix formatting.
136 * alpha-opc.c: Likewise.
137 * arc-dis.c: Likewise.
138 * arc-opc.c: Likewise.
139 * avr-dis.c: Likewise.
140 * cgen-asm.in: Likewise.
141 * cgen-dis.in: Likewise.
142 * cgen-ibld.in: Likewise.
143 * cgen-opc.c: Likewise.
144 * cris-dis.c: Likewise.
145 * d10v-dis.c: Likewise.
146 * d30v-dis.c: Likewise.
147 * d30v-opc.c: Likewise.
148 * dis-buf.c: Likewise.
149 * dlx-dis.c: Likewise.
150 * h8300-dis.c: Likewise.
151 * h8500-dis.c: Likewise.
152 * hppa-dis.c: Likewise.
153 * i370-dis.c: Likewise.
154 * i370-opc.c: Likewise.
155 * m10200-dis.c: Likewise.
156 * m10300-dis.c: Likewise.
157 * m68k-dis.c: Likewise.
158 * m88k-dis.c: Likewise.
159 * mips-dis.c: Likewise.
160 * mmix-dis.c: Likewise.
161 * msp430-dis.c: Likewise.
162 * ns32k-dis.c: Likewise.
163 * or32-dis.c: Likewise.
164 * or32-opc.c: Likewise.
165 * pdp11-dis.c: Likewise.
166 * pj-dis.c: Likewise.
167 * s390-dis.c: Likewise.
168 * sh-dis.c: Likewise.
169 * sh64-dis.c: Likewise.
170 * sparc-dis.c: Likewise.
171 * sparc-opc.c: Likewise.
172 * sysdep.h: Likewise.
173 * tic30-dis.c: Likewise.
174 * tic4x-dis.c: Likewise.
175 * tic80-dis.c: Likewise.
176 * v850-dis.c: Likewise.
177 * v850-opc.c: Likewise.
178 * vax-dis.c: Likewise.
179 * w65-dis.c: Likewise.
180 * z8kgen.c: Likewise.
181
182 * fr30-*: Regenerate.
183 * frv-*: Regenerate.
184 * ip2k-*: Regenerate.
185 * iq2000-*: Regenerate.
186 * m32r-*: Regenerate.
187 * ms1-*: Regenerate.
188 * openrisc-*: Regenerate.
189 * xstormy16-*: Regenerate.
190
cc16ba8c
BE		 1912005-06-23 Ben Elliston <bje@gnu.org>
192
193 * m68k-dis.c: Use ISC C90.
194 * m68k-opc.c: Formatting fixes.
195
4b185e97
DU		 1962005-06-16 David Ung <davidu@mips.com>
197
198 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
199 instructions to the table; seb/seh/sew/zeb/zeh/zew.
200
ac188222
DB		 2012005-06-15 Dave Brolley <brolley@redhat.com>
202
203 Contribute Morpho ms1 on behalf of Red Hat
204 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
205 ms1-opc.h: New files, Morpho ms1 target.
206
207 2004-05-14 Stan Cox <scox@redhat.com>
208
209 * disassemble.c (ARCH_ms1): Define.
210 (disassembler): Handle bfd_arch_ms1
211
212 2004-05-13 Michael Snyder <msnyder@redhat.com>
213
214 * Makefile.am, Makefile.in: Add ms1 target.
215 * configure.in: Ditto.
216
6b5d3a4d
ZW		 2172005-06-08 Zack Weinberg <zack@codesourcery.com>
218
219 * arm-opc.h: Delete; fold contents into ...
220 * arm-dis.c: ... here. Move includes of internal COFF headers
221 next to includes of internal ELF headers.
222 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
223 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
224 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
225 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
226 (iwmmxt_wwnames, iwmmxt_wwssnames):
227 Make const.
228 (regnames): Remove iWMMXt coprocessor register sets.
229 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
230 (get_arm_regnames): Adjust fourth argument to match above changes.
231 (set_iwmmxt_regnames): Delete.
232 (print_insn_arm): Constify 'c'. Use ISO syntax for function
233 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
234 and iwmmxt_cregnames, not set_iwmmxt_regnames.
235 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
236 ISO syntax for function pointer calls.
237
4a5329c6
ZW		 2382005-06-07 Zack Weinberg <zack@codesourcery.com>
239
240 * arm-dis.c: Split up the comments describing the format codes, so
241 that the ARM and 16-bit Thumb opcode tables each have comments
242 preceding them that describe all the codes, and only the codes,
243 valid in those tables. (32-bit Thumb table is already like this.)
244 Reorder the lists in all three comments to match the order in
245 which the codes are implemented.
246 Remove all forward declarations of static functions. Convert all
247 function definitions to ISO C format.
248 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
249 Return nothing.
250 (print_insn_thumb16): Remove unused case 'I'.
251 (print_insn): Update for changed calling convention of subroutines.
252
3d456fa1
JB		 2532005-05-25 Jan Beulich <jbeulich@novell.com>
254
255 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
256 hex (but retain it being displayed as signed). Remove redundant
257 checks. Add handling of displacements for 16-bit addressing in Intel
258 mode.
259
2888cb7a
JB		 2602005-05-25 Jan Beulich <jbeulich@novell.com>
261
262 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
263 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
264 masking of 'rm' in 16-bit memory address handling.
265
1ed8e1e4
AM		 2662005-05-19 Anton Blanchard <anton@samba.org>
267
268 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
269 (print_ppc_disassembler_options): Document it.
270 * ppc-opc.c (SVC_LEV): Define.
271 (LEV): Allow optional operand.
272 (POWER5): Define.
273 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
274 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
275
49cc2e69
KC		 2762005-05-19 Kelley Cook <kcook@gcc.gnu.org>
277
278 * Makefile.in: Regenerate.
279
c19d1205
ZW		 2802005-05-17 Zack Weinberg <zack@codesourcery.com>
281
282 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
283 instructions. Adjust disassembly of some opcodes to match
284 unified syntax.
285 (thumb32_opcodes): New table.
286 (print_insn_thumb): Rename print_insn_thumb16; don't handle
287 two-halfword branches here.
288 (print_insn_thumb32): New function.
289 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
290 and print_insn_thumb32. Be consistent about order of
291 halfwords when printing 32-bit instructions.
292
003519a7
L		 2932005-05-07 H.J. Lu <hongjiu.lu@intel.com>
294
295 PR 843
296 * i386-dis.c (branch_v_mode): New.
297 (indirEv): Use branch_v_mode instead of v_mode.
298 (OP_E): Handle branch_v_mode.
299
920a34a7
L		 3002005-05-07 H.J. Lu <hongjiu.lu@intel.com>
301
302 * d10v-dis.c (dis_2_short): Support 64bit host.
303
5de773c1
NC		 3042005-05-07 Nick Clifton <nickc@redhat.com>
305
306 * po/nl.po: Updated translation.
307
f4321104
NC		 3082005-05-07 Nick Clifton <nickc@redhat.com>
309
310 * Update the address and phone number of the FSF organization in
311 the GPL notices in the following files:
312 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
313 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
314 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
315 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
316 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
317 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
318 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
319 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
320 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
321 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
322 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
323 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
324 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
325 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
326 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
327 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
328 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
329 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
330 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
331 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
332 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
333 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
334 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
335 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
336 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
337 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
338 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
339 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
340 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
341 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
342 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
343 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
344 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
345
10b076a2
JW		 3462005-05-05 James E Wilson <wilson@specifixinc.com>
347
348 * ia64-opc.c: Include sysdep.h before libiberty.h.
349
022716b6
NC		 3502005-05-05 Nick Clifton <nickc@redhat.com>
351
352 * configure.in (ALL_LINGUAS): Add vi.
353 * configure: Regenerate.
354 * po/vi.po: New.
355
db5152b4
JG		 3562005-04-26 Jerome Guitton <guitton@gnat.com>
357
358 * configure.in: Fix the check for basename declaration.
359 * configure: Regenerate.
360
eed0d89a
AM		 3612005-04-19 Alan Modra <amodra@bigpond.net.au>
362
363 * ppc-opc.c (RTO): Define.
364 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
365 entries to suit PPC440.
366
791fe849
MK		 3672005-04-18 Mark Kettenis <kettenis@gnu.org>
368
369 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
370 Add xcrypt-ctr.
371
ffe58f7c
NC		 3722005-04-14 Nick Clifton <nickc@redhat.com>
373
374 * po/fi.po: New translation: Finnish.
375 * configure.in (ALL_LINGUAS): Add fi.
376 * configure: Regenerate.
377
9e9b66a9
AM		 3782005-04-14 Alan Modra <amodra@bigpond.net.au>
379
380 * Makefile.am (NO_WERROR): Define.
381 * configure.in: Invoke AM_BINUTILS_WARNINGS.
382 * Makefile.in: Regenerate.
383 * aclocal.m4: Regenerate.
384 * configure: Regenerate.
385
9494d739
NC		 3862005-04-04 Nick Clifton <nickc@redhat.com>
387
388 * fr30-asm.c: Regenerate.
389 * frv-asm.c: Regenerate.
390 * iq2000-asm.c: Regenerate.
391 * m32r-asm.c: Regenerate.
392 * openrisc-asm.c: Regenerate.
393
6128c599
JB		 3942005-04-01 Jan Beulich <jbeulich@novell.com>
395
396 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
397 visible operands in Intel mode. The first operand of monitor is
398 %rax in 64-bit mode.
399
373ff435
JB		 4002005-04-01 Jan Beulich <jbeulich@novell.com>
401
402 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
403 easier future additions.
404
4bd60896
JG		 4052005-03-31 Jerome Guitton <guitton@gnat.com>
406
407 * configure.in: Check for basename.
408 * configure: Regenerate.
409 * config.in: Ditto.
410
4cc91dba
L		 4112005-03-29 H.J. Lu <hongjiu.lu@intel.com>
412
413 * i386-dis.c (SEG_Fixup): New.
414 (Sv): New.
415 (dis386): Use "Sv" for 0x8c and 0x8e.
416
ec72cfe5
NC		 4172005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
418 Nick Clifton <nickc@redhat.com>
c19d1205 419
ec72cfe5
NC		 420 * vax-dis.c: (entry_addr): New varible: An array of user supplied
421 function entry mask addresses.
422 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 423 elements in entry_addr.
ec72cfe5
NC		 424 (entry_addr_total_slots): New variable: The total number of
425 elements in entry_addr.
426 (parse_disassembler_options): New function. Fills in the entry_addr
427 array.
428 (free_entry_array): New function. Release the memory used by the
429 entry addr array. Suppressed because there is no way to call it.
430 (is_function_entry): Check if a given address is a function's
431 start address by looking at supplied entry mask addresses and
432 symbol information, if available.
433 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
434
85064c79
L		 4352005-03-23 H.J. Lu <hongjiu.lu@intel.com>
436
437 * cris-dis.c (print_with_operands): Use ~31L for long instead
438 of ~31.
439
de7141c7
L		 4402005-03-20 H.J. Lu <hongjiu.lu@intel.com>
441
442 * mmix-opc.c (O): Revert the last change.
443 (Z): Likewise.
444
e493ab45
L		 4452005-03-19 H.J. Lu <hongjiu.lu@intel.com>
446
447 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
448 (Z): Likewise.
449
d8d7c459
HPN		 4502005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
451
452 * mmix-opc.c (O, Z): Force expression as unsigned long.
453
ebdb0383
NC		 4542005-03-18 Nick Clifton <nickc@redhat.com>
455
456 * ip2k-asm.c: Regenerate.
457 * op/opcodes.pot: Regenerate.
458
1ad12f97
NC		 4592005-03-16 Nick Clifton <nickc@redhat.com>
460 Ben Elliston <bje@au.ibm.com>
461
569acd2c 462 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 463 compiler command line. Enabled by default. Disable via
569acd2c 464 --disable-werror.
1ad12f97
NC		 465 * configure: Regenerate.
466
4eb30afc
AM		 4672005-03-16 Alan Modra <amodra@bigpond.net.au>
468
469 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
470 BOOKE.
471
ea8409f7
AM		 4722005-03-15 Alan Modra <amodra@bigpond.net.au>
473
729ae8d2
AM		 474 * po/es.po: Commit new Spanish translation.
475
ea8409f7
AM		 476 * po/fr.po: Commit new French translation.
477
4f495e61
NC		 4782005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
479
480 * vax-dis.c: Fix spelling error
481 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
482 of just "Entry mask: < r1 ... >"
483
0a003adc
ZW		 4842005-03-12 Zack Weinberg <zack@codesourcery.com>
485
486 * arm-dis.c (arm_opcodes): Document %E and %V.
487 Add entries for v6T2 ARM instructions:
488 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
489 (print_insn_arm): Add support for %E and %V.
885fc257 490 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 491
da99ee72
AM		 4922005-03-10 Jeff Baker <jbaker@qnx.com>
493 Alan Modra <amodra@bigpond.net.au>
494
495 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
496 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
497 (SPRG_MASK): Delete.
498 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 499 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 500 mfsprg4..7 after msprg and consolidate.
501
220abb21
AM		 5022005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
503
504 * vax-dis.c (entry_mask_bit): New array.
505 (print_insn_vax): Decode function entry mask.
506
0e06657a
AH		 5072005-03-07 Aldy Hernandez <aldyh@redhat.com>
508
509 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
510
06647dfd
AM		 5112005-03-05 Alan Modra <amodra@bigpond.net.au>
512
513 * po/opcodes.pot: Regenerate.
514
82b829a7
RR		 5152005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
516
220abb21 517 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 518 (dsmOneArcInst): Use the enum values for the decoding class.
519 Remove redundant case in the switch for decodingClass value 11.
82b829a7 520
c4a530c5
JB		 5212005-03-02 Jan Beulich <jbeulich@novell.com>
522
523 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
524 accesses.
525 (OP_C): Consider lock prefix in non-64-bit modes.
526
47d8304e
AM		 5272005-02-24 Alan Modra <amodra@bigpond.net.au>
528
529 * cris-dis.c (format_hex): Remove ineffective warning fix.
530 * crx-dis.c (make_instruction): Warning fix.
531 * frv-asm.c: Regenerate.
532
ec36c4a4
NC		 5332005-02-23 Nick Clifton <nickc@redhat.com>
534
33b71eeb
NC		 535 * cgen-dis.in: Use bfd_byte for buffers that are passed to
536 read_memory.
06647dfd 537
33b71eeb 538 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 539
ec36c4a4
NC		 540 * crx-dis.c (make_instruction): Move argument structure into inner
541 scope and ensure that all of its fields are initialised before
542 they are used.
543
33b71eeb
NC		 544 * fr30-asm.c: Regenerate.
545 * fr30-dis.c: Regenerate.
546 * frv-asm.c: Regenerate.
547 * frv-dis.c: Regenerate.
548 * ip2k-asm.c: Regenerate.
549 * ip2k-dis.c: Regenerate.
550 * iq2000-asm.c: Regenerate.
551 * iq2000-dis.c: Regenerate.
552 * m32r-asm.c: Regenerate.
553 * m32r-dis.c: Regenerate.
554 * openrisc-asm.c: Regenerate.
555 * openrisc-dis.c: Regenerate.
556 * xstormy16-asm.c: Regenerate.
557 * xstormy16-dis.c: Regenerate.
558
53c9ebc5
AM		 5592005-02-22 Alan Modra <amodra@bigpond.net.au>
560
561 * arc-ext.c: Warning fixes.
562 * arc-ext.h: Likewise.
563 * cgen-opc.c: Likewise.
564 * ia64-gen.c: Likewise.
565 * maxq-dis.c: Likewise.
566 * ns32k-dis.c: Likewise.
567 * w65-dis.c: Likewise.
568 * ia64-asmtab.c: Regenerate.
569
610ad19b
AM		 5702005-02-22 Alan Modra <amodra@bigpond.net.au>
571
572 * fr30-desc.c: Regenerate.
573 * fr30-desc.h: Regenerate.
574 * fr30-opc.c: Regenerate.
575 * fr30-opc.h: Regenerate.
576 * frv-desc.c: Regenerate.
577 * frv-desc.h: Regenerate.
578 * frv-opc.c: Regenerate.
579 * frv-opc.h: Regenerate.
580 * ip2k-desc.c: Regenerate.
581 * ip2k-desc.h: Regenerate.
582 * ip2k-opc.c: Regenerate.
583 * ip2k-opc.h: Regenerate.
584 * iq2000-desc.c: Regenerate.
585 * iq2000-desc.h: Regenerate.
586 * iq2000-opc.c: Regenerate.
587 * iq2000-opc.h: Regenerate.
588 * m32r-desc.c: Regenerate.
589 * m32r-desc.h: Regenerate.
590 * m32r-opc.c: Regenerate.
591 * m32r-opc.h: Regenerate.
592 * m32r-opinst.c: Regenerate.
593 * openrisc-desc.c: Regenerate.
594 * openrisc-desc.h: Regenerate.
595 * openrisc-opc.c: Regenerate.
596 * openrisc-opc.h: Regenerate.
597 * xstormy16-desc.c: Regenerate.
598 * xstormy16-desc.h: Regenerate.
599 * xstormy16-opc.c: Regenerate.
600 * xstormy16-opc.h: Regenerate.
601
db9db6f2
AM		 6022005-02-21 Alan Modra <amodra@bigpond.net.au>
603
604 * Makefile.am: Run "make dep-am"
605 * Makefile.in: Regenerate.
606
bf143b25
NC		 6072005-02-15 Nick Clifton <nickc@redhat.com>
608
609 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
610 compile time warnings.
611 (print_keyword): Likewise.
612 (default_print_insn): Likewise.
613
614 * fr30-desc.c: Regenerated.
615 * fr30-desc.h: Regenerated.
616 * fr30-dis.c: Regenerated.
617 * fr30-opc.c: Regenerated.
618 * fr30-opc.h: Regenerated.
619 * frv-desc.c: Regenerated.
620 * frv-dis.c: Regenerated.
621 * frv-opc.c: Regenerated.
622 * ip2k-asm.c: Regenerated.
623 * ip2k-desc.c: Regenerated.
624 * ip2k-desc.h: Regenerated.
625 * ip2k-dis.c: Regenerated.
626 * ip2k-opc.c: Regenerated.
627 * ip2k-opc.h: Regenerated.
628 * iq2000-desc.c: Regenerated.
629 * iq2000-dis.c: Regenerated.
630 * iq2000-opc.c: Regenerated.
631 * m32r-asm.c: Regenerated.
632 * m32r-desc.c: Regenerated.
633 * m32r-desc.h: Regenerated.
634 * m32r-dis.c: Regenerated.
635 * m32r-opc.c: Regenerated.
636 * m32r-opc.h: Regenerated.
637 * m32r-opinst.c: Regenerated.
638 * openrisc-desc.c: Regenerated.
639 * openrisc-desc.h: Regenerated.
640 * openrisc-dis.c: Regenerated.
641 * openrisc-opc.c: Regenerated.
642 * openrisc-opc.h: Regenerated.
643 * xstormy16-desc.c: Regenerated.
644 * xstormy16-desc.h: Regenerated.
645 * xstormy16-dis.c: Regenerated.
646 * xstormy16-opc.c: Regenerated.
647 * xstormy16-opc.h: Regenerated.
648
d6098898
L		 6492005-02-14 H.J. Lu <hongjiu.lu@intel.com>
650
651 * dis-buf.c (perror_memory): Use sprintf_vma to print out
652 address.
653
5a84f3e0
NC		 6542005-02-11 Nick Clifton <nickc@redhat.com>
655
bc18c937
NC		 656 * iq2000-asm.c: Regenerate.
657
5a84f3e0
NC		 658 * frv-dis.c: Regenerate.
659
0a40490e
JB		 6602005-02-07 Jim Blandy <jimb@redhat.com>
661
662 * Makefile.am (CGEN): Load guile.scm before calling the main
663 application script.
664 * Makefile.in: Regenerated.
665 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
666 Simply pass the cgen-opc.scm path to ${cgen} as its first
667 argument; ${cgen} itself now contains the '-s', or whatever is
668 appropriate for the Scheme being used.
669
c46f8c51
AC		 6702005-01-31 Andrew Cagney <cagney@gnu.org>
671
672 * configure: Regenerate to track ../gettext.m4.
673
60b9a617
JB		 6742005-01-31 Jan Beulich <jbeulich@novell.com>
675
676 * ia64-gen.c (NELEMS): Define.
677 (shrink): Generate alias with missing second predicate register when
678 opcode has two outputs and these are both predicates.
679 * ia64-opc-i.c (FULL17): Define.
680 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
681 here to generate output template.
682 (TBITCM, TNATCM): Undefine after use.
683 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
684 first input. Add ld16 aliases without ar.csd as second output. Add
685 st16 aliases without ar.csd as second input. Add cmpxchg aliases
686 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
687 ar.ccv as third/fourth inputs. Consolidate through...
688 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
689 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
690 * ia64-asmtab.c: Regenerate.
691
a53bf506
AC		 6922005-01-27 Andrew Cagney <cagney@gnu.org>
693
694 * configure: Regenerate to track ../gettext.m4 change.
695
90219bd0
AO		 6962005-01-25 Alexandre Oliva <aoliva@redhat.com>
697
698 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
699 * frv-asm.c: Rebuilt.
700 * frv-desc.c: Rebuilt.
701 * frv-desc.h: Rebuilt.
702 * frv-dis.c: Rebuilt.
703 * frv-ibld.c: Rebuilt.
704 * frv-opc.c: Rebuilt.
705 * frv-opc.h: Rebuilt.
706
45181ed1
AC		 7072005-01-24 Andrew Cagney <cagney@gnu.org>
708
709 * configure: Regenerate, ../gettext.m4 was updated.
710
9e836e3d
FF		 7112005-01-21 Fred Fish <fnf@specifixinc.com>
712
713 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
714 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
715 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
716 * mips-dis.c: Ditto.
717
5e8cb021
AM		 7182005-01-20 Alan Modra <amodra@bigpond.net.au>
719
720 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
721
986e18a5
FF		 7222005-01-19 Fred Fish <fnf@specifixinc.com>
723
724 * mips-dis.c (no_aliases): New disassembly option flag.
725 (set_default_mips_dis_options): Init no_aliases to zero.
726 (parse_mips_dis_option): Handle no-aliases option.
727 (print_insn_mips): Ignore table entries that are aliases
728 if no_aliases is set.
729 (print_insn_mips16): Ditto.
730 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
731 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
732 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
733 * mips16-opc.c (mips16_opcodes): Ditto.
734
e38bc3b5
NC		 7352005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
736
737 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
738 (inheritance diagram): Add missing edge.
739 (arch_sh1_up): Rename arch_sh_up to match external name to make life
740 easier for the testsuite.
741 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
742 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 743 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 744 arch_sh2a_or_sh4_up child.
745 (sh_table): Do renaming as above.
746 Correct comment for ldc.l for gas testsuite to read.
747 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
748 Correct comments for movy.w and movy.l for gas testsuite to read.
749 Correct comments for fmov.d and fmov.s for gas testsuite to read.
750
9df48ba9
L		 7512005-01-12 H.J. Lu <hongjiu.lu@intel.com>
752
753 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
754
2033b4b9
L		 7552005-01-12 H.J. Lu <hongjiu.lu@intel.com>
756
757 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
758
0bcb06d2
AS		 7592005-01-10 Andreas Schwab <schwab@suse.de>
760
761 * disassemble.c (disassemble_init_for_target) <case
762 bfd_arch_ia64>: Set skip_zeroes to 16.
763 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
764
47add74d
TL		 7652004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
766
767 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
768
246f4c05
SS		 7692004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
770
771 * avr-dis.c: Prettyprint. Added printing of symbol names in all
772 memory references. Convert avr_operand() to C90 formatting.
773
0e1200e5
TL		 7742004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
775
776 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
777
89a649f7
TL		 7782004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
779
780 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
781 (no_op_insn): Initialize array with instructions that have no
782 operands.
783 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
784
6255809c
RE		 7852004-11-29 Richard Earnshaw <rearnsha@arm.com>
786
787 * arm-dis.c: Correct top-level comment.
788
2fbad815
RE		 7892004-11-27 Richard Earnshaw <rearnsha@arm.com>
790
791 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
792 architecuture defining the insn.
793 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 794 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
795 field.
2fbad815
RE		 796 Also include opcode/arm.h.
797 * Makefile.am (arm-dis.lo): Update dependency list.
798 * Makefile.in: Regenerate.
799
d81acc42
NC		 8002004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
801
802 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
803 reflect the change to the short immediate syntax.
804
ca4f2377
AM		 8052004-11-19 Alan Modra <amodra@bigpond.net.au>
806
5da8bf1b
AM		 807 * or32-opc.c (debug): Warning fix.
808 * po/POTFILES.in: Regenerate.
809
ca4f2377
AM		 810 * maxq-dis.c: Formatting.
811 (print_insn): Warning fix.
812
b7693d02
DJ		 8132004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
814
815 * arm-dis.c (WORD_ADDRESS): Define.
816 (print_insn): Use it. Correct big-endian end-of-section handling.
817
300dac7e
NC		 8182004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
819 Vineet Sharma <vineets@noida.hcltech.com>
820
821 * maxq-dis.c: New file.
822 * disassemble.c (ARCH_maxq): Define.
610ad19b 823 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 824 instructions..
825 * configure.in: Add case for bfd_maxq_arch.
826 * configure: Regenerate.
827 * Makefile.am: Add support for maxq-dis.c
828 * Makefile.in: Regenerate.
829 * aclocal.m4: Regenerate.
830
42048ee7
TL		 8312004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
832
833 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
834 mode.
835 * crx-dis.c: Likewise.
836
bd21e58e
HPN		 8372004-11-04 Hans-Peter Nilsson <hp@axis.com>
838
839 Generally, handle CRISv32.
840 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
841 (struct cris_disasm_data): New type.
842 (format_reg, format_hex, cris_constraint, print_flags)
843 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
844 callers changed.
845 (format_sup_reg, print_insn_crisv32_with_register_prefix)
846 (print_insn_crisv32_without_register_prefix)
847 (print_insn_crisv10_v32_with_register_prefix)
848 (print_insn_crisv10_v32_without_register_prefix)
849 (cris_parse_disassembler_options): New functions.
850 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
851 parameter. All callers changed.
852 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
853 failure.
854 (cris_constraint) <case 'Y', 'U'>: New cases.
855 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
856 for constraint 'n'.
857 (print_with_operands) <case 'Y'>: New case.
858 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
859 <case 'N', 'Y', 'Q'>: New cases.
860 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
861 (print_insn_cris_with_register_prefix)
862 (print_insn_cris_without_register_prefix): Call
863 cris_parse_disassembler_options.
864 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
865 for CRISv32 and the size of immediate operands. New v32-only
866 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
867 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
868 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
869 Change brp to be v3..v10.
870 (cris_support_regs): New vector.
871 (cris_opcodes): Update head comment. New format characters '[',
872 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
873 Add new opcodes for v32 and adjust existing opcodes to accommodate
874 differences to earlier variants.
875 (cris_cond15s): New vector.
876
9306ca4a
JB		 8772004-11-04 Jan Beulich <jbeulich@novell.com>
878
879 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
880 (indirEb): Remove.
881 (Mp): Use f_mode rather than none at all.
882 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
883 replaces what previously was x_mode; x_mode now means 128-bit SSE
884 operands.
885 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
886 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
887 pinsrw's second operand is Edqw.
888 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
889 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
890 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
891 mode when an operand size override is present or always suffixing.
892 More instructions will need to be added to this group.
893 (putop): Handle new macro chars 'C' (short/long suffix selector),
894 'I' (Intel mode override for following macro char), and 'J' (for
895 adding the 'l' prefix to far branches in AT&T mode). When an
896 alternative was specified in the template, honor macro character when
897 specified for Intel mode.
898 (OP_E): Handle new *_mode values. Correct pointer specifications for
899 memory operands. Consolidate output of index register.
900 (OP_G): Handle new *_mode values.
901 (OP_I): Handle const_1_mode.
902 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
903 respective opcode prefix bits have been consumed.
904 (OP_EM, OP_EX): Provide some default handling for generating pointer
905 specifications.
906
f39c96a9
TL		 9072004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
908
909 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
910 COP_INST macro.
911
812337be
TL		 9122004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
913
914 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
915 (getregliststring): Support HI/LO and user registers.
610ad19b 916 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 917 rearrangement done in CRX opcode header file.
918 (crx_regtab): Likewise.
919 (crx_optab): Likewise.
610ad19b 920 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 921 formats.
922 support new Co-Processor instruction 'cpi'.
923
4030fa5a
NC		 9242004-10-27 Nick Clifton <nickc@redhat.com>
925
926 * opcodes/iq2000-asm.c: Regenerate.
927 * opcodes/iq2000-desc.c: Regenerate.
928 * opcodes/iq2000-desc.h: Regenerate.
929 * opcodes/iq2000-dis.c: Regenerate.
930 * opcodes/iq2000-ibld.c: Regenerate.
931 * opcodes/iq2000-opc.c: Regenerate.
932 * opcodes/iq2000-opc.h: Regenerate.
933
fc3d45e8
TL		 9342004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
935
936 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
937 us4, us5 (respectively).
938 Remove unsupported 'popa' instruction.
939 Reverse operands order in store co-processor instructions.
940
3c55da70
AM		 9412004-10-15 Alan Modra <amodra@bigpond.net.au>
942
943 * Makefile.am: Run "make dep-am"
944 * Makefile.in: Regenerate.
945
7fa3d080
BW		 9462004-10-12 Bob Wilson <bob.wilson@acm.org>
947
948 * xtensa-dis.c: Use ISO C90 formatting.
949
e612bb4d
AM		 9502004-10-09 Alan Modra <amodra@bigpond.net.au>
951
952 * ppc-opc.c: Revert 2004-09-09 change.
953
43cd72b9
BW		 9542004-10-07 Bob Wilson <bob.wilson@acm.org>
955
956 * xtensa-dis.c (state_names): Delete.
957 (fetch_data): Use xtensa_isa_maxlength.
958 (print_xtensa_operand): Replace operand parameter with opcode/operand
959 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
960 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
961 instruction bundles. Use xmalloc instead of malloc.
962
bbac1f2a
NC		 9632004-10-07 David Gibson <david@gibson.dropbear.id.au>
964
965 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
966 initializers.
967
48c9f030
NC		 9682004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
969
970 * crx-opc.c (crx_instruction): Support Co-processor insns.
971 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
972 (getregliststring): Change function to use the above enum.
973 (print_arg): Handle CO-Processor insns.
974 (crx_cinvs): Add 'b' option to invalidate the branch-target
975 cache.
976
12c64a4e
AH		 9772004-10-06 Aldy Hernandez <aldyh@redhat.com>
978
979 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
980 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
981 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
982 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
983 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
984
14127cc4
NC		 9852004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
986
987 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
988 rather than add it.
989
0dd132b6
NC		 9902004-09-30 Paul Brook <paul@codesourcery.com>
991
992 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
993 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
994
3f85e526
L		 9952004-09-17 H.J. Lu <hongjiu.lu@intel.com>
996
997 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
998 (CONFIG_STATUS_DEPENDENCIES): New.
999 (Makefile): Removed.
1000 (config.status): Likewise.
1001 * Makefile.in: Regenerated.
1002
8ae85421
AM		 10032004-09-17 Alan Modra <amodra@bigpond.net.au>
1004
1005 * Makefile.am: Run "make dep-am".
1006 * Makefile.in: Regenerate.
1007 * aclocal.m4: Regenerate.
1008 * configure: Regenerate.
1009 * po/POTFILES.in: Regenerate.
1010 * po/opcodes.pot: Regenerate.
1011
24443139
AS		 10122004-09-11 Andreas Schwab <schwab@suse.de>
1013
1014 * configure: Rebuild.
1015
2a309db0
AM		 10162004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1017
1018 * ppc-opc.c (L): Make this field not optional.
1019
42851540
NC		 10202004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1021
1022 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1023 Fix parameter to 'm[t|f]csr' insns.
1024
979273e3
NN		 10252004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1026
1027 * configure.in: Autoupdate to autoconf 2.59.
1028 * aclocal.m4: Rebuild with aclocal 1.4p6.
1029 * configure: Rebuild with autoconf 2.59.
1030 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1031 bfd changes for autoconf 2.59 on the way).
1032 * config.in: Rebuild with autoheader 2.59.
1033
ac28a1cb
RS		 10342004-08-27 Richard Sandiford <rsandifo@redhat.com>
1035
1036 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1037
30d1c836
ML		 10382004-07-30 Michal Ludvig <mludvig@suse.cz>
1039
1040 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1041 (GRPPADLCK2): New define.
1042 (twobyte_has_modrm): True for 0xA6.
1043 (grps): GRPPADLCK2 for opcode 0xA6.
1044
0b0ac059
AO		 10452004-07-29 Alexandre Oliva <aoliva@redhat.com>
1046
1047 Introduce SH2a support.
1048 * sh-opc.h (arch_sh2a_base): Renumber.
1049 (arch_sh2a_nofpu_base): Remove.
1050 (arch_sh_base_mask): Adjust.
1051 (arch_opann_mask): New.
1052 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1053 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1054 (sh_table): Adjust whitespace.
1055 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1056 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1057 instruction list throughout.
1058 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1059 of arch_sh2a in instruction list throughout.
1060 (arch_sh2e_up): Accomodate above changes.
1061 (arch_sh2_up): Ditto.
1062 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1063 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1064 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1065 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1066 * sh-opc.h (arch_sh2a_nofpu): New.
1067 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1068 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1069 instruction.
1070 2004-01-20 DJ Delorie <dj@redhat.com>
1071 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1072 2003-12-29 DJ Delorie <dj@redhat.com>
1073 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1074 sh_opcode_info, sh_table): Add sh2a support.
1075 (arch_op32): New, to tag 32-bit opcodes.
1076 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1077 2003-12-02 Michael Snyder <msnyder@redhat.com>
1078 * sh-opc.h (arch_sh2a): Add.
1079 * sh-dis.c (arch_sh2a): Handle.
1080 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1081
670ec21d
NC		 10822004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1083
1084 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1085
ed049af3
NC		 10862004-07-22 Nick Clifton <nickc@redhat.com>
1087
1088 PR/280
1089 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1090 insns - this is done by objdump itself.
1091 * h8500-dis.c (print_insn_h8500): Likewise.
1092
20f0a1fc
NC		 10932004-07-21 Jan Beulich <jbeulich@novell.com>
1094
1095 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1096 regardless of address size prefix in effect.
1097 (ptr_reg): Size or address registers does not depend on rex64, but
1098 on the presence of an address size override.
1099 (OP_MMX): Use rex.x only for xmm registers.
1100 (OP_EM): Use rex.z only for xmm registers.
1101
6f14957b
MR		 11022004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1103
1104 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1105 move/branch operations to the bottom so that VR5400 multimedia
1106 instructions take precedence in disassembly.
1107
1586d91e
MR		 11082004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1109
1110 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1111 ISA-specific "break" encoding.
1112
982de27a
NC		 11132004-07-13 Elvis Chiang <elvisfb@gmail.com>
1114
1115 * arm-opc.h: Fix typo in comment.
1116
4300ab10
AS		 11172004-07-11 Andreas Schwab <schwab@suse.de>
1118
1119 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1120
8577e690
AS		 11212004-07-09 Andreas Schwab <schwab@suse.de>
1122
1123 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1124
1fe1f39c
NC		 11252004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1126
1127 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1128 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1129 (crx-dis.lo): New target.
1130 (crx-opc.lo): Likewise.
1131 * Makefile.in: Regenerate.
1132 * configure.in: Handle bfd_crx_arch.
1133 * configure: Regenerate.
1134 * crx-dis.c: New file.
1135 * crx-opc.c: New file.
1136 * disassemble.c (ARCH_crx): Define.
1137 (disassembler): Handle ARCH_crx.
1138
7a33b495
JW		 11392004-06-29 James E Wilson <wilson@specifixinc.com>
1140
1141 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1142 * ia64-asmtab.c: Regnerate.
1143
98e69875
AM		 11442004-06-28 Alan Modra <amodra@bigpond.net.au>
1145
1146 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1147 (extract_fxm): Don't test dialect.
1148 (XFXFXM_MASK): Include the power4 bit.
1149 (XFXM): Add p4 param.
1150 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1151
a53b85e2
AO		 11522004-06-27 Alexandre Oliva <aoliva@redhat.com>
1153
1154 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1155 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1156
d0618d1c
AM		 11572004-06-26 Alan Modra <amodra@bigpond.net.au>
1158
1159 * ppc-opc.c (BH, XLBH_MASK): Define.
1160 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1161
1d9f512f
AM		 11622004-06-24 Alan Modra <amodra@bigpond.net.au>
1163
1164 * i386-dis.c (x_mode): Comment.
1165 (two_source_ops): File scope.
1166 (float_mem): Correct fisttpll and fistpll.
1167 (float_mem_mode): New table.
1168 (dofloat): Use it.
1169 (OP_E): Correct intel mode PTR output.
1170 (ptr_reg): Use open_char and close_char.
1171 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1172 operands. Set two_source_ops.
1173
52886d70
AM		 11742004-06-15 Alan Modra <amodra@bigpond.net.au>
1175
1176 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1177 instead of _raw_size.
1178
bad9ceea
JJ		 11792004-06-08 Jakub Jelinek <jakub@redhat.com>
1180
1181 * ia64-gen.c (in_iclass): Handle more postinc st
1182 and ld variants.
1183 * ia64-asmtab.c: Rebuilt.
1184
0451f5df
MS		 11852004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1186
1187 * s390-opc.txt: Correct architecture mask for some opcodes.
1188 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1189 in the esa mode as well.
1190
f6f9408f
JR		 11912004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1192
1193 * sh-dis.c (target_arch): Make unsigned.
1194 (print_insn_sh): Replace (most of) switch with a call to
1195 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1196 * sh-opc.h: Redefine architecture flags values.
1197 Add sh3-nommu architecture.
1198 Reorganise <arch>_up macros so they make more visual sense.
1199 (SH_MERGE_ARCH_SET): Define new macro.
1200 (SH_VALID_BASE_ARCH_SET): Likewise.
1201 (SH_VALID_MMU_ARCH_SET): Likewise.
1202 (SH_VALID_CO_ARCH_SET): Likewise.
1203 (SH_VALID_ARCH_SET): Likewise.
1204 (SH_MERGE_ARCH_SET_VALID): Likewise.
1205 (SH_ARCH_SET_HAS_FPU): Likewise.
1206 (SH_ARCH_SET_HAS_DSP): Likewise.
1207 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1208 (sh_get_arch_from_bfd_mach): Add prototype.
1209 (sh_get_arch_up_from_bfd_mach): Likewise.
1210 (sh_get_bfd_mach_from_arch_set): Likewise.
1211 (sh_merge_bfd_arc): Likewise.
1212
be8c092b
NC		 12132004-05-24 Peter Barada <peter@the-baradas.com>
1214
1215 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1216 into new match_insn_m68k function. Loop over canidate
1217 matches and select first that completely matches.
be8c092b
NC		 1218 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1219 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1220 to verify addressing for MAC/EMAC.
be8c092b
NC		 1221 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1222 reigster halves since 'fpu' and 'spl' look misleading.
1223 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1224 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1225 first, tighten up match masks.
1226 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1227 'size' from special case code in print_insn_m68k to
1228 determine decode size of insns.
1229
a30e9cc4
AM		 12302004-05-19 Alan Modra <amodra@bigpond.net.au>
1231
1232 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1233 well as when -mpower4.
1234
9598fbe5
NC		 12352004-05-13 Nick Clifton <nickc@redhat.com>
1236
1237 * po/fr.po: Updated French translation.
1238
6b6e92f4
NC		 12392004-05-05 Peter Barada <peter@the-baradas.com>
1240
1241 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1242 variants in arch_mask. Only set m68881/68851 for 68k chips.
1243 * m68k-op.c: Switch from ColdFire chips to core variants.
1244
a404d431
AM		 12452004-05-05 Alan Modra <amodra@bigpond.net.au>
1246
a30e9cc4 1247 PR 147.
a404d431
AM		 1248 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1249
f3806e43
BE		 12502004-04-29 Ben Elliston <bje@au.ibm.com>
1251
520ceea4
BE		 1252 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1253 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1254
1f1799d5
KK		 12552004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1256
1257 * sh-dis.c (print_insn_sh): Print the value in constant pool
1258 as a symbol if it looks like a symbol.
1259
fd99574b
NC		 12602004-04-22 Peter Barada <peter@the-baradas.com>
1261
1262 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1263 appropriate ColdFire architectures.
1264 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1265 mask addressing.
1266 Add EMAC instructions, fix MAC instructions. Remove
1267 macmw/macml/msacmw/msacml instructions since mask addressing now
1268 supported.
1269
b4781d44
JJ		 12702004-04-20 Jakub Jelinek <jakub@redhat.com>
1271
1272 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1273 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1274 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1275 macro. Adjust all users.
1276
91809fda 12772004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1278
91809fda
NC		 1279 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1280 separately.
1281
f4453dfa
NC		 12822004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1283
1284 * m32r-asm.c: Regenerate.
1285
9b0de91a
SS		 12862004-03-29 Stan Shebs <shebs@apple.com>
1287
1288 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1289 used.
1290
e20c0b3d
AM		 12912004-03-19 Alan Modra <amodra@bigpond.net.au>
1292
1293 * aclocal.m4: Regenerate.
1294 * config.in: Regenerate.
1295 * configure: Regenerate.
1296 * po/POTFILES.in: Regenerate.
1297 * po/opcodes.pot: Regenerate.
1298
fdd12ef3
AM		 12992004-03-16 Alan Modra <amodra@bigpond.net.au>
1300
1301 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1302 PPC_OPERANDS_GPR_0.
1303 * ppc-opc.c (RA0): Define.
1304 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1305 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1306 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1307
2dc111b3 13082004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1309
1310 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1311
7bfeee7b
AM		 13122004-03-15 Alan Modra <amodra@bigpond.net.au>
1313
1314 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1315
7ffdda93
ML		 13162004-03-12 Michal Ludvig <mludvig@suse.cz>
1317
1318 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1319 (grps): Delete GRPPLOCK entry.
7ffdda93 1320
cc0ec051
AM		 13212004-03-12 Alan Modra <amodra@bigpond.net.au>
1322
1323 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1324 (M, Mp): Use OP_M.
1325 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1326 (GRPPADLCK): Define.
1327 (dis386): Use NOP_Fixup on "nop".
1328 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1329 (twobyte_has_modrm): Set for 0xa7.
1330 (padlock_table): Delete. Move to..
1331 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1332 and clflush.
1333 (print_insn): Revert PADLOCK_SPECIAL code.
1334 (OP_E): Delete sfence, lfence, mfence checks.
1335
4fd61dcb
JJ		 13362004-03-12 Jakub Jelinek <jakub@redhat.com>
1337
1338 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1339 (INVLPG_Fixup): New function.
1340 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1341
0f10071e
ML		 13422004-03-12 Michal Ludvig <mludvig@suse.cz>
1343
1344 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1345 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1346 (padlock_table): New struct with PadLock instructions.
1347 (print_insn): Handle PADLOCK_SPECIAL.
1348
c02908d2
AM		 13492004-03-12 Alan Modra <amodra@bigpond.net.au>
1350
1351 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1352 (OP_E): Twiddle clflush to sfence here.
1353
d5bb7600
NC		 13542004-03-08 Nick Clifton <nickc@redhat.com>
1355
1356 * po/de.po: Updated German translation.
1357
ae51a426
JR		 13582003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1359
1360 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1361 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1362 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1363 accordingly.
1364
676a64f4
RS		 13652004-03-01 Richard Sandiford <rsandifo@redhat.com>
1366
1367 * frv-asm.c: Regenerate.
1368 * frv-desc.c: Regenerate.
1369 * frv-desc.h: Regenerate.
1370 * frv-dis.c: Regenerate.
1371 * frv-ibld.c: Regenerate.
1372 * frv-opc.c: Regenerate.
1373 * frv-opc.h: Regenerate.
1374
c7a48b9a
RS		 13752004-03-01 Richard Sandiford <rsandifo@redhat.com>
1376
1377 * frv-desc.c, frv-opc.c: Regenerate.
1378
8ae0baa2
RS		 13792004-03-01 Richard Sandiford <rsandifo@redhat.com>
1380
1381 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1382
ce11586c
JR		 13832004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1384
1385 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1386 Also correct mistake in the comment.
1387
6a5709a5
JR		 13882004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1389
1390 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1391 ensure that double registers have even numbers.
1392 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1393 that reserved instruction 0xfffd does not decode the same
1394 as 0xfdfd (ftrv).
1395 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1396 REG_N refers to a double register.
1397 Add REG_N_B01 nibble type and use it instead of REG_NM
1398 in ftrv.
1399 Adjust the bit patterns in a few comments.
1400
e5d2b64f 14012004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1402
1403 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1404
1f04b05f
AH		 14052004-02-20 Aldy Hernandez <aldyh@redhat.com>
1406
1407 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1408
2f3b8700
AH		 14092004-02-20 Aldy Hernandez <aldyh@redhat.com>
1410
1411 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1412
f0b26da6 14132004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1414
1415 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1416 mtivor32, mtivor33, mtivor34.
f0b26da6 1417
23d59c56 14182004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1419
1420 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1421
34920d91
NC		 14222004-02-10 Petko Manolov <petkan@nucleusys.com>
1423
1424 * arm-opc.h Maverick accumulator register opcode fixes.
1425
44d86481
BE		 14262004-02-13 Ben Elliston <bje@wasabisystems.com>
1427
1428 * m32r-dis.c: Regenerate.
1429
17707c23
MS		 14302004-01-27 Michael Snyder <msnyder@redhat.com>
1431
1432 * sh-opc.h (sh_table): "fsrra", not "fssra".
1433
fe3a9bc4
NC		 14342004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1435
1436 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1437 contraints.
1438
ff24f124
JJ		 14392004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1440
1441 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1442
a02a862a
AM		 14432004-01-19 Alan Modra <amodra@bigpond.net.au>
1444
1445 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1446 1. Don't print scale factor on AT&T mode when index missing.
1447
d164ea7f
AO		 14482004-01-16 Alexandre Oliva <aoliva@redhat.com>
1449
1450 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1451 when loaded into XR registers.
1452
cb10e79a
RS		 14532004-01-14 Richard Sandiford <rsandifo@redhat.com>
1454
1455 * frv-desc.h: Regenerate.
1456 * frv-desc.c: Regenerate.
1457 * frv-opc.c: Regenerate.
1458
f532f3fa
MS		 14592004-01-13 Michael Snyder <msnyder@redhat.com>
1460
1461 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1462
e45d0630
PB		 14632004-01-09 Paul Brook <paul@codesourcery.com>
1464
1465 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1466 specific opcodes.
1467
3ba7a1aa
DJ		 14682004-01-07 Daniel Jacobowitz <drow@mvista.com>
1469
1470 * Makefile.am (libopcodes_la_DEPENDENCIES)
1471 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1472 comment about the problem.
1473 * Makefile.in: Regenerate.
1474
ba2d3f07
AO		 14752004-01-06 Alexandre Oliva <aoliva@redhat.com>
1476
1477 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1478 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1479 cut&paste errors in shifting/truncating numerical operands.
1480 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1481 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1482 (parse_uslo16): Likewise.
1483 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1484 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1485 (parse_s12): Likewise.
1486 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1487 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1488 (parse_uslo16): Likewise.
1489 (parse_uhi16): Parse gothi and gotfuncdeschi.
1490 (parse_d12): Parse got12 and gotfuncdesc12.
1491 (parse_s12): Likewise.
1492
3ab48931
NC		 14932004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1494
1495 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1496 instruction which looks similar to an 'rla' instruction.
a0bd404e 1497
c9e214e5 1498For older changes see ChangeLog-0203
252b5132
RH		 1499\f
1500Local Variables:
2f6d2f85
NC		 1501mode: change-log
1502left-margin: 8
1503fill-column: 74
252b5132
RH		 1504version-control: never
1505End:
GDB Binutils - Deliverables
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