x86 debug address register clarifications
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
5575639b
MR
12014-08-26 Maciej W. Rozycki <macro@codesourcery.com>
2
3 * micromips-opc.c (decode_micromips_operand): Rename `B' to `+J'.
4 (micromips_opcodes): Use "+J" in place of "B" for "hypcall",
5 "sdbbp", "syscall" and "wait".
6
84919466
MR
72014-08-21 Nathan Sidwell <nathan@codesourcery.com>
8 Maciej W. Rozycki <macro@codesourcery.com>
9
10 * arm-dis.c (print_arm_address): Negate the GPR-relative offset
11 returned if the U bit is set.
12
a6c70539
MR
132014-08-21 Maciej W. Rozycki <macro@codesourcery.com>
14
15 * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out
16 48-bit "li" encoding.
17
9ace48f3
AA
182014-08-19 Andreas Arnez <arnez@linux.vnet.ibm.com>
19
20 * s390-dis.c (s390_insn_length, s390_insn_matches_opcode)
21 (s390_print_insn_with_opcode, opcode_mask_more_specific): New
22 static functions, code was moved from...
23 (print_insn_s390): ...here.
24 (s390_extract_operand): Adjust comment. Change type of first
25 parameter from 'unsigned char *' to 'const bfd_byte *'.
26 (union operand_value): New.
27 (s390_extract_operand): Change return type to union operand_value.
28 Also avoid integer overflow in sign-extension.
29 (s390_print_insn_with_opcode): Adjust to changed return value from
30 s390_extract_operand(). Change "%i" printf format to "%u" for
31 unsigned values.
32 (init_disasm): Simplify initialization of opc_index[]. This also
33 fixes an access after the last element of s390_opcodes[].
34 (print_insn_s390): Simplify the opcode search loop.
35 Check architecture mask against all searched opcodes, not just the
36 first matching one.
37 (s390_print_insn_with_opcode): Drop function pointer dereferences
38 without effect.
39 (print_insn_s390): Likewise.
40 (s390_insn_length): Simplify formula for return value.
41 (s390_print_insn_with_opcode): Avoid special handling for the
42 separator before the first operand. Use new local variable
43 'flags' in place of 'operand->flags'.
44
60ac5798
MF
452014-08-14 Mike Frysinger <vapier@gentoo.org>
46
47 * bfin-dis.c (struct private): Change int's to bfd_boolean's.
48 (decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
49 decode_dagMODik_0, decode_LDIMMhalf_0, decode_linkage_0):
50 Change assignment of 1 to priv->comment to TRUE.
51 (print_insn_bfin): Change legal to a bfd_boolean. Change
52 assignment of 0/1 with priv comment and parallel and legal
53 to FALSE/TRUE.
54
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MF
552014-08-14 Mike Frysinger <vapier@gentoo.org>
56
57 * bfin-dis.c (OUT): Define.
58 (decode_CC2stat_0): Declare new op_names array.
59 Replace multiple if statements with a single one.
60
a4e600b2
MF
612014-08-14 Mike Frysinger <vapier@gentoo.org>
62
63 * bfin-dis.c (struct private): Add iw0.
64 (_print_insn_bfin): Assign iw0 to priv.iw0.
65 (print_insn_bfin): Drop ifetch and use priv.iw0.
66
703ec4e8
MF
672014-08-13 Mike Frysinger <vapier@gentoo.org>
68
69 * bfin-dis.c (comment, parallel): Move from global scope ...
70 (struct private): ... to this new struct.
71 (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
72 decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
73 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
74 decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
75 decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
76 decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
77 decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
78 print_insn_bfin): Declare private struct. Use priv's comment and
79 parallel members.
80
ed2c4879
MF
812014-08-13 Mike Frysinger <vapier@gentoo.org>
82
83 * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
84 (_print_insn_bfin): Add check for unaligned pc.
85
ba329817
MF
862014-08-13 Mike Frysinger <vapier@gentoo.org>
87
88 * bfin-dis.c (ifetch): New function.
89 (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
90 -1 when it errors.
91
43885403
MF
922014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
93
94 * micromips-opc.c (COD): Rename throughout to...
95 (CM): New define, update to use INSN_COPROC_MOVE.
96 (LCD): Rename throughout to...
97 (LC): New define, update to use INSN_LOAD_COPROC.
98 * mips-opc.c: Likewise.
99
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MF
1002014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
101
102 * micromips-opc.c (COD, LCD) New macros.
103 (cfc1, ctc1): Remove FP_S attribute.
104 (dmfc1, mfc1, mfhc1): Add LCD attribute.
105 (dmtc1, mtc1, mthc1): Add COD attribute.
106 * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
107
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1082014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
109 Alexander Ivchenko <alexander.ivchenko@intel.com>
110 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
111 Sergey Lega <sergey.s.lega@intel.com>
112 Anna Tikhonova <anna.tikhonova@intel.com>
113 Ilya Tocar <ilya.tocar@intel.com>
114 Andrey Turetskiy <andrey.turetskiy@intel.com>
115 Ilya Verbin <ilya.verbin@intel.com>
116 Kirill Yukhin <kirill.yukhin@intel.com>
117 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
118
119 * i386-dis-evex.h: Updated.
120 * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
121 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
122 PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
123 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
124 PREFIX_EVEX_0F3A67.
125 (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
126 VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
127 (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
128 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
129 EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
130 EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
131 EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
132 EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
133 EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
134 (prefix_table): Add entries for new instructions.
135 (vex_len_table): Ditto.
136 (vex_w_table): Ditto.
137 (OP_E_memory): Update xmmq_mode handling.
138 * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
139 (cpu_flags): Add CpuAVX512DQ.
140 * i386-init.h: Regenerared.
141 * i386-opc.h (CpuAVX512DQ): New.
142 (i386_cpu_flags): Add cpuavx512dq.
143 * i386-opc.tbl: Add AVX512DQ instructions.
144 * i386-tbl.h: Regenerate.
145
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1462014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
147 Alexander Ivchenko <alexander.ivchenko@intel.com>
148 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
149 Sergey Lega <sergey.s.lega@intel.com>
150 Anna Tikhonova <anna.tikhonova@intel.com>
151 Ilya Tocar <ilya.tocar@intel.com>
152 Andrey Turetskiy <andrey.turetskiy@intel.com>
153 Ilya Verbin <ilya.verbin@intel.com>
154 Kirill Yukhin <kirill.yukhin@intel.com>
155 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
156
157 * i386-dis-evex.h: Add new instructions (prefixes bellow).
158 * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
159 (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
160 (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
161 PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
162 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
163 PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
164 PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
165 PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
166 PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
167 PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
168 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
169 PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
170 PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
171 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
172 PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
173 PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
174 PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
175 PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
176 PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
177 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
178 PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
179 PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
180 (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
181 VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
182 VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
183 VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
184 VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
185 VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
186 VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
187 VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
188 VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
189 VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
190 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
191 (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
192 EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
193 EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
194 EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
195 EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
196 EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
197 EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
198 (prefix_table): Add entries for new instructions.
199 (vex_table) : Ditto.
200 (vex_len_table): Ditto.
201 (vex_w_table): Ditto.
202 (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
203 mask_bd_mode handling.
204 (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
205 handling.
206 (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
207 handling.
208 (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
209 (OP_EX): Add dqw_swap_mode handling.
210 (OP_VEX): Add mask_bd_mode handling.
211 (OP_Mask): Add mask_bd_mode handling.
212 * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
213 (cpu_flags): Add CpuAVX512BW.
214 * i386-init.h: Regenerated.
215 * i386-opc.h (CpuAVX512BW): New.
216 (i386_cpu_flags): Add cpuavx512bw.
217 * i386-opc.tbl: Add AVX512BW instructions.
218 * i386-tbl.h: Regenerate.
219
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2202014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
221 Alexander Ivchenko <alexander.ivchenko@intel.com>
222 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
223 Sergey Lega <sergey.s.lega@intel.com>
224 Anna Tikhonova <anna.tikhonova@intel.com>
225 Ilya Tocar <ilya.tocar@intel.com>
226 Andrey Turetskiy <andrey.turetskiy@intel.com>
227 Ilya Verbin <ilya.verbin@intel.com>
228 Kirill Yukhin <kirill.yukhin@intel.com>
229 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
230
231 * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
232 * i386-tbl.h: Regenerate.
233
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2342014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
235 Alexander Ivchenko <alexander.ivchenko@intel.com>
236 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
237 Sergey Lega <sergey.s.lega@intel.com>
238 Anna Tikhonova <anna.tikhonova@intel.com>
239 Ilya Tocar <ilya.tocar@intel.com>
240 Andrey Turetskiy <andrey.turetskiy@intel.com>
241 Ilya Verbin <ilya.verbin@intel.com>
242 Kirill Yukhin <kirill.yukhin@intel.com>
243 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
244
245 * i386-dis.c (intel_operand_size): Support 128/256 length in
246 vex_vsib_q_w_dq_mode.
247 (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
248 * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
249 (cpu_flags): Add CpuAVX512VL.
250 * i386-init.h: Regenerated.
251 * i386-opc.h (CpuAVX512VL): New.
252 (i386_cpu_flags): Add cpuavx512vl.
253 (BROADCAST_1TO4, BROADCAST_1TO2): Define.
254 * i386-opc.tbl: Add AVX512VL instructions.
255 * i386-tbl.h: Regenerate.
256
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SK
2572014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
258
259 * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
260 * or1k-opinst.c: Regenerate.
261
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IT
2622014-07-08 Ilya Tocar <ilya.tocar@intel.com>
263
264 * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
265 (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
266
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AM
2672014-07-04 Alan Modra <amodra@gmail.com>
268
269 * configure.ac: Rename from configure.in.
270 * Makefile.in: Regenerate.
271 * config.in: Regenerate.
272
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AM
2732014-07-04 Alan Modra <amodra@gmail.com>
274
275 * configure.in: Include bfd/version.m4.
276 (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
277 (BFD_VERSION): Delete.
278 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
279 * configure: Regenerate.
280 * Makefile.in: Regenerate.
281
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2822014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
283 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
284 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
285 Soundararajan <Sounderarajan.D@atmel.com>
286
287 * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
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AM
288 (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
289 machine is not avrtiny.
f36e8886 290
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2912014-06-26 Philippe De Muyter <phdm@macqel.be>
292
293 * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
294 constants.
295
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AM
2962014-06-12 Alan Modra <amodra@gmail.com>
297
298 * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
299 * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
300
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3012014-06-10 H.J. Lu <hongjiu.lu@intel.com>
302
303 * i386-dis.c (fwait_prefix): New.
304 (ckprefix): Set fwait_prefix.
305 (print_insn): Properly print prefixes before fwait.
306
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3072014-06-07 Alan Modra <amodra@gmail.com>
308
309 * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
310
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3112014-06-05 Joel Brobecker <brobecker@adacore.com>
312
313 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
314 bfd's development.sh.
315 * Makefile.in, configure: Regenerate.
316
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3172014-06-03 Nick Clifton <nickc@redhat.com>
318
319 * msp430-dis.c (msp430_doubleoperand): Use extension_word to
320 decide when extended addressing is being used.
321
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3222014-06-02 Eric Botcazou <ebotcazou@adacore.com>
323
324 * sparc-opc.c (cas): Disable for LEON.
325 (casl): Likewise.
326
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3272014-05-20 Alan Modra <amodra@gmail.com>
328
329 * m68k-dis.c: Don't include setjmp.h.
330
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3312014-05-09 H.J. Lu <hongjiu.lu@intel.com>
332
333 * i386-dis.c (ADDR16_PREFIX): Removed.
334 (ADDR32_PREFIX): Likewise.
335 (DATA16_PREFIX): Likewise.
336 (DATA32_PREFIX): Likewise.
337 (prefix_name): Updated.
338 (print_insn): Simplify data and address size prefixes processing.
339
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SK
3402014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
341
342 * or1k-desc.c: Regenerated.
343 * or1k-desc.h: Likewise.
344 * or1k-opc.c: Likewise.
345 * or1k-opc.h: Likewise.
346 * or1k-opinst.c: Likewise.
347
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AB
3482014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
349
350 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
351 (I34): New define.
352 (I36): New define.
353 (I66): New define.
354 (I68): New define.
355 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
356 mips64r5.
357 (parse_mips_dis_option): Update MSA and virtualization support to
9f445129 358 allow mips64r3 and mips64r5.
ae52f483 359
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AB
3602014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
361
362 * mips-opc.c (G3): Remove I4.
363
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3642014-05-05 H.J. Lu <hongjiu.lu@intel.com>
365
366 PR binutils/16893
367 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
368 (end_codep): Likewise.
369 (mandatory_prefix): Likewise.
370 (active_seg_prefix): Likewise.
371 (ckprefix): Set active_seg_prefix to the active segment register
372 prefix.
373 (seg_prefix): Removed.
374 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
375 for prefix index. Ignore the index if it is invalid and the
376 mandatory prefix isn't required.
377 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
378 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
379 in used_prefixes here. Don't print unused prefixes. Check
380 active_seg_prefix for the active segment register prefix.
381 Restore the DFLAG bit in sizeflag if the data size prefix is
382 unused. Check the unused mandatory PREFIX_XXX prefixes
383 (append_seg): Only print the segment register which gets used.
384 (OP_E_memory): Check active_seg_prefix for the segment register
385 prefix.
386 (OP_OFF): Likewise.
387 (OP_OFF64): Likewise.
388 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
389
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3902014-05-02 H.J. Lu <hongjiu.lu@intel.com>
391
392 PR binutils/16886
393 * config.in: Regenerated.
394 * configure: Likewise.
395 * configure.in: Check if sigsetjmp is available.
396 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
397 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
398 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
399 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
400 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
401 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
402 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
403 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
404 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
405 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
406 (OPCODES_SIGSETJMP): Likewise.
407 (OPCODES_SIGLONGJMP): Likewise.
408 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
409 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
410 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
411 * xtensa-dis.c (dis_private): Replace jmp_buf with
412 OPCODES_SIGJMP_BUF.
413 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
414 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
415 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
416 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
417 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
418
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4192014-05-01 H.J. Lu <hongjiu.lu@intel.com>
420
421 PR binutils/16891
422 * i386-dis.c (print_insn): Handle prefixes before fwait.
423
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4242014-04-26 Alan Modra <amodra@gmail.com>
425
426 * po/POTFILES.in: Regenerate.
427
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4282014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
429
430 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
431 to allow the MIPS XPA ASE.
432 (parse_mips_dis_option): Process the -Mxpa option.
433 * mips-opc.c (XPA): New define.
434 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
435 locations of the ctc0 and cfc0 instructions.
436
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4372014-04-22 Christian Svensson <blue@cmd.nu>
438
439 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
440 * configure.in: Likewise.
441 * disassemble.c: Likewise.
442 * or1k-asm.c: New file.
443 * or1k-desc.c: New file.
444 * or1k-desc.h: New file.
445 * or1k-dis.c: New file.
446 * or1k-ibld.c: New file.
447 * or1k-opc.c: New file.
448 * or1k-opc.h: New file.
449 * or1k-opinst.c: New file.
450 * Makefile.in: Regenerate.
451 * configure: Regenerate.
452 * openrisc-asm.c: Delete.
453 * openrisc-desc.c: Delete.
454 * openrisc-desc.h: Delete.
455 * openrisc-dis.c: Delete.
456 * openrisc-ibld.c: Delete.
457 * openrisc-opc.c: Delete.
458 * openrisc-opc.h: Delete.
459 * or32-dis.c: Delete.
460 * or32-opc.c: Delete.
461
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4622014-04-04 Ilya Tocar <ilya.tocar@intel.com>
463
464 * i386-dis.c (rm_table): Add encls, enclu.
465 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
466 (cpu_flags): Add CpuSE1.
467 * i386-opc.h (enum): Add CpuSE1.
468 (i386_cpu_flags): Add cpuse1.
469 * i386-opc.tbl: Add encls, enclu.
470 * i386-init.h: Regenerated.
471 * i386-tbl.h: Likewise.
472
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4732014-04-02 Anthony Green <green@moxielogic.com>
474
475 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
476 instructions, sex.b and sex.s.
477
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4782014-03-26 Jiong Wang <jiong.wang@arm.com>
479
480 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
481 instructions.
482
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4832014-03-20 Ilya Tocar <ilya.tocar@intel.com>
484
485 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
486 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
487 vscatterqps.
488 * i386-tbl.h: Regenerate.
489
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4902014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
491
492 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
493 %hstick_enable added.
494
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4952014-03-19 Nick Clifton <nickc@redhat.com>
496
497 * rx-decode.opc (bwl): Allow for bogus instructions with a size
498 field of 3.
b41c812c 499 (sbwl, ubwl, SCALE): Likewise.
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500 * rx-decode.c: Regenerate.
501
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5022014-03-12 Alan Modra <amodra@gmail.com>
503
504 * Makefile.in: Regenerate.
505
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5062014-03-05 Alan Modra <amodra@gmail.com>
507
508 Update copyright years.
509
cd0c81e9 5102014-03-04 Heiher <r@hev.cc>
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511
512 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
513
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5142014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
515
516 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
517 so that they come after the Loongson extensions.
518
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5192014-03-03 Alan Modra <amodra@gmail.com>
520
521 * i386-gen.c (process_copyright): Emit copyright notice on one line.
522
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5232014-02-28 Alan Modra <amodra@gmail.com>
524
525 * msp430-decode.c: Regenerate.
526
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5272014-02-27 Jiong Wang <jiong.wang@arm.com>
528
529 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
530 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
531
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5322014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
533
534 * aarch64-opc.c (print_register_offset_address): Call
535 get_int_reg_name to prepare the register name.
536
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5372014-02-25 Ilya Tocar <ilya.tocar@intel.com>
538
539 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
540 * i386-tbl.h: Regenerate.
541
5422014-02-20 Ilya Tocar <ilya.tocar@intel.com>
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543
544 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
545 (cpu_flags): Add CpuPREFETCHWT1.
546 * i386-init.h: Regenerate.
547 * i386-opc.h (CpuPREFETCHWT1): New.
548 (i386_cpu_flags): Add cpuprefetchwt1.
549 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
550 * i386-tbl.h: Regenerate.
551
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5522014-02-20 Ilya Tocar <ilya.tocar@intel.com>
553
554 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
555 to CpuAVX512F.
556 * i386-tbl.h: Regenerate.
557
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5582014-02-19 H.J. Lu <hongjiu.lu@intel.com>
559
560 * i386-gen.c (output_cpu_flags): Don't output trailing space.
561 (output_opcode_modifier): Likewise.
562 (output_operand_type): Likewise.
563 * i386-init.h: Regenerated.
564 * i386-tbl.h: Likewise.
565
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5662014-02-12 Ilya Tocar <ilya.tocar@intel.com>
567
568 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
569 MOD_0FC7_REG_5.
570 (PREFIX enum): Add PREFIX_0FAE_REG_7.
571 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
572 (prefix_table): Add clflusopt.
573 (mod_table): Add xrstors, xsavec, xsaves.
574 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
575 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
576 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
577 * i386-init.h: Regenerate.
578 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
579 xsaves64, xsavec, xsavec64.
580 * i386-tbl.h: Regenerate.
581
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5822014-02-10 Alan Modra <amodra@gmail.com>
583
584 * po/POTFILES.in: Regenerate.
585 * po/opcodes.pot: Regenerate.
586
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5872014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
588 Jan Beulich <jbeulich@suse.com>
589
590 PR binutils/16490
591 * i386-dis.c (OP_E_memory): Fix shift computation for
592 vex_vsib_q_w_dq_mode.
593
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5942014-01-09 Bradley Nelson <bradnelson@google.com>
595 Roland McGrath <mcgrathr@google.com>
596
597 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
598 last_rex_prefix is -1.
599
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6002014-01-08 H.J. Lu <hongjiu.lu@intel.com>
601
602 * i386-gen.c (process_copyright): Update copyright year to 2014.
603
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6042014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
605
606 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
607
5fb776a6 608For older changes see ChangeLog-2013
252b5132 609\f
5fb776a6 610Copyright (C) 2014 Free Software Foundation, Inc.
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611
612Copying and distribution of this file, with or without modification,
613are permitted in any medium without royalty provided the copyright
614notice and this notice are preserved.
615
252b5132 616Local Variables:
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617mode: change-log
618left-margin: 8
619fill-column: 74
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620version-control: never
621End:
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