[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2012-05-17  James Lemke  <jwlemke@codesourcery.com>

	* ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.

2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
	    Nick Clifton  <nickc@redhat.com>

	PR 14072
	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: Generate an error if included before config.h.
	* alpha-opc.c: Include sysdep.h before any other header file.
	* alpha-dis.c: Likewise.
	* avr-dis.c: Likewise.
	* cgen-opc.c: Likewise.
	* cr16-dis.c: Likewise.
	* cris-dis.c: Likewise.
	* crx-dis.c: Likewise.
	* d10v-dis.c: Likewise.
	* d10v-opc.c: Likewise.
	* d30v-dis.c: Likewise.
	* d30v-opc.c: Likewise.
	* h8500-dis.c: Likewise.
	* i370-dis.c: Likewise.
	* i370-opc.c: Likewise.
	* m10200-dis.c: Likewise.
	* m10300-dis.c: Likewise.
	* micromips-opc.c: Likewise.
	* mips-opc.c: Likewise.
	* mips61-opc.c: Likewise.
	* moxie-dis.c: Likewise.
	* or32-opc.c: Likewise.
	* pj-dis.c: Likewise.
	* ppc-dis.c: Likewise.
	* ppc-opc.c: Likewise.
	* s390-dis.c: Likewise.
	* sh-dis.c: Likewise.
	* sh64-dis.c: Likewise.
	* sparc-dis.c: Likewise.
	* sparc-opc.c: Likewise.
	* spu-dis.c: Likewise.
	* tic30-dis.c: Likewise.
	* tic54x-dis.c: Likewise.
	* tic80-dis.c: Likewise.
	* tic80-opc.c: Likewise.
	* tilegx-dis.c: Likewise.
	* tilepro-dis.c: Likewise.
	* v850-dis.c: Likewise.
	* v850-opc.c: Likewise.
	* vax-dis.c: Likewise.
	* w65-dis.c: Likewise.
	* xgate-dis.c: Likewise.
	* xtensa-dis.c: Likewise.
	* rl78-decode.opc: Likewise.
	* rl78-decode.c: Regenerate.
	* rx-decode.opc: Likewise.
	* rx-decode.c: Regenerate.

2012-05-17  Alan Modra  <amodra@gmail.com>

	* ppc_dis.c: Don't include elf/ppc.h.

2012-05-16  Meador Inge  <meadori@codesourcery.com>

	* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
	to PUSH/POP {reg}.

2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
	    Stephane Carrez <stcarrez@nerim.fr>

	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	target.
	* disassemble.c: Likewise.
	* configure: Regenerate.
	* m68hc11-dis.c: Make objdump output more consistent, use hex
	instead of decimal and use 0x prefix for hex.
	* m68hc11-opc.c: Add S12X and XGATE opcodes.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
	(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
	(vle_opcd_indices): New array.
	(lookup_vle): New function.
	(disassemble_init_powerpc): Revise for second (VLE) opcode table.
	(print_insn_powerpc): Likewise.
	* ppc-opc.c: Likewise.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
	    Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>
	    Nathan Froyd <froydnj@codesourcery.com>

	* ppc-opc.c (insert_arx, extract_arx): New functions.
	(insert_ary, extract_ary): New functions.
	(insert_li20, extract_li20): New functions.
	(insert_rx, extract_rx): New functions.
	(insert_ry, extract_ry): New functions.
	(insert_sci8, extract_sci8): New functions.
	(insert_sci8n, extract_sci8n): New functions.
	(insert_sd4h, extract_sd4h): New functions.
	(insert_sd4w, extract_sd4w): New functions.
	(insert_vlesi, extract_vlesi): New functions.
	(insert_vlensi, extract_vlensi): New functions.
	(insert_vleui, extract_vleui): New functions.
	(insert_vleil, extract_vleil): New functions.
	(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
	(BI16, BI32, BO32, B8): New.
	(B15, B24, CRD32, CRS): New.
	(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
	(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
	(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
	(SH6_MASK): Use PPC_OPSHIFT_INV.
	(SI8, UI5, OIMM5, UI7, BO16): New.
	(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
	(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
	(ALLOW8_SPRG): New.
	(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
	(OPVUP, OPVUP_MASK OPVUP): New
	(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
	(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
	(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
	(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
	(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
	(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
	(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
	(SE_IM5, SE_IM5_MASK): New.
	(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
	(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
	(BO32DNZ, BO32DZ): New.
	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
	(PPCVLE): New.
	(powerpc_opcodes): Add new VLE instructions.  Update existing
	instruction to include PPCVLE if supported.
	* ppc-dis.c (ppc_opts): Add vle entry.
	(get_powerpc_dialect): New function.
	(powerpc_init_dialect): VLE support.
	(print_insn_big_powerpc): Call get_powerpc_dialect.
	(print_insn_little_powerpc): Likewise.
	(operand_value_powerpc): Handle negative shift counts.
	(print_insn_powerpc): Handle 2-byte instruction lengths.

2012-05-11  Daniel Richard G.  <skunk@iskunk.org>

	PR binutils/14028
	* configure.in: Invoke ACX_HEADER_STRING.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	string.h and strings.h.

2012-05-11  Nick Clifton  <nickc@redhat.com>

	PR binutils/14006
	* arm-dis.c (print_insn): Fix detection of instruction mode in
	files containing multiple executable sections.

2012-05-03  Sean Keys  <skeys@ipdatasys.com>

	* Makefile.in, configure: regenerate
	* disassemble.c (disassembler): Recognize ARCH_XGATE.
	* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
	New functions.
	* configure.in: Recognize xgate.
	* xgate-dis.c, xgate-opc.c: New files for support of xgate
	* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
	and opcode generation for xgate.

2012-04-30  DJ Delorie  <dj@redhat.com>

	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	already the maximum bit size.
	* rx-decode.c: Regenerate.

2012-04-27  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.

	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.

	* sparc-opc.c (CBCOND): New define.
	(CBCOND_XCC): Likewise.
	(cbcond): New helper macro.
	(sparc_opcodes): Add compare-and-branch instructions.

	* sparc-dis.c (print_insn_sparc): Handle ')'.
	* sparc-opc.c (sparc_opcodes): Add crypto instructions.

	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.

2012-04-12  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (X_DISP10): Define.
	(print_insn_sparc): Handle '='.

2012-04-01  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	sprintf call and the '*' field width.

2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>

	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.

2012-03-16  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	(powerpc_opcd_indices): Bump array size.
	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	corresponding to unused opcodes to following entry.
	(lookup_powerpc): New function, extracted and optimised from..
	(print_insn_powerpc): ..here.

2012-03-15  Alan Modra  <amodra@gmail.com>
	    James Lemke  <jwlemke@codesourcery.com>

	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	* ppc-dis.c (private): New var.
	(powerpc_init_dialect): Don't return calloc failure, instead use
	private.
	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	(powerpc_opcd_indices): New array.
	(disassemble_init_powerpc): New function.
	(print_insn_big_powerpc): Don't init dialect here.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Start search using powerpc_opcd_indices.

2012-03-10  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	(PPCVEC2, PPCTMR, E6500): New short names.
	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	optional operands on sync instruction for E6500 target.

2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* mt-dis.c: Regenerate.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	is the inverse of corresponding insert function.
	(extract_d22, extract_u9, extract_r4): Likewise.
	(extract_d9): Correct sign extension.
	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	rely on implementation defined behaviour for shift right of
	signed types.
	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	(extract_d23): Likewise, and correct mask.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (print_arg): Mask constant to 32 bits.
	* crx-opc.c (cst4_map): Use int array.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	(FIELDD): Sign extend with xor,sub.

2012-02-25  Walter Lee  <walt@tilera.com>

	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	TILEPRO_OPC_LW_TLS_SN.

2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (HLEPrefixNone): New.
	(HLEPrefixLock): Likewise.
	(HLEPrefixAny): Likewise.
	(HLEPrefixRelease): Likewise.

2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (HLE_Fixup1): New.
	(HLE_Fixup2): Likewise.
	(HLE_Fixup3): Likewise.
	(Ebh1): Likewise.
	(Evh1): Likewise.
	(Ebh2): Likewise.
	(Evh2): Likewise.
	(Ebh3): Likewise.
	(Evh3): Likewise.
	(MOD_C6_REG_7): Likewise.
	(MOD_C7_REG_7): Likewise.
	(RM_C6_REG_7): Likewise.
	(RM_C7_REG_7): Likewise.
	(XACQUIRE_PREFIX): Likewise.
	(XRELEASE_PREFIX): Likewise.
	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
	MOD_C6_REG_7 and MOD_C7_REG_7.
	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
	xtest.
	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.

	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	CPU_RTM_FLAGS.
	(cpu_flags): Add CpuHLE and CpuRTM.
	(opcode_modifiers): Add HLEPrefixOk.

	* i386-opc.h (CpuHLE): New.
	(CpuRTM): Likewise.
	(HLEPrefixOk): Likewise.
	(i386_cpu_flags): Add cpuhle and cpurtm.
	(i386_opcode_modifier): Add hleprefixok.

	* i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
	operand.  Add xacquire, xrelease, xabort, xbegin, xend and
	xtest.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2012-01-24  DJ Delorie  <dj@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	* rl78-decode.c: Regenerate.

2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>

	PR binutils/10173
	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.

2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>

	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	register and move them after pmove with PSR/PCSR register.

2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Add vmfunc.

	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	(cpu_flags): CpuVMFUNC.

	* i386-opc.h (CpuVMFUNC): New.
	(i386_cpu_flags): Add cpuvmfunc.

	* i386-opc.tbl: Add vmfunc.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

For older changes see ChangeLog-2011
\f
Local Variables:
mode: change-log
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version-control: never
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Commit	Line	Data
98c76446 AM	1	2012-05-17 James Lemke <jwlemke@codesourcery.com>
	2
	3	* ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
	4
df7b86aa NC	5	2012-05-17 Daniel Richard G. <skunk@iskunk.org>
	6	Nick Clifton <nickc@redhat.com>
	7
	8	PR 14072
	9	* configure.in: Add check that sysdep.h has been included before
	10	any system header files.
	11	* configure: Regenerate.
	12	* config.in: Regenerate.
	13	* sysdep.h: Generate an error if included before config.h.
	14	* alpha-opc.c: Include sysdep.h before any other header file.
	15	* alpha-dis.c: Likewise.
	16	* avr-dis.c: Likewise.
	17	* cgen-opc.c: Likewise.
	18	* cr16-dis.c: Likewise.
	19	* cris-dis.c: Likewise.
	20	* crx-dis.c: Likewise.
	21	* d10v-dis.c: Likewise.
	22	* d10v-opc.c: Likewise.
	23	* d30v-dis.c: Likewise.
	24	* d30v-opc.c: Likewise.
	25	* h8500-dis.c: Likewise.
	26	* i370-dis.c: Likewise.
	27	* i370-opc.c: Likewise.
	28	* m10200-dis.c: Likewise.
	29	* m10300-dis.c: Likewise.
	30	* micromips-opc.c: Likewise.
	31	* mips-opc.c: Likewise.
	32	* mips61-opc.c: Likewise.
	33	* moxie-dis.c: Likewise.
	34	* or32-opc.c: Likewise.
	35	* pj-dis.c: Likewise.
	36	* ppc-dis.c: Likewise.
	37	* ppc-opc.c: Likewise.
	38	* s390-dis.c: Likewise.
	39	* sh-dis.c: Likewise.
	40	* sh64-dis.c: Likewise.
	41	* sparc-dis.c: Likewise.
	42	* sparc-opc.c: Likewise.
	43	* spu-dis.c: Likewise.
	44	* tic30-dis.c: Likewise.
	45	* tic54x-dis.c: Likewise.
	46	* tic80-dis.c: Likewise.
	47	* tic80-opc.c: Likewise.
	48	* tilegx-dis.c: Likewise.
	49	* tilepro-dis.c: Likewise.
	50	* v850-dis.c: Likewise.
	51	* v850-opc.c: Likewise.
	52	* vax-dis.c: Likewise.
	53	* w65-dis.c: Likewise.
	54	* xgate-dis.c: Likewise.
	55	* xtensa-dis.c: Likewise.
	56	* rl78-decode.opc: Likewise.
	57	* rl78-decode.c: Regenerate.
	58	* rx-decode.opc: Likewise.
	59	* rx-decode.c: Regenerate.
	60
e1dad58d AM	61	2012-05-17 Alan Modra <amodra@gmail.com>
	62
	63	* ppc_dis.c: Don't include elf/ppc.h.
	64
101af531 NC	65	2012-05-16 Meador Inge <meadori@codesourcery.com>
	66
	67	* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
	68	to PUSH/POP {reg}.
	69
6927f982 NC	70	2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
	71	Stephane Carrez <stcarrez@nerim.fr>
	72
	73	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	74	target.
	75	* disassemble.c: Likewise.
	76	* configure: Regenerate.
	77	* m68hc11-dis.c: Make objdump output more consistent, use hex
	78	instead of decimal and use 0x prefix for hex.
	79	* m68hc11-opc.c: Add S12X and XGATE opcodes.
	80
b9c361e0 JL	81	2012-05-14 James Lemke <jwlemke@codesourcery.com>
	82
	83	* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
	84	(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
	85	(vle_opcd_indices): New array.
	86	(lookup_vle): New function.
	87	(disassemble_init_powerpc): Revise for second (VLE) opcode table.
	88	(print_insn_powerpc): Likewise.
	89	* ppc-opc.c: Likewise.
	90
	91	2012-05-14 Catherine Moore <clm@codesourcery.com>
	92	Maciej W. Rozycki <macro@codesourcery.com>
	93	Rhonda Wittels <rhonda@codesourcery.com>
	94	Nathan Froyd <froydnj@codesourcery.com>
	95
	96	* ppc-opc.c (insert_arx, extract_arx): New functions.
	97	(insert_ary, extract_ary): New functions.
	98	(insert_li20, extract_li20): New functions.
	99	(insert_rx, extract_rx): New functions.
	100	(insert_ry, extract_ry): New functions.
	101	(insert_sci8, extract_sci8): New functions.
	102	(insert_sci8n, extract_sci8n): New functions.
	103	(insert_sd4h, extract_sd4h): New functions.
	104	(insert_sd4w, extract_sd4w): New functions.
	105	(insert_vlesi, extract_vlesi): New functions.
	106	(insert_vlensi, extract_vlensi): New functions.
	107	(insert_vleui, extract_vleui): New functions.
	108	(insert_vleil, extract_vleil): New functions.
	109	(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
	110	(BI16, BI32, BO32, B8): New.
	111	(B15, B24, CRD32, CRS): New.
	112	(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
	113	(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
	114	(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
	115	(SH6_MASK): Use PPC_OPSHIFT_INV.
	116	(SI8, UI5, OIMM5, UI7, BO16): New.
	117	(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
	118	(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
	119	(ALLOW8_SPRG): New.
	120	(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
	121	(OPVUP, OPVUP_MASK OPVUP): New
	122	(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
	123	(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
	124	(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
	125	(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
	126	(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
	127	(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
	128	(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
	129	(SE_IM5, SE_IM5_MASK): New.
	130	(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
	131	(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
	132	(BO32DNZ, BO32DZ): New.
	133	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
	134	(PPCVLE): New.
	135	(powerpc_opcodes): Add new VLE instructions. Update existing
	136	instruction to include PPCVLE if supported.
	137	* ppc-dis.c (ppc_opts): Add vle entry.
	138	(get_powerpc_dialect): New function.
	139	(powerpc_init_dialect): VLE support.
	140	(print_insn_big_powerpc): Call get_powerpc_dialect.
	141	(print_insn_little_powerpc): Likewise.
	142	(operand_value_powerpc): Handle negative shift counts.
	143	(print_insn_powerpc): Handle 2-byte instruction lengths.
	144
208a4923 NC	145	2012-05-11 Daniel Richard G. <skunk@iskunk.org>
	146
	147	PR binutils/14028
	148	* configure.in: Invoke ACX_HEADER_STRING.
	149	* configure: Regenerate.
	150	* config.in: Regenerate.
	151	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	152	string.h and strings.h.
	153
6750a3a7 NC	154	2012-05-11 Nick Clifton <nickc@redhat.com>
	155
	156	PR binutils/14006
	157	* arm-dis.c (print_insn): Fix detection of instruction mode in
	158	files containing multiple executable sections.
	159
f6c1a2d5 NC	160	2012-05-03 Sean Keys <skeys@ipdatasys.com>
	161
	162	* Makefile.in, configure: regenerate
	163	* disassemble.c (disassembler): Recognize ARCH_XGATE.
	164	* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
	165	New functions.
	166	* configure.in: Recognize xgate.
	167	* xgate-dis.c, xgate-opc.c: New files for support of xgate
	168	* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
	169	and opcode generation for xgate.
	170
78e98aab DD	171	2012-04-30 DJ Delorie <dj@redhat.com>
	172
	173	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	174	already the maximum bit size.
	175	* rx-decode.c: Regenerate.
	176
ec668d69 DM	177	2012-04-27 David S. Miller <davem@davemloft.net>
ec668d69 DM	178
2e52845b DM	179	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	180	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
	181
58004e23 DM	182	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	183	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
	184
698544e1 DM	185	* sparc-opc.c (CBCOND): New define.
	186	(CBCOND_XCC): Likewise.
	187	(cbcond): New helper macro.
	188	(sparc_opcodes): Add compare-and-branch instructions.
	189
6cda1326 DM	190	* sparc-dis.c (print_insn_sparc): Handle ')'.
	191	* sparc-opc.c (sparc_opcodes): Add crypto instructions.
	192
ec668d69 DM	193	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	194	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
	195
2615994e DM	196	2012-04-12 David S. Miller <davem@davemloft.net>
	197
	198	* sparc-dis.c (X_DISP10): Define.
	199	(print_insn_sparc): Handle '='.
	200
5de10af0 MF	201	2012-04-01 Mike Frysinger <vapier@gentoo.org>
	202
	203	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	204	sprintf call and the '*' field width.
	205
55a36193 MK	206	2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
	207
	208	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
	209
d6688282 AM	210	2012-03-16 Alan Modra <amodra@gmail.com>
	211
	212	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	213	(powerpc_opcd_indices): Bump array size.
	214	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	215	corresponding to unused opcodes to following entry.
	216	(lookup_powerpc): New function, extracted and optimised from..
	217	(print_insn_powerpc): ..here.
	218
b240011a AM	219	2012-03-15 Alan Modra <amodra@gmail.com>
	220	James Lemke <jwlemke@codesourcery.com>
	221
	222	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	223	* ppc-dis.c (private): New var.
	224	(powerpc_init_dialect): Don't return calloc failure, instead use
	225	private.
	226	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	227	(powerpc_opcd_indices): New array.
	228	(disassemble_init_powerpc): New function.
	229	(print_insn_big_powerpc): Don't init dialect here.
	230	(print_insn_little_powerpc): Likewise.
	231	(print_insn_powerpc): Start search using powerpc_opcd_indices.
	232
aea77599 AM	233	2012-03-10 Edmar Wienskoski <edmar@freescale.com>
	234
	235	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	236	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	237	(PPCVEC2, PPCTMR, E6500): New short names.
	238	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	239	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	240	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	241	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	242	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	243	optional operands on sync instruction for E6500 target.
	244
5333187a AK	245	2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
	246
	247	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
	248
a597d2d3 AM	249	2012-02-27 Alan Modra <amodra@gmail.com>
	250
	251	* mt-dis.c: Regenerate.
	252
3f26eb3a AM	253	2012-02-27 Alan Modra <amodra@gmail.com>
	254
	255	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	256	is the inverse of corresponding insert function.
	257	(extract_d22, extract_u9, extract_r4): Likewise.
	258	(extract_d9): Correct sign extension.
	259	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	260	rely on implementation defined behaviour for shift right of
	261	signed types.
	262	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	263	(extract_d23): Likewise, and correct mask.
	264
1f42f8b3 AM	265	2012-02-27 Alan Modra <amodra@gmail.com>
	266
	267	* crx-dis.c (print_arg): Mask constant to 32 bits.
	268	* crx-opc.c (cst4_map): Use int array.
	269
cdb06235 AM	270	2012-02-27 Alan Modra <amodra@gmail.com>
	271
	272	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	273	(FIELDD): Sign extend with xor,sub.
	274
6f7be959 WL	275	2012-02-25 Walter Lee <walt@tilera.com>
	276
	277	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	278	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	279	TILEPRO_OPC_LW_TLS_SN.
	280
82c2def5 L	281	2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
	282
	283	* i386-opc.h (HLEPrefixNone): New.
	284	(HLEPrefixLock): Likewise.
	285	(HLEPrefixAny): Likewise.
	286	(HLEPrefixRelease): Likewise.
	287
42164a71 L	288	2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
	289
	290	* i386-dis.c (HLE_Fixup1): New.
	291	(HLE_Fixup2): Likewise.
	292	(HLE_Fixup3): Likewise.
	293	(Ebh1): Likewise.
	294	(Evh1): Likewise.
	295	(Ebh2): Likewise.
	296	(Evh2): Likewise.
	297	(Ebh3): Likewise.
	298	(Evh3): Likewise.
	299	(MOD_C6_REG_7): Likewise.
	300	(MOD_C7_REG_7): Likewise.
	301	(RM_C6_REG_7): Likewise.
	302	(RM_C7_REG_7): Likewise.
	303	(XACQUIRE_PREFIX): Likewise.
	304	(XRELEASE_PREFIX): Likewise.
	305	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	306	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	307	Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
	308	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	309	not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
	310	MOD_C6_REG_7 and MOD_C7_REG_7.
	311	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	312	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
	313	xtest.
	314	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	315	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
	316
	317	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	318	CPU_RTM_FLAGS.
	319	(cpu_flags): Add CpuHLE and CpuRTM.
	320	(opcode_modifiers): Add HLEPrefixOk.
	321
	322	* i386-opc.h (CpuHLE): New.
	323	(CpuRTM): Likewise.
	324	(HLEPrefixOk): Likewise.
	325	(i386_cpu_flags): Add cpuhle and cpurtm.
	326	(i386_opcode_modifier): Add hleprefixok.
	327
	328	* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
	329	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	330	sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
	331	operand. Add xacquire, xrelease, xabort, xbegin, xend and
	332	xtest.
	333	* i386-init.h: Regenerated.
	334	* i386-tbl.h: Likewise.
	335
21abe33a DD	336	2012-01-24 DJ Delorie <dj@redhat.com>
	337
	338	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	339	* rl78-decode.c: Regenerate.
	340
e20cc039 AM	341	2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
	342
	343	PR binutils/10173
	344	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.
	345
e143d25c AS	346	2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
	347
	348	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	349	register and move them after pmove with PSR/PCSR register.
	350
8729a6f6 L	351	2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
	352
	353	* i386-dis.c (mod_table): Add vmfunc.
	354
	355	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	356	(cpu_flags): CpuVMFUNC.
	357
	358	* i386-opc.h (CpuVMFUNC): New.
	359	(i386_cpu_flags): Add cpuvmfunc.
	360
	361	* i386-opc.tbl: Add vmfunc.
	362	* i386-init.h: Regenerated.
	363	* i386-tbl.h: Likewise.
5011093d	364
23e1d329	365	For older changes see ChangeLog-2011
252b5132 RH	366	\f
252b5132 RH	367	Local Variables:
2f6d2f85 NC	368	mode: change-log
	369	left-margin: 8
	370	fill-column: 74
252b5132 RH	371	version-control: never
252b5132 RH	372	End: