gas/testsuite/
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
7bb15c6f
RM
12012-08-06 Roland McGrath <mcgrathr@google.com>
2 Victor Khimenko <khim@google.com>
3 H.J. Lu <hongjiu.lu@intel.com>
4
5 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
6 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
7 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
8 (OP_E_register): Likewise.
9 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
10
3843081d
JBG
112012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
12
13 * configure.in: Formatting.
14 * configure: Regenerate.
15
48891606
AM
162012-08-01 Alan Modra <amodra@gmail.com>
17
18 * h8300-dis.c: Fix printf arg warnings.
19 * i960-dis.c: Likewise.
20 * mips-dis.c: Likewise.
21 * pdp11-dis.c: Likewise.
22 * sh-dis.c: Likewise.
23 * v850-dis.c: Likewise.
24 * configure.in: Formatting.
25 * configure: Regenerate.
26 * rl78-decode.c: Regenerate.
27 * po/POTFILES.in: Regenerate.
28
03f66e8a
MR
292012-07-31 Chao-Ying Fu <fu@mips.com>
30 Catherine Moore <clm@codesourcery.com>
31 Maciej W. Rozycki <macro@codesourcery.com>
32
33 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
34 (DSP_VOLA): Likewise.
35 (D32, D33): Likewise.
36 (micromips_opcodes): Add DSP ASE instructions.
48891606 37 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
03f66e8a
MR
38 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
39
94948e64
JB
402012-07-31 Jan Beulich <jbeulich@suse.com>
41
42 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
43 instruction group. Mark as requiring AVX2.
44 * i386-tbl.h: Re-generate.
45
a6dc81d2
NC
462012-07-30 Nick Clifton <nickc@redhat.com>
47
48 * po/opcodes.pot: Updated template.
49 * po/es.po: Updated Spanish translation.
50 * po/fi.po: Updated Finnish translation.
51
c4dd807e
MF
522012-07-27 Mike Frysinger <vapier@gentoo.org>
53
54 * configure.in (BFD_VERSION): Run bfd/configure --version and
55 parse the output of that.
56 * configure: Regenerate.
57
03edbe3b
JL
582012-07-25 James Lemke <jwlemke@codesourcery.com>
59
60 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
61
63d08c68
NC
622012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
63 Dr David Alan Gilbert <dave@treblig.org>
d908c8af
NC
64
65 PR binutils/13135
66 * arm-dis.c: Add necessary casts for printing integer values.
67 Use %s when printing string values.
68 * hppa-dis.c: Likewise.
69 * m68k-dis.c: Likewise.
70 * microblaze-dis.c: Likewise.
71 * mips-dis.c: Likewise.
72 * sparc-dis.c: Likewise.
73
ff688e1f
L
742012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
75
76 PR binutils/14355
77 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
78 (VEX_LEN_0FXOP_08_CD): Likewise.
79 (VEX_LEN_0FXOP_08_CE): Likewise.
80 (VEX_LEN_0FXOP_08_CF): Likewise.
81 (VEX_LEN_0FXOP_08_EC): Likewise.
82 (VEX_LEN_0FXOP_08_ED): Likewise.
83 (VEX_LEN_0FXOP_08_EE): Likewise.
84 (VEX_LEN_0FXOP_08_EF): Likewise.
85 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
86 vpcomub, vpcomuw, vpcomud, vpcomuq.
87 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
88 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
89 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
90 VEX_LEN_0FXOP_08_EF.
91
e2e1fcde
L
922012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
93
94 * i386-dis.c (PREFIX_0F38F6): New.
95 (prefix_table): Add adcx, adox instructions.
96 (three_byte_table): Use PREFIX_0F38F6.
97 (mod_table): Add rdseed instruction.
98 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
99 (cpu_flags): Likewise.
100 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
101 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
102 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
103 prefetchw.
104 * i386-tbl.h: Regenerate.
105 * i386-init.h: Likewise.
106
8b99bf0b
TS
1072012-07-05 Thomas Schwinge <thomas@codesourcery.com>
108
f4263ca2 109 * mips-dis.c: Remove gratuitous newline.
8b99bf0b 110
416cf80a
SK
1112012-07-05 Sean Keys <skeys@ipdatasys.com>
112
113 * xgate-dis.c: Removed an IF statement that will
114 always be false due to overlapping operand masks.
115 * xgate-opc.c: Corrected 'com' opcode entry and
116 fixed spacing.
117
9fa0f14a
RM
1182012-07-02 Roland McGrath <mcgrathr@google.com>
119
120 * i386-opc.tbl: Add RepPrefixOk to nop.
121 * i386-tbl.h: Regenerate.
122
4c6a93d3
NC
1232012-06-28 Nick Clifton <nickc@redhat.com>
124
125 * po/vi.po: Updated Vietnamese translation.
126
29c048b6
RM
1272012-06-22 Roland McGrath <mcgrathr@google.com>
128
fe13e45b
RM
129 * i386-opc.tbl: Add RepPrefixOk to ret.
130 * i386-tbl.h: Regenerate.
131
29c048b6
RM
132 * i386-opc.h (RepPrefixOk): New enum constant.
133 (i386_opcode_modifier): New bitfield 'repprefixok'.
134 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
135 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
136 instructions that have IsString.
137 * i386-tbl.h: Regenerate.
138
c7a8dbf9
AS
1392012-06-11 Andreas Schwab <schwab@linux-m68k.org>
140
141 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
142 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
143 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
144 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
145 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
146 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
147 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
148 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
149 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
150
94caa966
AM
1512012-05-19 Alan Modra <amodra@gmail.com>
152
153 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
154 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
155
5eb3690e
AM
1562012-05-18 Alan Modra <amodra@gmail.com>
157
71fe7bab
AM
158 * ia64-opc.c: Remove #include "ansidecl.h".
159 * z8kgen.c: Include sysdep.h first.
160
5eb3690e
AM
161 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
162 * bfin-dis.c: Likewise.
163 * i860-dis.c: Likewise.
164 * ia64-dis.c: Likewise.
165 * ia64-gen.c: Likewise.
166 * m68hc11-dis.c: Likewise.
167 * mmix-dis.c: Likewise.
168 * msp430-dis.c: Likewise.
169 * or32-dis.c: Likewise.
170 * rl78-dis.c: Likewise.
171 * rx-dis.c: Likewise.
172 * tic4x-dis.c: Likewise.
173 * tilegx-opc.c: Likewise.
174 * tilepro-opc.c: Likewise.
175 * rx-decode.c: Regenerate.
176
a4ebc835
AM
1772012-05-17 James Lemke <jwlemke@codesourcery.com>
178
179 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
180
98c76446
AM
1812012-05-17 James Lemke <jwlemke@codesourcery.com>
182
183 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
184
df7b86aa
NC
1852012-05-17 Daniel Richard G. <skunk@iskunk.org>
186 Nick Clifton <nickc@redhat.com>
187
188 PR 14072
189 * configure.in: Add check that sysdep.h has been included before
190 any system header files.
191 * configure: Regenerate.
192 * config.in: Regenerate.
193 * sysdep.h: Generate an error if included before config.h.
194 * alpha-opc.c: Include sysdep.h before any other header file.
195 * alpha-dis.c: Likewise.
196 * avr-dis.c: Likewise.
197 * cgen-opc.c: Likewise.
198 * cr16-dis.c: Likewise.
199 * cris-dis.c: Likewise.
200 * crx-dis.c: Likewise.
201 * d10v-dis.c: Likewise.
202 * d10v-opc.c: Likewise.
203 * d30v-dis.c: Likewise.
204 * d30v-opc.c: Likewise.
205 * h8500-dis.c: Likewise.
206 * i370-dis.c: Likewise.
207 * i370-opc.c: Likewise.
208 * m10200-dis.c: Likewise.
209 * m10300-dis.c: Likewise.
210 * micromips-opc.c: Likewise.
211 * mips-opc.c: Likewise.
212 * mips61-opc.c: Likewise.
213 * moxie-dis.c: Likewise.
214 * or32-opc.c: Likewise.
215 * pj-dis.c: Likewise.
216 * ppc-dis.c: Likewise.
217 * ppc-opc.c: Likewise.
218 * s390-dis.c: Likewise.
219 * sh-dis.c: Likewise.
220 * sh64-dis.c: Likewise.
221 * sparc-dis.c: Likewise.
222 * sparc-opc.c: Likewise.
223 * spu-dis.c: Likewise.
224 * tic30-dis.c: Likewise.
225 * tic54x-dis.c: Likewise.
226 * tic80-dis.c: Likewise.
227 * tic80-opc.c: Likewise.
228 * tilegx-dis.c: Likewise.
229 * tilepro-dis.c: Likewise.
230 * v850-dis.c: Likewise.
231 * v850-opc.c: Likewise.
232 * vax-dis.c: Likewise.
233 * w65-dis.c: Likewise.
234 * xgate-dis.c: Likewise.
235 * xtensa-dis.c: Likewise.
236 * rl78-decode.opc: Likewise.
237 * rl78-decode.c: Regenerate.
238 * rx-decode.opc: Likewise.
239 * rx-decode.c: Regenerate.
240
e1dad58d
AM
2412012-05-17 Alan Modra <amodra@gmail.com>
242
243 * ppc_dis.c: Don't include elf/ppc.h.
244
101af531
NC
2452012-05-16 Meador Inge <meadori@codesourcery.com>
246
247 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
248 to PUSH/POP {reg}.
249
6927f982
NC
2502012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
251 Stephane Carrez <stcarrez@nerim.fr>
252
253 * configure.in: Add S12X and XGATE co-processor support to m68hc11
254 target.
255 * disassemble.c: Likewise.
256 * configure: Regenerate.
257 * m68hc11-dis.c: Make objdump output more consistent, use hex
258 instead of decimal and use 0x prefix for hex.
259 * m68hc11-opc.c: Add S12X and XGATE opcodes.
260
b9c361e0
JL
2612012-05-14 James Lemke <jwlemke@codesourcery.com>
262
263 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
264 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
265 (vle_opcd_indices): New array.
266 (lookup_vle): New function.
267 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
268 (print_insn_powerpc): Likewise.
269 * ppc-opc.c: Likewise.
270
2712012-05-14 Catherine Moore <clm@codesourcery.com>
272 Maciej W. Rozycki <macro@codesourcery.com>
273 Rhonda Wittels <rhonda@codesourcery.com>
274 Nathan Froyd <froydnj@codesourcery.com>
275
276 * ppc-opc.c (insert_arx, extract_arx): New functions.
277 (insert_ary, extract_ary): New functions.
278 (insert_li20, extract_li20): New functions.
279 (insert_rx, extract_rx): New functions.
280 (insert_ry, extract_ry): New functions.
281 (insert_sci8, extract_sci8): New functions.
282 (insert_sci8n, extract_sci8n): New functions.
283 (insert_sd4h, extract_sd4h): New functions.
284 (insert_sd4w, extract_sd4w): New functions.
285 (insert_vlesi, extract_vlesi): New functions.
286 (insert_vlensi, extract_vlensi): New functions.
287 (insert_vleui, extract_vleui): New functions.
288 (insert_vleil, extract_vleil): New functions.
289 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
290 (BI16, BI32, BO32, B8): New.
291 (B15, B24, CRD32, CRS): New.
292 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
293 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
294 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
295 (SH6_MASK): Use PPC_OPSHIFT_INV.
296 (SI8, UI5, OIMM5, UI7, BO16): New.
297 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
298 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
299 (ALLOW8_SPRG): New.
300 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
301 (OPVUP, OPVUP_MASK OPVUP): New
302 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
303 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
304 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
305 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
306 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
307 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
308 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
309 (SE_IM5, SE_IM5_MASK): New.
310 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
311 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
312 (BO32DNZ, BO32DZ): New.
313 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
314 (PPCVLE): New.
315 (powerpc_opcodes): Add new VLE instructions. Update existing
316 instruction to include PPCVLE if supported.
317 * ppc-dis.c (ppc_opts): Add vle entry.
318 (get_powerpc_dialect): New function.
319 (powerpc_init_dialect): VLE support.
320 (print_insn_big_powerpc): Call get_powerpc_dialect.
321 (print_insn_little_powerpc): Likewise.
322 (operand_value_powerpc): Handle negative shift counts.
323 (print_insn_powerpc): Handle 2-byte instruction lengths.
324
208a4923
NC
3252012-05-11 Daniel Richard G. <skunk@iskunk.org>
326
327 PR binutils/14028
328 * configure.in: Invoke ACX_HEADER_STRING.
329 * configure: Regenerate.
330 * config.in: Regenerate.
331 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
332 string.h and strings.h.
333
6750a3a7
NC
3342012-05-11 Nick Clifton <nickc@redhat.com>
335
336 PR binutils/14006
337 * arm-dis.c (print_insn): Fix detection of instruction mode in
338 files containing multiple executable sections.
339
f6c1a2d5
NC
3402012-05-03 Sean Keys <skeys@ipdatasys.com>
341
342 * Makefile.in, configure: regenerate
343 * disassemble.c (disassembler): Recognize ARCH_XGATE.
344 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
345 New functions.
346 * configure.in: Recognize xgate.
347 * xgate-dis.c, xgate-opc.c: New files for support of xgate
348 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
349 and opcode generation for xgate.
350
78e98aab
DD
3512012-04-30 DJ Delorie <dj@redhat.com>
352
353 * rx-decode.opc (MOV): Do not sign-extend immediates which are
354 already the maximum bit size.
355 * rx-decode.c: Regenerate.
356
ec668d69
DM
3572012-04-27 David S. Miller <davem@davemloft.net>
358
2e52845b
DM
359 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
360 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
361
58004e23
DM
362 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
363 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
364
698544e1
DM
365 * sparc-opc.c (CBCOND): New define.
366 (CBCOND_XCC): Likewise.
367 (cbcond): New helper macro.
368 (sparc_opcodes): Add compare-and-branch instructions.
369
6cda1326
DM
370 * sparc-dis.c (print_insn_sparc): Handle ')'.
371 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
372
ec668d69
DM
373 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
374 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
375
2615994e
DM
3762012-04-12 David S. Miller <davem@davemloft.net>
377
378 * sparc-dis.c (X_DISP10): Define.
379 (print_insn_sparc): Handle '='.
380
5de10af0
MF
3812012-04-01 Mike Frysinger <vapier@gentoo.org>
382
383 * bfin-dis.c (fmtconst): Replace decimal handling with a single
384 sprintf call and the '*' field width.
385
55a36193
MK
3862012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
387
388 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
389
d6688282
AM
3902012-03-16 Alan Modra <amodra@gmail.com>
391
392 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
393 (powerpc_opcd_indices): Bump array size.
394 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
395 corresponding to unused opcodes to following entry.
396 (lookup_powerpc): New function, extracted and optimised from..
397 (print_insn_powerpc): ..here.
398
b240011a
AM
3992012-03-15 Alan Modra <amodra@gmail.com>
400 James Lemke <jwlemke@codesourcery.com>
401
402 * disassemble.c (disassemble_init_for_target): Handle ppc init.
403 * ppc-dis.c (private): New var.
404 (powerpc_init_dialect): Don't return calloc failure, instead use
405 private.
406 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
407 (powerpc_opcd_indices): New array.
408 (disassemble_init_powerpc): New function.
409 (print_insn_big_powerpc): Don't init dialect here.
410 (print_insn_little_powerpc): Likewise.
411 (print_insn_powerpc): Start search using powerpc_opcd_indices.
412
aea77599
AM
4132012-03-10 Edmar Wienskoski <edmar@freescale.com>
414
415 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
416 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
417 (PPCVEC2, PPCTMR, E6500): New short names.
418 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
419 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
420 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
421 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
422 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
423 optional operands on sync instruction for E6500 target.
424
5333187a
AK
4252012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
426
427 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
428
a597d2d3
AM
4292012-02-27 Alan Modra <amodra@gmail.com>
430
431 * mt-dis.c: Regenerate.
432
3f26eb3a
AM
4332012-02-27 Alan Modra <amodra@gmail.com>
434
435 * v850-opc.c (extract_v8): Rearrange to make it obvious this
436 is the inverse of corresponding insert function.
437 (extract_d22, extract_u9, extract_r4): Likewise.
438 (extract_d9): Correct sign extension.
439 (extract_d16_15): Don't assume "long" is 32 bits, and don't
440 rely on implementation defined behaviour for shift right of
441 signed types.
442 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
443 (extract_d23): Likewise, and correct mask.
444
1f42f8b3
AM
4452012-02-27 Alan Modra <amodra@gmail.com>
446
447 * crx-dis.c (print_arg): Mask constant to 32 bits.
448 * crx-opc.c (cst4_map): Use int array.
449
cdb06235
AM
4502012-02-27 Alan Modra <amodra@gmail.com>
451
452 * arc-dis.c (BITS): Don't use shifts to mask off bits.
453 (FIELDD): Sign extend with xor,sub.
454
6f7be959
WL
4552012-02-25 Walter Lee <walt@tilera.com>
456
457 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
458 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
459 TILEPRO_OPC_LW_TLS_SN.
460
82c2def5
L
4612012-02-21 H.J. Lu <hongjiu.lu@intel.com>
462
463 * i386-opc.h (HLEPrefixNone): New.
464 (HLEPrefixLock): Likewise.
465 (HLEPrefixAny): Likewise.
466 (HLEPrefixRelease): Likewise.
467
42164a71
L
4682012-02-08 H.J. Lu <hongjiu.lu@intel.com>
469
470 * i386-dis.c (HLE_Fixup1): New.
471 (HLE_Fixup2): Likewise.
472 (HLE_Fixup3): Likewise.
473 (Ebh1): Likewise.
474 (Evh1): Likewise.
475 (Ebh2): Likewise.
476 (Evh2): Likewise.
477 (Ebh3): Likewise.
478 (Evh3): Likewise.
479 (MOD_C6_REG_7): Likewise.
480 (MOD_C7_REG_7): Likewise.
481 (RM_C6_REG_7): Likewise.
482 (RM_C7_REG_7): Likewise.
483 (XACQUIRE_PREFIX): Likewise.
484 (XRELEASE_PREFIX): Likewise.
485 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
486 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
487 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
488 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
489 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
490 MOD_C6_REG_7 and MOD_C7_REG_7.
491 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
492 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
493 xtest.
494 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
495 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
496
497 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
498 CPU_RTM_FLAGS.
499 (cpu_flags): Add CpuHLE and CpuRTM.
500 (opcode_modifiers): Add HLEPrefixOk.
501
502 * i386-opc.h (CpuHLE): New.
503 (CpuRTM): Likewise.
504 (HLEPrefixOk): Likewise.
505 (i386_cpu_flags): Add cpuhle and cpurtm.
506 (i386_opcode_modifier): Add hleprefixok.
507
508 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
509 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
510 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
511 operand. Add xacquire, xrelease, xabort, xbegin, xend and
512 xtest.
513 * i386-init.h: Regenerated.
514 * i386-tbl.h: Likewise.
515
21abe33a
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5162012-01-24 DJ Delorie <dj@redhat.com>
517
518 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
519 * rl78-decode.c: Regenerate.
520
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5212012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
522
523 PR binutils/10173
524 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
525
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5262012-01-17 Andreas Schwab <schwab@linux-m68k.org>
527
528 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
529 register and move them after pmove with PSR/PCSR register.
530
8729a6f6
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5312012-01-13 H.J. Lu <hongjiu.lu@intel.com>
532
533 * i386-dis.c (mod_table): Add vmfunc.
534
535 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
536 (cpu_flags): CpuVMFUNC.
537
538 * i386-opc.h (CpuVMFUNC): New.
539 (i386_cpu_flags): Add cpuvmfunc.
540
541 * i386-opc.tbl: Add vmfunc.
542 * i386-init.h: Regenerated.
543 * i386-tbl.h: Likewise.
5011093d 544
23e1d329 545For older changes see ChangeLog-2011
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546\f
547Local Variables:
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548mode: change-log
549left-margin: 8
550fill-column: 74
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551version-control: never
552End:
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