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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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a42a4f84
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12016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
2
3 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
4 * arc-opc.c (arc_flag_operands): Add new flags.
5 (arc_flag_classes): Add new classes.
6
1328504b
AB
72016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
8
9 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
10
820f03ff
AB
112016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
12
13 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
14 encode1, rflt, crc16, and crc32 instructions.
15 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
16 (arc_flag_classes): Add C_NPS_R.
17 (insert_nps_bitop_size_2b): New function.
18 (extract_nps_bitop_size_2b): Likewise.
19 (insert_nps_bitop_uimm8): Likewise.
20 (extract_nps_bitop_uimm8): Likewise.
21 (arc_operands): Add new operand entries.
22
8ddf6b2a
CZ
232016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
24
25 * arc-regs.h: Add a new subclass field. Add double assist
26 accumulator register values.
27 * arc-tbl.h: Use DPA subclass to mark the double assist
28 instructions. Use DPX/SPX subclas to mark the FPX instructions.
29 * arc-opc.c (RSP): Define instead of SP.
30 (arc_aux_regs): Add the subclass field.
31
589a7d88
JW
322016-04-05 Jiong Wang <jiong.wang@arm.com>
33
34 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
35
0a191de9 362016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7
AB
37
38 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
39 NPS_R_SRC1.
40
0a106562
AB
412016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
42
43 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
44 issues. No functional changes.
45
bd05ac5f
CZ
462016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
47
48 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
49 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
50 (RTT): Remove duplicate.
51 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
52 (PCT_CONFIG*): Remove.
53 (D1L, D1H, D2H, D2L): Define.
54
9885948f
CZ
552016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
56
57 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
58
f2dd8838
CZ
592016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
60
61 * arc-tbl.h (invld07): Remove.
62 * arc-ext-tbl.h: New file.
63 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
64 * arc-opc.c (arc_opcodes): Add ext-tbl include.
65
0d2f91fe
JK
662016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
67
68 Fix -Wstack-usage warnings.
69 * aarch64-dis.c (print_operands): Substitute size.
70 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
71
a6b71f42
JM
722016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
73
74 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
75 to get a proper diagnostic when an invalid ASR register is used.
76
9780e045
NC
772016-03-22 Nick Clifton <nickc@redhat.com>
78
79 * configure: Regenerate.
80
e23e8ebe
AB
812016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
82
83 * arc-nps400-tbl.h: New file.
84 * arc-opc.c: Add top level comment.
85 (insert_nps_3bit_dst): New function.
86 (extract_nps_3bit_dst): New function.
87 (insert_nps_3bit_src2): New function.
88 (extract_nps_3bit_src2): New function.
89 (insert_nps_bitop_size): New function.
90 (extract_nps_bitop_size): New function.
91 (arc_flag_operands): Add nps400 entries.
92 (arc_flag_classes): Add nps400 entries.
93 (arc_operands): Add nps400 entries.
94 (arc_opcodes): Add nps400 include.
95
1ae8ab47
AB
962016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
97
98 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
99 the new class enum values.
100
8699fc3e
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1012016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
102
103 * arc-dis.c (print_insn_arc): Handle nps400.
104
24740d83
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1052016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
106
107 * arc-opc.c (BASE): Delete.
108
8678914f
NC
1092016-03-18 Nick Clifton <nickc@redhat.com>
110
111 PR target/19721
112 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
113 of MOV insn that aliases an ORR insn.
114
cc933301
JW
1152016-03-16 Jiong Wang <jiong.wang@arm.com>
116
117 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
118
f86f5863
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1192016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
120
121 * mcore-opc.h: Add const qualifiers.
122 * microblaze-opc.h (struct op_code_struct): Likewise.
123 * sh-opc.h: Likewise.
124 * tic4x-dis.c (tic4x_print_indirect): Likewise.
125 (tic4x_print_op): Likewise.
126
62de1c63
AM
1272016-03-02 Alan Modra <amodra@gmail.com>
128
d11698cd 129 * or1k-desc.h: Regenerate.
62de1c63 130 * fr30-ibld.c: Regenerate.
c697cf0b 131 * rl78-decode.c: Regenerate.
62de1c63 132
020efce5
NC
1332016-03-01 Nick Clifton <nickc@redhat.com>
134
135 PR target/19747
136 * rl78-dis.c (print_insn_rl78_common): Fix typo.
137
b0c11777
RL
1382016-02-24 Renlin Li <renlin.li@arm.com>
139
140 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
141 (print_insn_coprocessor): Support fp16 instructions.
142
3e309328
RL
1432016-02-24 Renlin Li <renlin.li@arm.com>
144
145 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
146 vminnm, vrint(mpna).
147
8afc7bea
RL
1482016-02-24 Renlin Li <renlin.li@arm.com>
149
150 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
151 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
152
4fd7268a
L
1532016-02-15 H.J. Lu <hongjiu.lu@intel.com>
154
155 * i386-dis.c (print_insn): Parenthesize expression to prevent
156 truncated addresses.
157 (OP_J): Likewise.
158
4670103e
CZ
1592016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
160 Janek van Oirschot <jvanoirs@synopsys.com>
161
162 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
163 variable.
164
c1d9289f
NC
1652016-02-04 Nick Clifton <nickc@redhat.com>
166
167 PR target/19561
168 * msp430-dis.c (print_insn_msp430): Add a special case for
169 decoding an RRC instruction with the ZC bit set in the extension
170 word.
171
a143b004
AB
1722016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
173
174 * cgen-ibld.in (insert_normal): Rework calculation of shift.
175 * epiphany-ibld.c: Regenerate.
176 * fr30-ibld.c: Regenerate.
177 * frv-ibld.c: Regenerate.
178 * ip2k-ibld.c: Regenerate.
179 * iq2000-ibld.c: Regenerate.
180 * lm32-ibld.c: Regenerate.
181 * m32c-ibld.c: Regenerate.
182 * m32r-ibld.c: Regenerate.
183 * mep-ibld.c: Regenerate.
184 * mt-ibld.c: Regenerate.
185 * or1k-ibld.c: Regenerate.
186 * xc16x-ibld.c: Regenerate.
187 * xstormy16-ibld.c: Regenerate.
188
b89807c6
AB
1892016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
190
191 * epiphany-dis.c: Regenerated from latest cpu files.
192
d8c823c8
MM
1932016-02-01 Michael McConville <mmcco@mykolab.com>
194
195 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
196 test bit.
197
5bc5ae88
RL
1982016-01-25 Renlin Li <renlin.li@arm.com>
199
200 * arm-dis.c (mapping_symbol_for_insn): New function.
201 (find_ifthen_state): Call mapping_symbol_for_insn().
202
0bff6e2d
MW
2032016-01-20 Matthew Wahab <matthew.wahab@arm.com>
204
205 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
206 of MSR UAO immediate operand.
207
100b4f2e
MR
2082016-01-18 Maciej W. Rozycki <macro@imgtec.com>
209
210 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
211 instruction support.
212
5c14705f
AM
2132016-01-17 Alan Modra <amodra@gmail.com>
214
215 * configure: Regenerate.
216
4d82fe66
NC
2172016-01-14 Nick Clifton <nickc@redhat.com>
218
219 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
220 instructions that can support stack pointer operations.
221 * rl78-decode.c: Regenerate.
222 * rl78-dis.c: Fix display of stack pointer in MOVW based
223 instructions.
224
651657fa
MW
2252016-01-14 Matthew Wahab <matthew.wahab@arm.com>
226
227 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
228 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
229 erxtatus_el1 and erxaddr_el1.
230
105bde57
MW
2312016-01-12 Matthew Wahab <matthew.wahab@arm.com>
232
233 * arm-dis.c (arm_opcodes): Add "esb".
234 (thumb_opcodes): Likewise.
235
afa8d405
PB
2362016-01-11 Peter Bergner <bergner@vnet.ibm.com>
237
238 * ppc-opc.c <xscmpnedp>: Delete.
239 <xvcmpnedp>: Likewise.
240 <xvcmpnedp.>: Likewise.
241 <xvcmpnesp>: Likewise.
242 <xvcmpnesp.>: Likewise.
243
83c3256e
AS
2442016-01-08 Andreas Schwab <schwab@linux-m68k.org>
245
246 PR gas/13050
247 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
248 addition to ISA_A.
249
6f2750fe
AM
2502016-01-01 Alan Modra <amodra@gmail.com>
251
252 Update year range in copyright notice of all files.
253
3499769a
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254For older changes see ChangeLog-2015
255\f
256Copyright (C) 2016 Free Software Foundation, Inc.
257
258Copying and distribution of this file, with or without modification,
259are permitted in any medium without royalty provided the copyright
260notice and this notice are preserved.
261
262Local Variables:
263mode: change-log
264left-margin: 8
265fill-column: 74
266version-control: never
267End:
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