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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
9beff690
L		 12007-05-14 H.J. Lu <hongjiu.lu@intel.com>
2
3 PR binutils/4502
4 * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
5
4d67a4d3
L		 62007-05-10 H.J. Lu <hongjiu.lu@intel.com>
7
8 * i386-opc.h (ShortForm): Redefined.
9 (Jump): Likewise.
10 (JumpDword): Likewise.
11 (JumpByte): Likewise.
12 (JumpInterSegment): Likewise.
13 (FloatMF): Likewise.
14 (FloatR): Likewise.
15 (FloatD): Likewise.
16 (Size16): Likewise.
17 (Size32): Likewise.
18 (Size64): Likewise.
19 (IgnoreSize): Likewise.
20 (DefaultSize): Likewise.
21 (No_bSuf): Likewise.
22 (No_wSuf): Likewise.
23 (No_lSuf): Likewise.
24 (No_sSuf): Likewise.
25 (No_qSuf): Likewise.
26 (No_xSuf): Likewise.
27 (FWait): Likewise.
28 (IsString): Likewise.
29 (regKludge): Likewise.
30 (IsPrefix): Likewise.
31 (ImmExt): Likewise.
32 (NoRex64): Likewise.
33 (Rex64): Likewise.
34 (Ugh): Likewise.
35
8de28984
L		 362007-05-07 H.J. Lu <hongjiu.lu@intel.com>
37
38 * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
39 for some SSE4 instructions.
40 (threebyte_0x3a_uses_DATA_prefix): Likewise.
41
20592a94
L		 422007-05-03 H.J. Lu <hongjiu.lu@intel.com>
43
44 * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
45
46 * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
47 type for crc32.
48
9344ff29
L		 492007-05-01 H.J. Lu <hongjiu.lu@intel.com>
50
51 * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
52 check data size prefix in 16bit mode.
53
54 * i386-opc.c (i386_optab): Default crc32 to non-8bit and
55 support Intel mode.
56
53289dcd
MS		 572007-04-30 Mark Salter <msalter@redhat.com>
58
59 * frv-desc.c: Regenerate.
60 * frv-desc.h: Regenerate.
61
eb42fac1
AM		 622007-04-30 Alan Modra <amodra@bigpond.net.au>
63
64 PR 4436
65 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
66
484c222e
L		 672007-04-27 H.J. Lu <hongjiu.lu@intel.com>
68
69 * i386-dis.c (modrm): Put reg before rm.
70
5d669648
L		 712007-04-26 H.J. Lu <hongjiu.lu@intel.com>
72
73 PR binutils/4430
74 * i386-dis.c (print_displacement): New.
75 (OP_E): Call print_displacement instead of print_operand_value
76 to output displacement when either base or index exist. Print
77 the explicit zero displacement in 16bit mode.
78
185b1163
L		 792007-04-26 H.J. Lu <hongjiu.lu@intel.com>
80
81 PR binutils/4429
82 * i386-dis.c (print_insn): Also swap the order of op_riprel
83 when swapping op_index. Break when the RIP relative address
84 is printed.
85 (OP_E): Properly handle RIP relative addressing and print the
86 explicit zero displacement for Intel mode.
87
eddc20ad
AM		 882007-04-27 Alan Modra <amodra@bigpond.net.au>
89
90 * Makefile.am: Run "make dep-am".
91 * Makefile.in: Regenerate.
92 * ns32k-dis.c: Include sysdep.h first.
93
dacc8b01
MS		 942007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
95
96 * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
97 opcode.
eddc20ad
AM		 98 * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
99
fbb92301
NC		 1002007-04-24 Nick Clifton <nickc@redhat.com>
101
102 * arm-dis.c (print_insn): Initialise type.
103
4c273957
AM		 1042007-04-24 Alan Modra <amodra@bigpond.net.au>
105
106 * cgen-types.h: Include bfd_stdint.h, not stdint.h.
107 * Makefile.am: Run "make dep-am".
108 * Makefile.in: Regenerate.
109
9a2e615a
NS		 1102007-04-23 Nathan Sidwell <nathan@codesourcery.com>
111
112 * m68k-opc.c: Mark mcfisa_c instructions.
113
37b37b2d
RE		 1142007-04-21 Richard Earnshaw <rearnsha@arm.com>
115
116 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
117 (thumb_opcodes): Add missing white space in adr.
118 (arm_decode_shift): New parameter, print_shift. Only decode the
119 shift parameter if set. Adjust callers.
120 (print_insn_arm): Support for operand type q with no shift decode.
121
717bbdf1
AM		 1222007-04-21 Alan Modra <amodra@bigpond.net.au>
123
db557034
AM		 124 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
125 Move contents to..
126 (i386_regtab): ..here.
127 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
128
717bbdf1
AM		 129 * ppc-opc.c (powerpc_operands): Delete duplicate entries.
130 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
131 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
132 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
133
78336706
NS		 1342007-04-20 Nathan Sidwell <nathan@codesourcery.com>
135
136 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
137 rambar1.
138
b84bf58a
AM		 1392007-04-20 Alan Modra <amodra@bigpond.net.au>
140
141 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
142 change.
143 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
144 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
145 references to following deleted functions.
146 (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
147 (insert_ds, extract_ds, insert_de, extract_de): Delete.
148 (insert_des, extract_des, insert_li, extract_li): Delete.
149 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
150 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
151 (num_powerpc_operands): New constant.
152 (XSPRG_MASK): Remove entire SPRG field.
153 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
154
0bbdef92
AM		 1552007-04-20 Alan Modra <amodra@bigpond.net.au>
156
157 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
158 (Z2_MASK): Define.
159 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
160
86ad2a13
RE		 1612007-04-20 Richard Earnshaw <rearnsha@arm.com>
162
163 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
164 being disassembled.
165
a33e055d
AM		 1662007-04-19 Alan Modra <amodra@bigpond.net.au>
167
168 * Makefile.am: Run "make dep-am".
169 * Makefile.in: Regenerate.
170 * po/POTFILES.in: Regenerate.
171
360b1600
AM		 1722007-04-19 Alan Modra <amodra@bigpond.net.au>
173
174 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
175 db10cyc, db12cyc, db16cyc.
176
b20ae55e
AM		 1772007-04-19 Nathan Froyd <froydnj@codesourcery.com>
178
179 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
180
381d071f
L		 1812007-04-18 H.J. Lu <hongjiu.lu@intel.com>
182
183 * i386-dis.c (CRC32_Fixup): New.
184 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
185 PREGRP91): New.
186 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
187 (threebyte_0x3a_uses_DATA_prefix): Likewise.
188 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
189 PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
190 (three_byte_table): Likewise.
191
192 * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
193
f6fdceb7 194 * i386-opc.h (CpuSSE4_2): New.
381d071f
L		 195 (CpuSSE4): Likewise.
196 (CpuUnknownFlags): Add CpuSSE4_2.
197
42903f7f
L		 1982007-04-18 H.J. Lu <hongjiu.lu@intel.com>
199
200 * i386-dis.c (XMM_Fixup): New.
201 (Edqb): New.
202 (Edqd): New.
203 (XMM0): New.
204 (dqb_mode): New.
205 (dqd_mode): New.
206 (PREGRP39 ... PREGRP85): New.
207 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
208 (threebyte_0x3a_uses_DATA_prefix): Likewise.
209 (prefix_user_table): Add PREGRP39 ... PREGRP85.
210 (three_byte_table): Likewise.
211 (putop): Handle 'K'.
212 (intel_operand_size): Handle dqb_mode, dqd_mode):
213 (OP_E): Likewise.
214 (OP_G): Likewise.
215
216 * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
217
218 * i386-opc.h (CpuSSE4_1): New.
219 (CpuUnknownFlags): Add CpuSSE4_1.
220 (regKludge): Update comment.
221
ee5c21a0
DJ		 2222007-04-18 Matthias Klose <doko@ubuntu.com>
223
224 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
225 * Makefile.in: Regenerate.
226
b7d19ba6
SE		 2272007-04-14 Steve Ellcey <sje@cup.hp.com>
228
229 * Makefile.am: Add ACLOCAL_AMFLAGS.
230 * Makefile.in: Regenerate.
231
246c51aa
L		 2322007-04-13 H.J. Lu <hongjiu.lu@intel.com>
233
234 * i386-dis.c: Remove trailing white spaces.
6e26e51a
L		 235 * i386-opc.c: Likewise.
236 * i386-opc.h: Likewise.
246c51aa 237
7967e09e
L		 2382007-04-11 H.J. Lu <hongjiu.lu@intel.com>
239
240 PR binutils/4333
241 * i386-dis.c (GRP1a): New.
242 (GRP1b ... GRPPADLCK2): Update index.
243 (dis386): Use GRP1a for entry 0x8f.
244 (mod, rm, reg): Removed. Replaced by ...
245 (modrm): This.
246 (grps): Add GRP1a.
247
56dc1f8a
KH		 2482007-04-09 Kazu Hirata <kazu@codesourcery.com>
249
250 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
251 info->print_address_func if longjmp is called.
252
144f4bc6
DD		 2532007-03-29 DJ Delorie <dj@redhat.com>
254
255 * m32c-desc.c: Regenerate.
256 * m32c-dis.c: Regenerate.
257 * m32c-opc.c: Regenerate.
258
e72cf3ec
L		 2592007-03-28 H.J. Lu <hongjiu.lu@intel.com>
260
261 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
262 movq. Remove InvMem from sldt, smsw and str.
263
264 * i386-opc.h (InvMem): Renamed to ...
265 (RegMem): Update comments.
266 (AnyMem): Remove InvMem.
267
831480e9 2682007-03-27 Paul Brook <paul@codesourcery.com>
b74ed8f5 269
b74ed8f5
PB		 270 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
271
4146fd53
PB		 2722007-03-24 Paul Brook <paul@codesourcery.com>
273
274 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
275 (print_insn_coprocessor): Handle %<bitfield>x.
276
b6702015 2772007-03-24 Paul Brook <paul@codesourcery.com>
e72cf3ec 278 Mark Shinwell <shinwell@codesourcery.com>
b6702015
PB		 279
280 * arm-dis.c (arm_opcodes): Print SRS base register.
281
831480e9 2822007-03-23 H.J. Lu <hongjiu.lu@intel.com>
0003779b
L		 283
284 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
285
286 * i386-opc.c (i386_optab): Add rex.wrxb.
287
831480e9 2882007-03-21 H.J. Lu <hongjiu.lu@intel.com>
161a04f6
L		 289
290 * i386-dis.c (REX_MODE64): Remove definition.
291 (REX_EXTX): Likewise.
292 (REX_EXTY): Likewise.
293 (REX_EXTZ): Likewise.
294 (USED_REX): Use REX_OPCODE instead of 0x40.
295 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
296 REX_R, REX_X and REX_B respectively.
297
831480e9 2982007-03-21 H.J. Lu <hongjiu.lu@intel.com>
8b38ad71
L		 299
300 PR binutils/4218
301 * i386-dis.c (PREGRP38): New.
302 (dis386): Use PREGRP38 for 0x90.
303 (prefix_user_table): Add PREGRP38.
304 (print_insn): Set uses_REPZ_prefix to 1 for pause.
305 (NOP_Fixup1): Properly handle REX bits.
306 (NOP_Fixup2): Likewise.
307
308 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
309 Allow register with nop.
310
75b06e7b
DD		 3112007-03-20 DJ Delorie <dj@redhat.com>
312
313 * m32c-asm.c: Regenerate.
314 * m32c-desc.c: Regenerate.
315 * m32c-desc.h: Regenerate.
316 * m32c-dis.h: Regenerate.
317 * m32c-ibld.c: Regenerate.
318 * m32c-opc.c: Regenerate.
319 * m32c-opc.h: Regenerate.
320
c3fe08fa
L		 3212007-03-15 H.J. Lu <hongjiu.lu@intel.com>
322
323 * i386-opc.c: Include "libiberty.h".
324 (i386_regtab): Remove the last entry.
325 (i386_regtab_size): New.
326 (i386_float_regtab_size): Likewise.
327
328 * i386-opc.h (i386_regtab_size): New.
329 (i386_float_regtab_size): Likewise.
330
0b1cf022
L		 3312007-03-15 H.J. Lu <hongjiu.lu@intel.com>
332
333 * Makefile.am (CFILES): Add i386-opc.c.
334 (ALL_MACHINES): Add i386-opc.lo.
335 Run "make dep-am".
336 * Makefile.in: Regenerated.
337
338 * configure.in: Add i386-opc.lo for bfd_i386_arch.
339 * configure: Regenerated.
340
341 * i386-dis.c: Include "opcode/i386.h".
342 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
343 (FWAIT_OPCODE): Remove definition.
344 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
345 (MAX_OPERANDS): Remove definition.
346
347 * i386-opc.c: New file.
348 * i386-opc.h: Likewise.
349
56eced12
L		 3502007-03-15 H.J. Lu <hongjiu.lu@intel.com>
351
352 * Makefile.in: Regenerated.
353
6f74c397
L		 3542007-03-09 H.J. Lu <hongjiu.lu@intel.com>
355
356 * i386-dis.c (OP_Rd): Renamed to ...
357 (OP_R): This.
358 (Rd): Updated.
359 (Rm): Likewise.
360
a6d04ec4
AM		 3612007-03-08 Alan Modra <amodra@bigpond.net.au>
362
1620f33d
AM		 363 * fr30-asm.c: Regenerate.
364 * frv-asm.c: Regenerate.
365 * ip2k-asm.c: Regenerate.
366 * iq2000-asm.c: Regenerate.
367 * m32c-asm.c: Regenerate.
368 * m32r-asm.c: Regenerate.
369 * m32r-dis.c: Regenerate.
370 * mt-asm.c: Regenerate.
371 * mt-ibld.c: Regenerate.
372 * mt-opc.c: Regenerate.
373 * openrisc-asm.c: Regenerate.
374 * xc16x-asm.c: Regenerate.
375 * xstormy16-asm.c: Regenerate.
376
a6d04ec4
AM		 377 * Makefile.am: Run "make dep-am".
378 * Makefile.in: Regenerate.
379 * po/POTFILES.in: Regenerate.
380
b5639b37
MS		 3812007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
382
383 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
384 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
385 instruction formats added.
386 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
387 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
388 masks added.
389 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
390 instructions added.
391 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
392 (main): z9-ec cpu type option added.
393 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
394
b2e818b7
DD		 3952007-02-22 DJ Delorie <dj@redhat.com>
396
397 * s390-opc.c (INSTR_SS_L2RDRD): New.
398 (MASK_SS_L2RDRD): New.
399 * s390-opc.txt (pka): Use it.
400
8b082fb1
TS		 4012007-02-20 Thiemo Seufer <ths@mips.com>
402 Chao-Ying Fu <fu@mips.com>
403
404 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
405 (print_insn_args): Add support for balign instruction.
406 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
407 (mips_builtin_opcodes): Add DSP R2 instructions.
408
929e4d1a
MS		 4092007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
410
411 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
412 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
413 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
414 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
415
b8e55848
MS		 4162007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
417
418 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
419 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
420 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
421 and sfpc.
422
af692060
NC		 4232007-02-16 Nick Clifton <nickc@redhat.com>
424
425 PR binutils/4045
426 * avr-dis.c (comment_start): New variable, contains the prefix to
427 use when printing addresses in comments.
428 (print_insn_avr): Set comment_start to an empty space if there is
429 no symbol table available as the generic address printing code
430 will prefix the numeric value of the address with 0x.
431
ce518a5f
L		 4322007-02-13 H.J. Lu <hongjiu.lu@intel.com>
433
434 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
435 in struct dis386.
436
bd2f2e55 4372007-02-05 Dave Brolley <brolley@redhat.com>
8c9c183d
DB		 438 Richard Sandiford <rsandifo@redhat.com>
439 DJ Delorie <dj@redhat.com>
440 Graydon Hoare <graydon@redhat.com>
441 Frank Ch. Eigler <fche@redhat.com>
442 Ben Elliston <bje@redhat.com>
443
444 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
445 (CFILES): Add mep-*.c
446 (ALL_MACHINES): Add mep-*.lo.
447 (CLEANFILES): Add stamp-mep.
448 (CGEN_CPUS): Add mep.
449 (MEP_DEPS): New variable.
450 (mep-*): New targets.
451 * configure.in: Handle bfd_mep_arch.
452 * disassemble.c (ARCH_mep): New macro.
453 (disassembler): Handle bfd_arch_mep.
454 (disassemble_init_for_target): Likewise.
455 * mep-*: New files for Toshiba Media Processor (MeP).
bd2f2e55
DB		 456 * Makefile.in: Regenerated.
457 * configure: Regenerated.
458
eb7834a6 4592007-02-05 H.J. Lu <hongjiu.lu@intel.com>
65ca155d
L		 460
461 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
462 wrap around within the same segment in 16bit mode.
463
eb7834a6 4642007-02-02 H.J. Lu <hongjiu.lu@intel.com>
206717e8
L		 465
466 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
467 prefix.
468
c4f5c3d7
L		 4692007-02-02 H.J. Lu <hongjiu.lu@intel.com>
470
471 * avr-dis.c (avr_operand): Correct PR number in comment.
472
fc523535 4732007-02-02 H.J. Lu <hongjiu.lu@intel.com>
f59a29b9
L		 474
475 * disassemble.c (disassembler_usage): Call
476 print_i386_disassembler_options for i386 disassembler.
477
478 * i386-dis.c (print_i386_disassembler_options): New.
479 (print_insn): Support the new addr64 option.
480
64a3a6fc
NC		 4812007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
482
483 * ppc-dis.c (powerpc_dialect): Handle ppc440.
484 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
485 be used.
486
ba4e851b
AM		 4872007-02-02 Alan Modra <amodra@bigpond.net.au>
488
489 * ppc-opc.c (insert_bdm): -Many comment.
490 (valid_bo): Add "extract" param. Accept both powerpc and power4
491 BO fields when disassembling with -Many.
492 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
493
3bdcfdf4
KH		 4942007-01-08 Kazu Hirata <kazu@codesourcery.com>
495
496 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
497 cpu32 | fido_a except on tbl instructions.
498
a028a6f5
PB		 4992007-01-04 Paul Brook <paul@codesourcery.com>
500
501 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
502
baee4c9e
AS		 5032007-01-04 Andreas Schwab <schwab@suse.de>
504
505 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
506
62ac925e
JB		 5072007-01-04 Julian Brown <julian@codesourcery.com>
508
509 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
510 vqrshl instructions.
511
10a2343e 512For older changes see ChangeLog-2006
252b5132
RH		 513\f
514Local Variables:
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NC		 515mode: change-log
516left-margin: 8
517fill-column: 74
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RH		 518version-control: never
519End:
GDB Binutils - Deliverables
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