x86: add a few more missing VexWIG
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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9cf70a44
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12020-01-16 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
4 (extractps): Add VexWIG to SSE2AVX forms.
5 * i386-tbl.h: Re-generate.
6
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72020-01-16 Jan Beulich <jbeulich@suse.com>
8
9 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
10 Size64 from and use VexW1 on SSE2AVX forms.
11 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
12 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
13 * i386-tbl.h: Re-generate.
14
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152020-01-15 Alan Modra <amodra@gmail.com>
16
17 * tic4x-dis.c (tic4x_version): Make unsigned long.
18 (optab, optab_special, registernames): New file scope vars.
19 (tic4x_print_register): Set up registernames rather than
20 malloc'd registertable.
21 (tic4x_disassemble): Delete optable and optable_special. Use
22 optab and optab_special instead. Throw away old optab,
23 optab_special and registernames when info->mach changes.
24
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252020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
26
27 PR 25377
28 * z80-dis.c (suffix): Use .db instruction to generate double
29 prefix.
30
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312020-01-14 Alan Modra <amodra@gmail.com>
32
33 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
34 values to unsigned before shifting.
35
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362020-01-13 Thomas Troeger <tstroege@gmx.de>
37
38 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
39 flow instructions.
40 (print_insn_thumb16, print_insn_thumb32): Likewise.
41 (print_insn): Initialize the insn info.
42 * i386-dis.c (print_insn): Initialize the insn info fields, and
43 detect jumps.
44
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CZ
452012-01-13 Claudiu Zissulescu <claziss@gmail.com>
46
47 * arc-opc.c (C_NE): Make it required.
48
b9fe6b8a
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492012-01-13 Claudiu Zissulescu <claziss@gmail.com>
50
51 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
52 reserved register name.
53
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542020-01-13 Alan Modra <amodra@gmail.com>
55
56 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
57 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
58
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592020-01-13 Alan Modra <amodra@gmail.com>
60
61 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
62 result of wasm_read_leb128 in a uint64_t and check that bits
63 are not lost when copying to other locals. Use uint32_t for
64 most locals. Use PRId64 when printing int64_t.
65
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662020-01-13 Alan Modra <amodra@gmail.com>
67
68 * score-dis.c: Formatting.
69 * score7-dis.c: Formatting.
70
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712020-01-13 Alan Modra <amodra@gmail.com>
72
73 * score-dis.c (print_insn_score48): Use unsigned variables for
74 unsigned values. Don't left shift negative values.
75 (print_insn_score32): Likewise.
76 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
77
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782020-01-13 Alan Modra <amodra@gmail.com>
79
80 * tic4x-dis.c (tic4x_print_register): Remove dead code.
81
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822020-01-13 Alan Modra <amodra@gmail.com>
83
84 * fr30-ibld.c: Regenerate.
85
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862020-01-13 Alan Modra <amodra@gmail.com>
87
88 * xgate-dis.c (print_insn): Don't left shift signed value.
89 (ripBits): Formatting, use 1u.
90
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912020-01-10 Alan Modra <amodra@gmail.com>
92
93 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
94 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
95
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962020-01-10 Alan Modra <amodra@gmail.com>
97
98 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
99 and XRREG value earlier to avoid a shift with negative exponent.
100 * m10200-dis.c (disassemble): Similarly.
101
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1022020-01-09 Nick Clifton <nickc@redhat.com>
103
104 PR 25224
105 * z80-dis.c (ld_ii_ii): Use correct cast.
106
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1072020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
108
109 PR 25224
110 * z80-dis.c (ld_ii_ii): Use character constant when checking
111 opcode byte value.
112
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1132020-01-09 Jan Beulich <jbeulich@suse.com>
114
115 * i386-dis.c (SEP_Fixup): New.
116 (SEP): Define.
117 (dis386_twobyte): Use it for sysenter/sysexit.
118 (enum x86_64_isa): Change amd64 enumerator to value 1.
119 (OP_J): Compare isa64 against intel64 instead of amd64.
120 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
121 forms.
122 * i386-tbl.h: Re-generate.
123
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1242020-01-08 Alan Modra <amodra@gmail.com>
125
126 * z8k-dis.c: Include libiberty.h
127 (instr_data_s): Make max_fetched unsigned.
128 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
129 Don't exceed byte_info bounds.
130 (output_instr): Make num_bytes unsigned.
131 (unpack_instr): Likewise for nibl_count and loop.
132 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
133 idx unsigned.
134 * z8k-opc.h: Regenerate.
135
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1362020-01-07 Shahab Vahedi <shahab@synopsys.com>
137
138 * arc-tbl.h (llock): Use 'LLOCK' as class.
139 (llockd): Likewise.
140 (scond): Use 'SCOND' as class.
141 (scondd): Likewise.
142 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
143 (scondd): Likewise.
144
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1452020-01-06 Alan Modra <amodra@gmail.com>
146
147 * m32c-ibld.c: Regenerate.
148
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1492020-01-06 Alan Modra <amodra@gmail.com>
150
151 PR 25344
152 * z80-dis.c (suffix): Don't use a local struct buffer copy.
153 Peek at next byte to prevent recursion on repeated prefix bytes.
154 Ensure uninitialised "mybuf" is not accessed.
155 (print_insn_z80): Don't zero n_fetch and n_used here,..
156 (print_insn_z80_buf): ..do it here instead.
157
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1582020-01-04 Alan Modra <amodra@gmail.com>
159
160 * m32r-ibld.c: Regenerate.
161
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1622020-01-04 Alan Modra <amodra@gmail.com>
163
164 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
165
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1662020-01-04 Alan Modra <amodra@gmail.com>
167
168 * crx-dis.c (match_opcode): Avoid shift left of signed value.
169
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1702020-01-04 Alan Modra <amodra@gmail.com>
171
172 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
173
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1742020-01-03 Jan Beulich <jbeulich@suse.com>
175
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176 * aarch64-tbl.h (aarch64_opcode_table): Use
177 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
178
1792020-01-03 Jan Beulich <jbeulich@suse.com>
180
181 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2
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182 forms of SUDOT and USDOT.
183
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1842020-01-03 Jan Beulich <jbeulich@suse.com>
185
5437a02a 186 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a
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187 uzip{1,2}.
188 * opcodes/aarch64-dis-2.c: Re-generate.
189
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1902020-01-03 Jan Beulich <jbeulich@suse.com>
191
5437a02a 192 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76
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193 FMMLA encoding.
194 * opcodes/aarch64-dis-2.c: Re-generate.
195
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1962020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
197
198 * z80-dis.c: Add support for eZ80 and Z80 instructions.
199
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2002020-01-01 Alan Modra <amodra@gmail.com>
201
202 Update year range in copyright notice of all files.
203
0b114740 204For older changes see ChangeLog-2019
3499769a 205\f
0b114740 206Copyright (C) 2020 Free Software Foundation, Inc.
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207
208Copying and distribution of this file, with or without modification,
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212Local Variables:
213mode: change-log
214left-margin: 8
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216version-control: never
217End:
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