[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2010-05-26  Catherine Moore <clm@codesourcery.com>
	    David Ung  <davidu@mips.com>

	* mips-opc.c: Change membership to I1 for instructions ssnop and
	ehb.

2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (sib): New.
	(get_sib): Likewise.
	(print_insn): Call get_sib.
	OP_E_memory): Use sib.

2010-05-26  Catherine Moore  <clm@codesoourcery.com>

	* mips-dis.c (mips_arch): Remove INSN_MIPS16.
	* mips-opc.c (I16): Remove.
	(mips_builtin_op): Reclassify jalx.

2010-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
	divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.

2010-05-13  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (powerpc_opcodes): Correct wclr encoding.

2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>

	* arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
	format.
	(print_insn_thumb16): Add support for new %W format.

2010-05-07  Tristan Gingold  <gingold@adacore.com>

	* Makefile.in: Regenerate with automake 1.11.1.
	* aclocal.m4: Ditto.

2010-05-05  Nick Clifton  <nickc@redhat.com>

	* po/es.po: Updated Spanish translation.

2010-04-22  Nick Clifton  <nickc@redhat.com>

	* po/opcodes.pot: Updated by the Translation project.
	* po/vi.po: Updated Vietnamese translation.

2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
	bits in opcode.

2010-04-09  Nick Clifton  <nickc@redhat.com>

	* i386-dis.c (print_insn): Remove unused variable op.
	(OP_sI): Remove unused variable mask.

2010-04-07  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>

	* ppc-opc.c (RBOPT): New define.
	("dccci"): Enable for PPCA2.  Make operands optional.
	("iccci"): Likewise.  Do not deprecate for PPC476.

2010-04-02  Masaki Muranaka  <monaka@monami-software.com>

	* cr16-opc.c (cr16_instruction): Fix typo in comment.

2010-03-25  Joseph Myers  <joseph@codesourcery.com>

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	* Makefile.in: Regenerate.
	* configure.in (bfd_tic6x_arch): New.
	* configure: Regenerate.
	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	(disassembler): Handle TI C6X.
	* tic6x-dis.c: New.

2010-03-24  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.

2010-03-23  Joseph Myers  <joseph@codesourcery.com>

	* dis-buf.c (buffer_read_memory): Give error for reading just
	before the start of memory.

2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
	    Quentin Neill <quentin.neill@amd.com>

	* i386-dis.c (OP_LWP_I): Removed.
	(reg_table): Do not use OP_LWP_I, use Iq.
	(OP_LWPCB_E): Remove use of names16.
	(OP_LWP_E): Same.
	* i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
	should not set the Vex.length bit.
	* i386-tbl.h: Regenerated.

2010-02-25  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".

2010-02-24  Nick Clifton  <nickc@redhat.com>

	PR binutils/6773
	* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
	<prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
	(thumb32_opcodes): Likewise.

2010-02-15  Nick Clifton  <nickc@redhat.com>

	* po/vi.po: Updated Vietnamese translation.

2010-02-12  Doug Evans  <dje@sebabeach.org>

	* lm32-opinst.c: Regenerate.

2010-02-11  Doug Evans  <dje@sebabeach.org>

	* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
	(print_address): Delete CGEN_PRINT_ADDRESS.
	* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
	* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
	* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
	* xc16x-dis.c, * xstormy16-dis.c: Regenerate.

	* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
	* frv-desc.c, * frv-desc.h, * frv-opc.c,
	* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
	* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
	* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
	* mep-desc.c, * mep-desc.h, * mep-opc.c,
	* mt-desc.c, * mt-desc.h, * mt-opc.c,
	* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
	* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
	* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Update copyright.
	* i386-gen.c: Likewise.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2010-02-10  Quentin Neill  <quentin.neill@amd.com>
	    Sebastian Pop  <sebastian.pop@amd.com>

	* i386-dis.c (OP_EX_VexImmW): Reintroduced
	function to handle 5th imm8 operand.
	(PREFIX_VEX_3A48): Added.
	(PREFIX_VEX_3A49): Added.
	(VEX_W_3A48_P_2): Added.
	(VEX_W_3A49_P_2): Added.
	(prefix table): Added entries for PREFIX_VEX_3A48
	and PREFIX_VEX_3A49.
	(vex table): Added entries for VEX_W_3A48_P_2 and
	and VEX_W_3A49_P_2.
	* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
	for Vec_Imm4 operands.
	* i386-opc.h (enum): Added Vec_Imm4.
	(i386_operand_type): Added vec_imm4.
	* i386-opc.tbl: Add entries for vpermilp[ds].
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.

2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>

	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	and "pwr7".  Move "a2" into alphabetical order.

2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>

	* ppc-dis.c (ppc_opts): Add titan entry.
	* ppc-opc.c (TITAN, MULHW): Define.
	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).

2010-02-03  Quentin Neill  <quentin.neill@amd.com>

	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	to CPU_BDVER1_FLAGS
	* i386-init.h: Regenerated.

2010-02-03  Anthony Green  <green@moxielogic.com>

	* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
	0x0f, and make 0x00 an illegal instruction.

2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>

	* opcodes/arm-dis.c (struct arm_private_data): New.
	(print_insn_coprocessor, print_insn_arm): Update to use struct
	arm_private_data.
	(is_mapping_symbol, get_map_sym_type): New functions.
	(get_sym_code_type): Check the symbol's section.  Do not check
	mapping symbols.
	(print_insn): Default to disassembling ARM mode code.  Check
	for mapping symbols separately from other symbols.  Use
	struct arm_private_data.

2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EXVexWdqScalar): New.
	(vex_scalar_w_dq_mode): Likewise.
	(prefix_table): Update entries for PREFIX_VEX_3899,
	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	(OP_EX): Likewise.

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (XMScalar): New.
	(EXdScalar): Likewise.
	(EXqScalar): Likewise.
	(EXqScalarS): Likewise.
	(VexScalar): Likewise.
	(EXdVexScalarS): Likewise.
	(EXqVexScalarS): Likewise.
	(XMVexScalar): Likewise.
	(scalar_mode): Likewise.
	(d_scalar_mode): Likewise.
	(d_scalar_swap_mode): Likewise.
	(q_scalar_mode): Likewise.
	(q_scalar_swap_mode): Likewise.
	(vex_scalar_mode): Likewise.
	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	q_scalar_mode, q_scalar_swap_mode.
	(OP_XMM): Handle scalar_mode.
	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	and q_scalar_swap_mode.
	(OP_VEX): Handle vex_scalar_mode.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Bad_Opcode): New.
	(bad_opcode): Likewise.
	(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
	(dis386_twobyte): Likewise.
	(reg_table): Likewise.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(float_reg): Likewise.
	(reg_table): Remove trailing "(bad)" entries.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(get_valid_dis386): Handle bytemode 0.

2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEXScalar): New.

	* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
	instructions.
	* i386-tbl.h: Regenerated.

2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.

	* i386-opc.tbl: Add xsave64 and xrstor64.
	* i386-tbl.h: Regenerated.

2010-01-20  Nick Clifton  <nickc@redhat.com>

	PR 11170
	* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
	based post-indexed addressing.

2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>

	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	* i386-tbl.h: Regenerated.

2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
	comments.

2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (names_mm): New.
	(intel_names_mm): Likewise.
	(att_names_mm): Likewise.
	(names_xmm): Likewise.
	(intel_names_xmm): Likewise.
	(att_names_xmm): Likewise.
	(names_ymm): Likewise.
	(intel_names_ymm): Likewise.
	(att_names_ymm): Likewise.
	(print_insn): Set names_mm, names_xmm and names_ymm.
	(OP_MMX): Use names_mm, names_xmm and names_ymm.
	(OP_XMM): Likewise.
	(OP_EM): Likewise.
	(OP_EMC): Likewise.
	(OP_MXC): Likewise.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_VexReg): Likewise.
	(OP_Vex_2src): Likewise.
	(OP_Vex_2src_1): Likewise.
	(OP_Vex_2src_2): Likewise.
	(OP_REG_VexI4): Likewise.

2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Update comments.

2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (rex_original): Removed.
	(ckprefix): Remove rex_original.
	(print_insn): Update comments.

2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>

	* Makefile.in: Regenerate.
	* configure: Regenerate.

2010-01-07  Doug Evans  <dje@sebabeach.org>

	* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

2010-01-06  Quentin Neill  <quentin.neill@amd.com>

	* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
	* i386-init.h: Regenerated.

2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>

	* arm-dis.c (print_insn): Fixed search for next symbol and data
	dumping condition, and the initial mapping symbol state.

2010-01-05  Doug Evans  <dje@sebabeach.org>

	* cgen-ibld.in: #include "cgen/basic-modes.h".
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

2010-01-04  Nick Clifton  <nickc@redhat.com>

	PR 11123
	* arm-dis.c (print_insn_coprocessor): Initialise value.

2010-01-04  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".

2010-01-02  Doug Evans  <dje@sebabeach.org>

	* cgen-asm.in: Update copyright year.
	* cgen-dis.in: Update copyright year.
	* cgen-ibld.in: Update copyright year.
	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.

For older changes see ChangeLog-2009
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
9db8dccb CM	1	2010-05-26 Catherine Moore <clm@codesourcery.com>
	2	David Ung <davidu@mips.com>
	3
	4	* mips-opc.c: Change membership to I1 for instructions ssnop and
	5	ehb.
	6
dfc8cf43 L	7	2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
	8
	9	* i386-dis.c (sib): New.
	10	(get_sib): Likewise.
	11	(print_insn): Call get_sib.
	12	OP_E_memory): Use sib.
	13
f79e2745 CM	14	2010-05-26 Catherine Moore <clm@codesoourcery.com>
	15
	16	* mips-dis.c (mips_arch): Remove INSN_MIPS16.
	17	* mips-opc.c (I16): Remove.
	18	(mips_builtin_op): Reclassify jalx.
	19
51b5d4a8 AM	20	2010-05-19 Alan Modra <amodra@gmail.com>
	21
	22	* ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
	23	divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
	24
85d4ac0b AM	25	2010-05-13 Alan Modra <amodra@gmail.com>
	26
	27	* ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
	28
4547cb56 NC	29	2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
	30
	31	* arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
	32	format.
	33	(print_insn_thumb16): Add support for new %W format.
	34
6540b386 TG	35	2010-05-07 Tristan Gingold <gingold@adacore.com>
	36
	37	* Makefile.in: Regenerate with automake 1.11.1.
	38	* aclocal.m4: Ditto.
	39
3e01a7fd NC	40	2010-05-05 Nick Clifton <nickc@redhat.com>
	41
	42	* po/es.po: Updated Spanish translation.
	43
9c9c98a5 NC	44	2010-04-22 Nick Clifton <nickc@redhat.com>
	45
	46	* po/opcodes.pot: Updated by the Translation project.
	47	* po/vi.po: Updated Vietnamese translation.
	48
f07af43e L	49	2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
	50
	51	* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
	52	bits in opcode.
	53
3d540e93 NC	54	2010-04-09 Nick Clifton <nickc@redhat.com>
	55
	56	* i386-dis.c (print_insn): Remove unused variable op.
	57	(OP_sI): Remove unused variable mask.
	58
397841b5 AM	59	2010-04-07 Alan Modra <amodra@gmail.com>
	60
	61	* configure: Regenerate.
	62
cee62821 PB	63	2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
	64
	65	* ppc-opc.c (RBOPT): New define.
	66	("dccci"): Enable for PPCA2. Make operands optional.
	67	("iccci"): Likewise. Do not deprecate for PPC476.
	68
accf4463 NC	69	2010-04-02 Masaki Muranaka <monaka@monami-software.com>
	70
	71	* cr16-opc.c (cr16_instruction): Fix typo in comment.
	72
40b36596 JM	73	2010-03-25 Joseph Myers <joseph@codesourcery.com>
	74
	75	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	76	* Makefile.in: Regenerate.
	77	* configure.in (bfd_tic6x_arch): New.
	78	* configure: Regenerate.
	79	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	80	(disassembler): Handle TI C6X.
	81	* tic6x-dis.c: New.
	82
1985c81c MF	83	2010-03-24 Mike Frysinger <vapier@gentoo.org>
	84
	85	* bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
	86
f66187fd JM	87	2010-03-23 Joseph Myers <joseph@codesourcery.com>
	88
	89	* dis-buf.c (buffer_read_memory): Give error for reading just
	90	before the start of memory.
	91
ce7d077e SP	92	2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
	93	Quentin Neill <quentin.neill@amd.com>
	94
	95	* i386-dis.c (OP_LWP_I): Removed.
	96	(reg_table): Do not use OP_LWP_I, use Iq.
	97	(OP_LWPCB_E): Remove use of names16.
	98	(OP_LWP_E): Same.
	99	* i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
	100	should not set the Vex.length bit.
	101	* i386-tbl.h: Regenerated.
	102
63d0fa4e AM	103	2010-02-25 Edmar Wienskoski <edmar@freescale.com>
	104
	105	* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
	106
c060226a NC	107	2010-02-24 Nick Clifton <nickc@redhat.com>
	108
	109	PR binutils/6773
	110	* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
	111	<prefix>asx. Replace <prefix>subaddx with <prefix>sax.
	112	(thumb32_opcodes): Likewise.
	113
ab7875de NC	114	2010-02-15 Nick Clifton <nickc@redhat.com>
	115
	116	* po/vi.po: Updated Vietnamese translation.
	117
fee1d3e8 DE	118	2010-02-12 Doug Evans <dje@sebabeach.org>
	119
	120	* lm32-opinst.c: Regenerate.
	121
37ec9240 DE	122	2010-02-11 Doug Evans <dje@sebabeach.org>
37ec9240 DE	123
9468ae89 DE	124	* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
	125	(print_address): Delete CGEN_PRINT_ADDRESS.
	126	* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
	127	* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
	128	* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
	129	* xc16x-dis.c, * xstormy16-dis.c: Regenerate.
	130
37ec9240 DE	131	* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
	132	* frv-desc.c, * frv-desc.h, * frv-opc.c,
	133	* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
	134	* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
	135	* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
	136	* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
	137	* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
	138	* mep-desc.c, * mep-desc.h, * mep-opc.c,
	139	* mt-desc.c, * mt-desc.h, * mt-opc.c,
	140	* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
	141	* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
	142	* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
	143
c75ef631 L	144	2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
	145
	146	* i386-dis.c: Update copyright.
	147	* i386-gen.c: Likewise.
	148	* i386-opc.h: Likewise.
	149	* i386-opc.tbl: Likewise.
	150
a683cc34 SP	151	2010-02-10 Quentin Neill <quentin.neill@amd.com>
	152	Sebastian Pop <sebastian.pop@amd.com>
	153
	154	* i386-dis.c (OP_EX_VexImmW): Reintroduced
	155	function to handle 5th imm8 operand.
	156	(PREFIX_VEX_3A48): Added.
	157	(PREFIX_VEX_3A49): Added.
	158	(VEX_W_3A48_P_2): Added.
	159	(VEX_W_3A49_P_2): Added.
	160	(prefix table): Added entries for PREFIX_VEX_3A48
	161	and PREFIX_VEX_3A49.
	162	(vex table): Added entries for VEX_W_3A48_P_2 and
	163	and VEX_W_3A49_P_2.
	164	* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
	165	for Vec_Imm4 operands.
	166	* i386-opc.h (enum): Added Vec_Imm4.
	167	(i386_operand_type): Added vec_imm4.
	168	* i386-opc.tbl: Add entries for vpermilp[ds].
	169	* i386-init.h: Regenerated.
	170	* i386-tbl.h: Regenerated.
	171
cdc51b07 RS	172	2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
	173
	174	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	175	and "pwr7". Move "a2" into alphabetical order.
	176
ce3d2015 AM	177	2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
	178
	179	* ppc-dis.c (ppc_opts): Add titan entry.
	180	* ppc-opc.c (TITAN, MULHW): Define.
	181	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
	182
68339fdf SP	183	2010-02-03 Quentin Neill <quentin.neill@amd.com>
	184
	185	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	186	to CPU_BDVER1_FLAGS
	187	* i386-init.h: Regenerated.
	188
f3d55a94 AG	189	2010-02-03 Anthony Green <green@moxielogic.com>
	190
	191	* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
	192	0x0f, and make 0x00 an illegal instruction.
	193
b0e28b39 DJ	194	2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
	195
	196	* opcodes/arm-dis.c (struct arm_private_data): New.
	197	(print_insn_coprocessor, print_insn_arm): Update to use struct
	198	arm_private_data.
	199	(is_mapping_symbol, get_map_sym_type): New functions.
	200	(get_sym_code_type): Check the symbol's section. Do not check
	201	mapping symbols.
	202	(print_insn): Default to disassembling ARM mode code. Check
	203	for mapping symbols separately from other symbols. Use
	204	struct arm_private_data.
	205
1c480963 L	206	2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
	207
	208	* i386-dis.c (EXVexWdqScalar): New.
	209	(vex_scalar_w_dq_mode): Likewise.
	210	(prefix_table): Update entries for PREFIX_VEX_3899,
	211	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	212	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	213	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	214	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	215	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	216	(OP_EX): Likewise.
	217
539f890d L	218	2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
	219
	220	* i386-dis.c (XMScalar): New.
	221	(EXdScalar): Likewise.
	222	(EXqScalar): Likewise.
	223	(EXqScalarS): Likewise.
	224	(VexScalar): Likewise.
	225	(EXdVexScalarS): Likewise.
	226	(EXqVexScalarS): Likewise.
	227	(XMVexScalar): Likewise.
	228	(scalar_mode): Likewise.
	229	(d_scalar_mode): Likewise.
	230	(d_scalar_swap_mode): Likewise.
	231	(q_scalar_mode): Likewise.
	232	(q_scalar_swap_mode): Likewise.
	233	(vex_scalar_mode): Likewise.
	234	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	235	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	236	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	237	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	238	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	239	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	240	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	241	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	242	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	243	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	244	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	245	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	246	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	247	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	248	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	249	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	250	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	251	VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
	252	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	253	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	254	q_scalar_mode, q_scalar_swap_mode.
	255	(OP_XMM): Handle scalar_mode.
	256	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	257	and q_scalar_swap_mode.
	258	(OP_VEX): Handle vex_scalar_mode.
	259
208b4d78 L	260	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	261
	262	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
	263
448b213a L	264	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	265
	266	* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
	267
47cf8fa0 L	268	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	269
	270	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
	271
592d1631 L	272	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	273
	274	* i386-dis.c (Bad_Opcode): New.
	275	(bad_opcode): Likewise.
	276	(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
	277	(dis386_twobyte): Likewise.
	278	(reg_table): Likewise.
	279	(prefix_table): Likewise.
	280	(x86_64_table): Likewise.
	281	(vex_len_table): Likewise.
	282	(vex_w_table): Likewise.
	283	(mod_table): Likewise.
	284	(rm_table): Likewise.
	285	(float_reg): Likewise.
	286	(reg_table): Remove trailing "(bad)" entries.
	287	(prefix_table): Likewise.
	288	(x86_64_table): Likewise.
	289	(vex_len_table): Likewise.
	290	(vex_w_table): Likewise.
	291	(mod_table): Likewise.
	292	(rm_table): Likewise.
	293	(get_valid_dis386): Handle bytemode 0.
	294
712366da L	295	2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
	296
	297	* i386-opc.h (VEXScalar): New.
	298
	299	* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
	300	instructions.
	301	* i386-tbl.h: Regenerated.
	302
706e8205	303	2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
73bb6729 L	304
	305	* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
	306
	307	* i386-opc.tbl: Add xsave64 and xrstor64.
	308	* i386-tbl.h: Regenerated.
	309
99ea83aa NC	310	2010-01-20 Nick Clifton <nickc@redhat.com>
	311
	312	PR 11170
	313	* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
	314	based post-indexed addressing.
	315
a6461c02 SP	316	2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
	317
	318	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	319	* i386-tbl.h: Regenerated.
	320
a2a7d12c L	321	2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
	322
	323	* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
	324	comments.
	325
b9733481 L	326	2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
	327
	328	* i386-dis.c (names_mm): New.
	329	(intel_names_mm): Likewise.
	330	(att_names_mm): Likewise.
	331	(names_xmm): Likewise.
	332	(intel_names_xmm): Likewise.
	333	(att_names_xmm): Likewise.
	334	(names_ymm): Likewise.
	335	(intel_names_ymm): Likewise.
	336	(att_names_ymm): Likewise.
	337	(print_insn): Set names_mm, names_xmm and names_ymm.
	338	(OP_MMX): Use names_mm, names_xmm and names_ymm.
	339	(OP_XMM): Likewise.
	340	(OP_EM): Likewise.
	341	(OP_EMC): Likewise.
	342	(OP_MXC): Likewise.
	343	(OP_EX): Likewise.
	344	(XMM_Fixup): Likewise.
	345	(OP_VEX): Likewise.
	346	(OP_EX_VexReg): Likewise.
	347	(OP_Vex_2src): Likewise.
	348	(OP_Vex_2src_1): Likewise.
	349	(OP_Vex_2src_2): Likewise.
	350	(OP_REG_VexI4): Likewise.
	351
5e6718e4 L	352	2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
	353
	354	* i386-dis.c (print_insn): Update comments.
	355
d869730d L	356	2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
	357
	358	* i386-dis.c (rex_original): Removed.
	359	(ckprefix): Remove rex_original.
	360	(print_insn): Update comments.
	361
3725885a RW	362	2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
	363
	364	* Makefile.in: Regenerate.
	365	* configure: Regenerate.
	366
b7cd1872 DE	367	2010-01-07 Doug Evans <dje@sebabeach.org>
	368
	369	* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
	370	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	371	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	372	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	373	* xstormy16-ibld.c: Regenerate.
	374
69dd9865 SP	375	2010-01-06 Quentin Neill <quentin.neill@amd.com>
	376
	377	* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
	378	* i386-init.h: Regenerated.
	379
e3e535bc NC	380	2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
	381
	382	* arm-dis.c (print_insn): Fixed search for next symbol and data
	383	dumping condition, and the initial mapping symbol state.
	384
fe8afbc4 DE	385	2010-01-05 Doug Evans <dje@sebabeach.org>
	386
	387	* cgen-ibld.in: #include "cgen/basic-modes.h".
	388	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	389	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	390	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	391	* xstormy16-ibld.c: Regenerate.
	392
2edcd244 NC	393	2010-01-04 Nick Clifton <nickc@redhat.com>
	394
	395	PR 11123
	396	* arm-dis.c (print_insn_coprocessor): Initialise value.
	397
0dc93057 AM	398	2010-01-04 Edmar Wienskoski <edmar@freescale.com>
	399
	400	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
	401
05994f45 DE	402	2010-01-02 Doug Evans <dje@sebabeach.org>
	403
	404	* cgen-asm.in: Update copyright year.
	405	* cgen-dis.in: Update copyright year.
	406	* cgen-ibld.in: Update copyright year.
	407	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	408	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	409	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	410	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	411	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	412	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	413	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	414	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	415	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	416	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	417	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	418	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	419	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	420	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	421	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	422	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	423	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	424	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	425	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	426	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	427	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f	428
43ecc30f	429	For older changes see ChangeLog-2009
252b5132 RH	430	\f
252b5132 RH	431	Local Variables:
2f6d2f85 NC	432	mode: change-log
	433	left-margin: 8
	434	fill-column: 74
252b5132 RH	435	version-control: never
252b5132 RH	436	End: