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x86: fold to-scalar-int conversion insns
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
9f123b91
JB		 12018-03-28 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
4 Fold AVX512 forms
5 * i386-tlb.h: Re-generate.
6
9646c87b
JB		 72018-03-28 Jan Beulich <jbeulich@suse.com>
8
9 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
10 (vex_len_table): Drop Y for vcvt*2si.
11 (putop): Replace plain 'Y' handling by abort().
12
c8d59609
NC		 132018-03-28 Nick Clifton <nickc@redhat.com>
14
15 PR 22988
16 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
17 instructions with only a base address register.
18 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
19 handle AARHC64_OPND_SVE_ADDR_R.
20 (aarch64_print_operand): Likewise.
21 * aarch64-asm-2.c: Regenerate.
22 * aarch64_dis-2.c: Regenerate.
23 * aarch64-opc-2.c: Regenerate.
24
b8c169f3
JB		 252018-03-22 Jan Beulich <jbeulich@suse.com>
26
27 * i386-opc.tbl: Drop VecESize from register only insn forms and
28 memory forms not allowing broadcast.
29 * i386-tlb.h: Re-generate.
30
96bc132a
JB		 312018-03-22 Jan Beulich <jbeulich@suse.com>
32
33 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
34 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
35 sha256*): Drop Disp<N>.
36
9f79e886
JB		 372018-03-22 Jan Beulich <jbeulich@suse.com>
38
39 * i386-dis.c (EbndS, bnd_swap_mode): New.
40 (prefix_table): Use EbndS.
41 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
42 * i386-opc.tbl (bndmov): Move misplaced Load.
43 * i386-tlb.h: Re-generate.
44
d6793fa1
JB		 452018-03-22 Jan Beulich <jbeulich@suse.com>
46
47 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
48 templates allowing memory operands and folded ones for register
49 only flavors.
50 * i386-tlb.h: Re-generate.
51
f7768225
JB		 522018-03-22 Jan Beulich <jbeulich@suse.com>
53
54 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
55 256-bit templates. Drop redundant leftover Disp<N>.
56 * i386-tlb.h: Re-generate.
57
0e35537d
JW		 582018-03-14 Kito Cheng <kito.cheng@gmail.com>
59
60 * riscv-opc.c (riscv_insn_types): New.
61
b4a3689a
NC		 622018-03-13 Nick Clifton <nickc@redhat.com>
63
64 * po/pt_BR.po: Updated Brazilian Portuguese translation.
65
d3d50934
L		 662018-03-08 H.J. Lu <hongjiu.lu@intel.com>
67
68 * i386-opc.tbl: Add Optimize to clr.
69 * i386-tbl.h: Regenerated.
70
bd5dea88
L		 712018-03-08 H.J. Lu <hongjiu.lu@intel.com>
72
73 * i386-gen.c (opcode_modifiers): Remove OldGcc.
74 * i386-opc.h (OldGcc): Removed.
75 (i386_opcode_modifier): Remove oldgcc.
76 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
77 instructions for old (<= 2.8.1) versions of gcc.
78 * i386-tbl.h: Regenerated.
79
e771e7c9
JB		 802018-03-08 Jan Beulich <jbeulich@suse.com>
81
82 * i386-opc.h (EVEXDYN): New.
83 * i386-opc.tbl: Fold various AVX512VL templates.
84 * i386-tlb.h: Re-generate.
85
ed438a93
JB		 862018-03-08 Jan Beulich <jbeulich@suse.com>
87
88 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
89 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
90 vpexpandd, vpexpandq): Fold AFX512VF templates.
91 * i386-tlb.h: Re-generate.
92
454172a9
JB		 932018-03-08 Jan Beulich <jbeulich@suse.com>
94
95 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
96 Fold 128- and 256-bit VEX-encoded templates.
97 * i386-tlb.h: Re-generate.
98
36824150
JB		 992018-03-08 Jan Beulich <jbeulich@suse.com>
100
101 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
102 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
103 vpexpandd, vpexpandq): Fold AVX512F templates.
104 * i386-tlb.h: Re-generate.
105
e7f5c0a9
JB		 1062018-03-08 Jan Beulich <jbeulich@suse.com>
107
108 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
109 64-bit templates. Drop Disp<N>.
110 * i386-tlb.h: Re-generate.
111
25a4277f
JB		 1122018-03-08 Jan Beulich <jbeulich@suse.com>
113
114 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
115 and 256-bit templates.
116 * i386-tlb.h: Re-generate.
117
d2224064
JB		 1182018-03-08 Jan Beulich <jbeulich@suse.com>
119
120 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
121 * i386-tlb.h: Re-generate.
122
1b193f0b
JB		 1232018-03-08 Jan Beulich <jbeulich@suse.com>
124
125 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
126 Drop NoAVX.
127 * i386-tlb.h: Re-generate.
128
f2f6a710
JB		 1292018-03-08 Jan Beulich <jbeulich@suse.com>
130
131 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
132 * i386-tlb.h: Re-generate.
133
38e314eb
JB		 1342018-03-08 Jan Beulich <jbeulich@suse.com>
135
136 * i386-gen.c (opcode_modifiers): Delete FloatD.
137 * i386-opc.h (FloatD): Delete.
138 (struct i386_opcode_modifier): Delete floatd.
139 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
140 FloatD by D.
141 * i386-tlb.h: Re-generate.
142
d53e6b98
JB		 1432018-03-08 Jan Beulich <jbeulich@suse.com>
144
145 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
146
2907c2f5
JB		 1472018-03-08 Jan Beulich <jbeulich@suse.com>
148
149 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
150 * i386-tlb.h: Re-generate.
151
73053c1f
JB		 1522018-03-08 Jan Beulich <jbeulich@suse.com>
153
154 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
155 forms.
156 * i386-tlb.h: Re-generate.
157
52fe4420
AM		 1582018-03-07 Alan Modra <amodra@gmail.com>
159
160 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
161 bfd_arch_rs6000.
162 * disassemble.h (print_insn_rs6000): Delete.
163 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
164 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
165 (print_insn_rs6000): Delete.
166
a6743a54
AM		 1672018-03-03 Alan Modra <amodra@gmail.com>
168
169 * sysdep.h (opcodes_error_handler): Define.
170 (_bfd_error_handler): Declare.
171 * Makefile.am: Remove stray #.
172 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
173 EDIT" comment.
174 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
175 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
176 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
177 opcodes_error_handler to print errors. Standardize error messages.
178 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
179 and include opintl.h.
180 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
181 * i386-gen.c: Standardize error messages.
182 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
183 * Makefile.in: Regenerate.
184 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
185 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
186 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
187 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
188 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
189 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
190 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
191 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
192 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
193 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
194 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
195 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
196 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
197
8305403a
L		 1982018-03-01 H.J. Lu <hongjiu.lu@intel.com>
199
200 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
201 vpsub[bwdq] instructions.
202 * i386-tbl.h: Regenerated.
203
e184813f
AM		 2042018-03-01 Alan Modra <amodra@gmail.com>
205
206 * configure.ac (ALL_LINGUAS): Sort.
207 * configure: Regenerate.
208
5b616bef
TP		 2092018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
210
211 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
212 macro by assignements.
213
b6f8c7c4
L		 2142018-02-27 H.J. Lu <hongjiu.lu@intel.com>
215
216 PR gas/22871
217 * i386-gen.c (opcode_modifiers): Add Optimize.
218 * i386-opc.h (Optimize): New enum.
219 (i386_opcode_modifier): Add optimize.
220 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
221 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
222 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
223 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
224 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
225 vpxord and vpxorq.
226 * i386-tbl.h: Regenerated.
227
e95b887f
AM		 2282018-02-26 Alan Modra <amodra@gmail.com>
229
230 * crx-dis.c (getregliststring): Allocate a large enough buffer
231 to silence false positive gcc8 warning.
232
0bccfb29
JW		 2332018-02-22 Shea Levy <shea@shealevy.com>
234
235 * disassemble.c (ARCH_riscv): Define if ARCH_all.
236
6b6b6807
L		 2372018-02-22 H.J. Lu <hongjiu.lu@intel.com>
238
239 * i386-opc.tbl: Add {rex},
240 * i386-tbl.h: Regenerated.
241
75f31665
MR		 2422018-02-20 Maciej W. Rozycki <macro@mips.com>
243
244 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
245 (mips16_opcodes): Replace `M' with `m' for "restore".
246
e207bc53
TP		 2472018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
248
249 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
250
87993319
MR		 2512018-02-13 Maciej W. Rozycki <macro@mips.com>
252
253 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
254 variable to `function_index'.
255
68d20676
NC		 2562018-02-13 Nick Clifton <nickc@redhat.com>
257
258 PR 22823
259 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
260 about truncation of printing.
261
d2159fdc
HW		 2622018-02-12 Henry Wong <henry@stuffedcow.net>
263
264 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
265
f174ef9f
NC		 2662018-02-05 Nick Clifton <nickc@redhat.com>
267
268 * po/pt_BR.po: Updated Brazilian Portuguese translation.
269
be3a8dca
IT		 2702018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
271
272 * i386-dis.c (enum): Add pconfig.
273 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
274 (cpu_flags): Add CpuPCONFIG.
275 * i386-opc.h (enum): Add CpuPCONFIG.
276 (i386_cpu_flags): Add cpupconfig.
277 * i386-opc.tbl: Add PCONFIG instruction.
278 * i386-init.h: Regenerate.
279 * i386-tbl.h: Likewise.
280
3233d7d0
IT		 2812018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
282
283 * i386-dis.c (enum): Add PREFIX_0F09.
284 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
285 (cpu_flags): Add CpuWBNOINVD.
286 * i386-opc.h (enum): Add CpuWBNOINVD.
287 (i386_cpu_flags): Add cpuwbnoinvd.
288 * i386-opc.tbl: Add WBNOINVD instruction.
289 * i386-init.h: Regenerate.
290 * i386-tbl.h: Likewise.
291
e925c834
JW		 2922018-01-17 Jim Wilson <jimw@sifive.com>
293
294 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
295
d777820b
IT		 2962018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
297
298 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
299 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
300 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
301 (cpu_flags): Add CpuIBT, CpuSHSTK.
302 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
303 (i386_cpu_flags): Add cpuibt, cpushstk.
304 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
305 * i386-init.h: Regenerate.
306 * i386-tbl.h: Likewise.
307
f6efed01
NC		 3082018-01-16 Nick Clifton <nickc@redhat.com>
309
310 * po/pt_BR.po: Updated Brazilian Portugese translation.
311 * po/de.po: Updated German translation.
312
2721d702
JW		 3132018-01-15 Jim Wilson <jimw@sifive.com>
314
315 * riscv-opc.c (match_c_nop): New.
316 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
317
616dcb87
NC		 3182018-01-15 Nick Clifton <nickc@redhat.com>
319
320 * po/uk.po: Updated Ukranian translation.
321
3957a496
NC		 3222018-01-13 Nick Clifton <nickc@redhat.com>
323
324 * po/opcodes.pot: Regenerated.
325
769c7ea5
NC		 3262018-01-13 Nick Clifton <nickc@redhat.com>
327
328 * configure: Regenerate.
329
faf766e3
NC		 3302018-01-13 Nick Clifton <nickc@redhat.com>
331
332 2.30 branch created.
333
888a89da
IT		 3342018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
335
336 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
337 * i386-tbl.h: Regenerate.
338
cbda583a
JB		 3392018-01-10 Jan Beulich <jbeulich@suse.com>
340
341 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
342 * i386-tbl.h: Re-generate.
343
c9e92278
JB		 3442018-01-10 Jan Beulich <jbeulich@suse.com>
345
346 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
347 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
348 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
349 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
350 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
351 Disp8MemShift of AVX512VL forms.
352 * i386-tbl.h: Re-generate.
353
35fd2b2b
JW		 3542018-01-09 Jim Wilson <jimw@sifive.com>
355
356 * riscv-dis.c (maybe_print_address): If base_reg is zero,
357 then the hi_addr value is zero.
358
91d8b670
JG		 3592018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
360
361 * arm-dis.c (arm_opcodes): Add csdb.
362 (thumb32_opcodes): Add csdb.
363
be2e7d95
JG		 3642018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
365
366 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
367 * aarch64-asm-2.c: Regenerate.
368 * aarch64-dis-2.c: Regenerate.
369 * aarch64-opc-2.c: Regenerate.
370
704a705d
L		 3712018-01-08 H.J. Lu <hongjiu.lu@intel.com>
372
373 PR gas/22681
374 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
375 Remove AVX512 vmovd with 64-bit operands.
376 * i386-tbl.h: Regenerated.
377
35eeb78f
JW		 3782018-01-05 Jim Wilson <jimw@sifive.com>
379
380 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
381 jalr.
382
219d1afa
AM		 3832018-01-03 Alan Modra <amodra@gmail.com>
384
385 Update year range in copyright notice of all files.
386
1508bbf5
JB		 3872018-01-02 Jan Beulich <jbeulich@suse.com>
388
389 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
390 and OPERAND_TYPE_REGZMM entries.
391
1e563868 392For older changes see ChangeLog-2017
3499769a 393\f
1e563868 394Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 395
396Copying and distribution of this file, with or without modification,
397are permitted in any medium without royalty provided the copyright
398notice and this notice are preserved.
399
400Local Variables:
401mode: change-log
402left-margin: 8
403fill-column: 74
404version-control: never
405End:
GDB Binutils - Deliverables
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