[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-02-11  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	* i386-tbl.h: Re-generate.

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>

	* mips-dis.c: Update copyright.
	(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.

2008-01-29  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c: Support optional L form mtmsr.

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.

2008-01-23  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (Byte): Fix a typo.

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (set_bitfield): Use fail () on error.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (lineno): New.
	(filename): Likewise.
	(set_bitfield): Report filename and line numer on error.
	(process_i386_opcodes): Set filename and update lineno.
	(process_i386_registers): Likewise.

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax 
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c: Update copyright to 2008.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.

2008-01-02  Mark Kettenis  <kettenis@gnu.org>

	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	From Miod Vallat.

For older changes see ChangeLog-2007
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
a60de03c JB	1	2008-02-13 Jan Beulich <jbeulich@novell.com>
	2
	3	* i386-gen.c (process_i386_registers): Process new fields.
	4	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	5	unsigned char. Add dw2_regnum and Dw2Inval.
	6	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	7	register names.
	8	* i386-tbl.h: Re-generate.
	9
f03fe4c1 L	10	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
f03fe4c1 L	11
4b6bc8eb	12	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
f03fe4c1 L	13	* i386-init.h: Updated.
f03fe4c1 L	14
475a2301 L	15	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
	16
	17	* i386-gen.c (cpu_flags): Add CpuXsave.
	18
	19	* i386-opc.h (CpuXsave): New.
4b6bc8eb	20	(CpuLM): Updated.
475a2301 L	21	(i386_cpu_flags): Add cpuxsave.
	22
	23	* i386-dis.c (MOD_0FAE_REG_4): New.
	24	(RM_0F01_REG_2): Likewise.
	25	(MOD_0FAE_REG_5): Updated.
	26	(RM_0F01_REG_3): Likewise.
	27	(reg_table): Use MOD_0FAE_REG_4.
	28	(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
	29	for xrstor.
	30	(rm_table): Add RM_0F01_REG_2.
	31
	32	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	33	* i386-init.h: Regenerated.
	34	* i386-tbl.h: Likewise.
	35
595785c6	36	2008-02-11 Jan Beulich <jbeulich@novell.com>
041179fc	37
595785c6 JB	38	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	39	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	40	* i386-tbl.h: Re-generate.
	41
bb8541b9 L	42	2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
	43
	44	PR 5715
	45	* configure: Regenerated.
	46
57b592a3 AN	47	2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
	48
	49	* mips-dis.c: Update copyright.
	50	(mips_arch_choices): Add Octeon.
	51	* mips-opc.c: Update copyright.
	52	(IOCT): New macro.
	53	(mips_builtin_opcodes): Add Octeon instruction synciobdma.
	54
930bb4cf AM	55	2008-01-29 Alan Modra <amodra@bigpond.net.au>
	56
	57	* ppc-opc.c: Support optional L form mtmsr.
	58
82c18208 L	59	2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
	60
	61	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
	62
599121aa L	63	2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
	64
	65	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	66	* i386-init.h: Regenerated.
	67
80098f51 TG	68	2008-01-23 Tristan Gingold <gingold@adacore.com>
	69
	70	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	71	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
	72
115c7c25 L	73	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	74
	75	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	76	(cpu_flags): Likewise.
	77
	78	* i386-opc.h (CpuMMX2): Removed.
	79	(CpuSSE): Updated.
	80
	81	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE\|Cpu3dnowA.
	82	* i386-init.h: Regenerated.
	83	* i386-tbl.h: Likewise.
	84
6305a203 L	85	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	86
	87	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	88	CPU_SMX_FLAGS.
	89	* i386-init.h: Regenerated.
	90
fd07a1c8 L	91	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	92
	93	* i386-opc.tbl: Use Qword on movddup.
	94	* i386-tbl.h: Regenerated.
	95
321fd21e L	96	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	97
	98	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	99	* i386-tbl.h: Regenerated.
	100
4ee52178 L	101	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	102
	103	* i386-dis.c (Mx): New.
	104	(PREFIX_0FC3): Likewise.
	105	(PREFIX_0FC7_REG_6): Updated.
	106	(dis386_twobyte): Use PREFIX_0FC3.
	107	(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
	108	Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
	109	movntss.
	110
5c07affc L	111	2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
	112
	113	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	114	(operand_types): Add Mem.
	115
	116	* i386-opc.h (IntelSyntax): New.
	117	* i386-opc.h (Mem): New.
	118	(Byte): Updated.
	119	(Opcode_Modifier_Max): Updated.
	120	(i386_opcode_modifier): Add intelsyntax.
	121	(i386_operand_type): Add mem.
	122
	123	* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
	124	instructions.
	125
	126	* i386-reg.tbl: Add size for accumulator.
	127
	128	* i386-init.h: Regenerated.
	129	* i386-tbl.h: Likewise.
	130
0d6a2f58 L	131	2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
	132
	133	* i386-opc.h (Byte): Fix a typo.
	134
7d5e4556 L	135	2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
	136
	137	PR gas/5534
	138	* i386-gen.c (operand_type_init): Add Dword to
	139	OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
	140	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	141	Qword and Xmmword.
	142	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	143	Xmmword, Unspecified and Anysize.
	144	(set_bitfield): Make Mmword an alias of Qword. Make Oword
	145	an alias of Xmmword.
	146
	147	* i386-opc.h (CheckSize): Removed.
	148	(Byte): Updated.
	149	(Word): Likewise.
	150	(Dword): Likewise.
	151	(Qword): Likewise.
	152	(Xmmword): Likewise.
	153	(FWait): Updated.
	154	(OTMax): Likewise.
	155	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	156	qword and xmmword.
	157	(Fword): New.
	158	(TBYTE): Likewise.
	159	(Unspecified): Likewise.
	160	(Anysize): Likewise.
	161	(i386_operand_type): Add byte, word, dword, fword, qword,
	162	tbyte xmmword, unspecified and anysize.
	163
	164	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	165	Tbyte, Xmmword, Unspecified and Anysize.
	166
	167	* i386-reg.tbl: Add size for accumulator.
	168
	169	* i386-init.h: Regenerated.
	170	* i386-tbl.h: Likewise.
	171
b5b1fc4f L	172	2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
	173
	174	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	175	(REG_0F18): Updated.
	176	(reg_table): Updated.
	177	(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
	178	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
	179
50e8458f L	180	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	181
	182	* i386-gen.c (set_bitfield): Use fail () on error.
	183
3d4d5afa L	184	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	185
	186	* i386-gen.c (lineno): New.
	187	(filename): Likewise.
	188	(set_bitfield): Report filename and line numer on error.
	189	(process_i386_opcodes): Set filename and update lineno.
	190	(process_i386_registers): Likewise.
	191
e1d4d893 L	192	2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
	193
	194	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	195	ATTSyntax.
	196
	197	* i386-opc.h (IntelMnemonic): Renamed to ..
	198	(ATTSyntax): This
	199	(Opcode_Modifier_Max): Updated.
	200	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	201	and intelsyntax.
	202
	203	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	204	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	205	* i386-tbl.h: Regenerated.
	206
6f143e4d L	207	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	208
	209	* i386-gen.c: Update copyright to 2008.
	210	* i386-opc.h: Likewise.
	211	* i386-opc.tbl: Likewise.
	212
	213	* i386-init.h: Regenerated.
	214	* i386-tbl.h: Likewise.
	215
c6add537 L	216	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	217
	218	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	219	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	220	* i386-tbl.h: Regenerated.
	221
3629bb00 L	222	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	223
	224	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	225	CpuSSE4_2_Or_ABM.
	226	(cpu_flags): Likewise.
	227
	228	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	229	(CpuSSE4_2_Or_ABM): Likewise.
	230	(CpuLM): Updated.
	231	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
	232
	233	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	234	Cpu686\|CpuPadLock with CpuSSE4_1\|CpuSSE5, CpuABM\|CpuSSE4_2
	235	and CpuPadLock, respectively.
	236	* i386-init.h: Regenerated.
	237	* i386-tbl.h: Likewise.
	238
24995bd6 L	239	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	240
	241	* i386-gen.c (opcode_modifiers): Remove No_xSuf.
	242
	243	* i386-opc.h (No_xSuf): Removed.
	244	(CheckSize): Updated.
	245
	246	* i386-tbl.h: Regenerated.
	247
e0329a22 L	248	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	249
	250	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	251	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	252	CPU_SSE5_FLAGS.
	253	(cpu_flags): Add CpuSSE4_2_Or_ABM.
	254
	255	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	256	(CpuLM): Updated.
	257	(i386_cpu_flags): Add cpusse4_2_or_abm.
	258
	259	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	260	CpuABM\|CpuSSE4_2 on popcnt.
	261	* i386-init.h: Regenerated.
	262	* i386-tbl.h: Likewise.
	263
f2a9c676 L	264	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	265
	266	* i386-opc.h: Update comments.
	267
d978b5be L	268	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	269
	270	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	271	* i386-opc.h: Likewise.
	272	* i386-opc.tbl: Likewise.
	273
582d5edd L	274	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	275
	276	PR gas/5534
	277	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	278	Byte, Word, Dword, QWord and Xmmword.
	279
	280	* i386-opc.h (No_xSuf): New.
	281	(CheckSize): Likewise.
	282	(Byte): Likewise.
	283	(Word): Likewise.
	284	(Dword): Likewise.
	285	(QWord): Likewise.
	286	(Xmmword): Likewise.
	287	(FWait): Updated.
	288	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	289	Dword, QWord and Xmmword.
	290
	291	* i386-opc.tbl: Add CheckSize\|QWord to movq if IgnoreSize is
	292	used.
	293	* i386-tbl.h: Regenerated.
	294
3fe15143 MK	295	2008-01-02 Mark Kettenis <kettenis@gnu.org>
	296
	297	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	298	From Miod Vallat.
	299
6c7ac64e	300	For older changes see ChangeLog-2007
252b5132 RH	301	\f
252b5132 RH	302	Local Variables:
2f6d2f85 NC	303	mode: change-log
	304	left-margin: 8
	305	fill-column: 74
252b5132 RH	306	version-control: never
252b5132 RH	307	End: