Revert "Enable Intel MOVDIRI, MOVDIR64B instructions."
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
e2195274
JB
12018-04-26 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl: Fold various non-memory operand AVX512VL
4 templates into their base ones.
5 * i386-tlb.h: Re-generate.
6
59ef5df4
JB
72018-04-26 Jan Beulich <jbeulich@suse.com>
8
9 * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
10 CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
11 CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
12 CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
13 * i386-init.h: Re-generate.
14
6e041cf4
JB
152018-04-26 Jan Beulich <jbeulich@suse.com>
16
17 * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
18 CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
19 CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
20 Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
21 comment.
22 (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
23 and CpuRegMask.
24 * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
25 CpuRegMask: Delete.
26 (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
27 cpuregzmm, and cpuregmask.
28 * i386-init.h: Re-generate.
29 * i386-tbl.h: Re-generate.
30
0e0eea78
JB
312018-04-26 Jan Beulich <jbeulich@suse.com>
32
33 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
34 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
35 * i386-init.h: Re-generate.
36
2f1bada2
JB
372018-04-26 Jan Beulich <jbeulich@suse.com>
38
39 * i386-gen.c (VexImmExt): Delete.
40 * i386-opc.h (VexImmExt, veximmext): Delete.
41 * i386-opc.tbl: Drop all VexImmExt uses.
42 * i386-tlb.h: Re-generate.
43
bacd1457
JB
442018-04-25 Jan Beulich <jbeulich@suse.com>
45
46 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
47 register-only forms.
48 * i386-tlb.h: Re-generate.
49
10bba94b
TC
502018-04-25 Tamar Christina <tamar.christina@arm.com>
51
52 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
53
c48935d7
IT
542018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
55
56 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
57 PREFIX_0F1C.
58 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
59 (cpu_flags): Add CpuCLDEMOTE.
60 * i386-init.h: Regenerate.
61 * i386-opc.h (enum): Add CpuCLDEMOTE,
62 (i386_cpu_flags): Add cpucldemote.
63 * i386-opc.tbl: Add cldemote.
64 * i386-tbl.h: Regenerate.
65
211dc24b
AM
662018-04-16 Alan Modra <amodra@gmail.com>
67
68 * Makefile.am: Remove sh5 and sh64 support.
69 * configure.ac: Likewise.
70 * disassemble.c: Likewise.
71 * disassemble.h: Likewise.
72 * sh-dis.c: Likewise.
73 * sh64-dis.c: Delete.
74 * sh64-opc.c: Delete.
75 * sh64-opc.h: Delete.
76 * Makefile.in: Regenerate.
77 * configure: Regenerate.
78 * po/POTFILES.in: Regenerate.
79
a9a4b302
AM
802018-04-16 Alan Modra <amodra@gmail.com>
81
82 * Makefile.am: Remove w65 support.
83 * configure.ac: Likewise.
84 * disassemble.c: Likewise.
85 * disassemble.h: Likewise.
86 * w65-dis.c: Delete.
87 * w65-opc.h: Delete.
88 * Makefile.in: Regenerate.
89 * configure: Regenerate.
90 * po/POTFILES.in: Regenerate.
91
04cb01fd
AM
922018-04-16 Alan Modra <amodra@gmail.com>
93
94 * configure.ac: Remove we32k support.
95 * configure: Regenerate.
96
c2bf1eec
AM
972018-04-16 Alan Modra <amodra@gmail.com>
98
99 * Makefile.am: Remove m88k support.
100 * configure.ac: Likewise.
101 * disassemble.c: Likewise.
102 * disassemble.h: Likewise.
103 * m88k-dis.c: Delete.
104 * Makefile.in: Regenerate.
105 * configure: Regenerate.
106 * po/POTFILES.in: Regenerate.
107
6793974d
AM
1082018-04-16 Alan Modra <amodra@gmail.com>
109
110 * Makefile.am: Remove i370 support.
111 * configure.ac: Likewise.
112 * disassemble.c: Likewise.
113 * disassemble.h: Likewise.
114 * i370-dis.c: Delete.
115 * i370-opc.c: Delete.
116 * Makefile.in: Regenerate.
117 * configure: Regenerate.
118 * po/POTFILES.in: Regenerate.
119
e82aa794
AM
1202018-04-16 Alan Modra <amodra@gmail.com>
121
122 * Makefile.am: Remove h8500 support.
123 * configure.ac: Likewise.
124 * disassemble.c: Likewise.
125 * disassemble.h: Likewise.
126 * h8500-dis.c: Delete.
127 * h8500-opc.h: Delete.
128 * Makefile.in: Regenerate.
129 * configure: Regenerate.
130 * po/POTFILES.in: Regenerate.
131
fceadf09
AM
1322018-04-16 Alan Modra <amodra@gmail.com>
133
134 * configure.ac: Remove tahoe support.
135 * configure: Regenerate.
136
ae1d3843
L
1372018-04-15 H.J. Lu <hongjiu.lu@intel.com>
138
139 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
140 umwait.
141 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
142 64-bit mode.
143 * i386-tbl.h: Regenerated.
144
de89d0a3
IT
1452018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
146
147 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
148 PREFIX_MOD_1_0FAE_REG_6.
149 (va_mode): New.
150 (OP_E_register): Use va_mode.
151 * i386-dis-evex.h (prefix_table):
152 New instructions (see prefixes above).
153 * i386-gen.c (cpu_flag_init): Add WAITPKG.
154 (cpu_flags): Likewise.
155 * i386-opc.h (enum): Likewise.
156 (i386_cpu_flags): Likewise.
157 * i386-opc.tbl: Add umonitor, umwait, tpause.
158 * i386-init.h: Regenerate.
159 * i386-tbl.h: Likewise.
160
a8eb42a8
AM
1612018-04-11 Alan Modra <amodra@gmail.com>
162
163 * opcodes/i860-dis.c: Delete.
164 * opcodes/i960-dis.c: Delete.
165 * Makefile.am: Remove i860 and i960 support.
166 * configure.ac: Likewise.
167 * disassemble.c: Likewise.
168 * disassemble.h: Likewise.
169 * Makefile.in: Regenerate.
170 * configure: Regenerate.
171 * po/POTFILES.in: Regenerate.
172
caf0678c
L
1732018-04-04 H.J. Lu <hongjiu.lu@intel.com>
174
175 PR binutils/23025
176 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
177 to 0.
178 (print_insn): Clear vex instead of vex.evex.
179
4fb0d2b9
NC
1802018-04-04 Nick Clifton <nickc@redhat.com>
181
182 * po/es.po: Updated Spanish translation.
183
c39e5b26
JB
1842018-03-28 Jan Beulich <jbeulich@suse.com>
185
186 * i386-gen.c (opcode_modifiers): Delete VecESize.
187 * i386-opc.h (VecESize): Delete.
188 (struct i386_opcode_modifier): Delete vecesize.
189 * i386-opc.tbl: Drop VecESize.
190 * i386-tlb.h: Re-generate.
191
8e6e0792
JB
1922018-03-28 Jan Beulich <jbeulich@suse.com>
193
194 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
195 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
196 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
197 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
198 * i386-tlb.h: Re-generate.
199
9f123b91
JB
2002018-03-28 Jan Beulich <jbeulich@suse.com>
201
202 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
203 Fold AVX512 forms
204 * i386-tlb.h: Re-generate.
205
9646c87b
JB
2062018-03-28 Jan Beulich <jbeulich@suse.com>
207
208 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
209 (vex_len_table): Drop Y for vcvt*2si.
210 (putop): Replace plain 'Y' handling by abort().
211
c8d59609
NC
2122018-03-28 Nick Clifton <nickc@redhat.com>
213
214 PR 22988
215 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
216 instructions with only a base address register.
217 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
218 handle AARHC64_OPND_SVE_ADDR_R.
219 (aarch64_print_operand): Likewise.
220 * aarch64-asm-2.c: Regenerate.
221 * aarch64_dis-2.c: Regenerate.
222 * aarch64-opc-2.c: Regenerate.
223
b8c169f3
JB
2242018-03-22 Jan Beulich <jbeulich@suse.com>
225
226 * i386-opc.tbl: Drop VecESize from register only insn forms and
227 memory forms not allowing broadcast.
228 * i386-tlb.h: Re-generate.
229
96bc132a
JB
2302018-03-22 Jan Beulich <jbeulich@suse.com>
231
232 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
233 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
234 sha256*): Drop Disp<N>.
235
9f79e886
JB
2362018-03-22 Jan Beulich <jbeulich@suse.com>
237
238 * i386-dis.c (EbndS, bnd_swap_mode): New.
239 (prefix_table): Use EbndS.
240 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
241 * i386-opc.tbl (bndmov): Move misplaced Load.
242 * i386-tlb.h: Re-generate.
243
d6793fa1
JB
2442018-03-22 Jan Beulich <jbeulich@suse.com>
245
246 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
247 templates allowing memory operands and folded ones for register
248 only flavors.
249 * i386-tlb.h: Re-generate.
250
f7768225
JB
2512018-03-22 Jan Beulich <jbeulich@suse.com>
252
253 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
254 256-bit templates. Drop redundant leftover Disp<N>.
255 * i386-tlb.h: Re-generate.
256
0e35537d
JW
2572018-03-14 Kito Cheng <kito.cheng@gmail.com>
258
259 * riscv-opc.c (riscv_insn_types): New.
260
b4a3689a
NC
2612018-03-13 Nick Clifton <nickc@redhat.com>
262
263 * po/pt_BR.po: Updated Brazilian Portuguese translation.
264
d3d50934
L
2652018-03-08 H.J. Lu <hongjiu.lu@intel.com>
266
267 * i386-opc.tbl: Add Optimize to clr.
268 * i386-tbl.h: Regenerated.
269
bd5dea88
L
2702018-03-08 H.J. Lu <hongjiu.lu@intel.com>
271
272 * i386-gen.c (opcode_modifiers): Remove OldGcc.
273 * i386-opc.h (OldGcc): Removed.
274 (i386_opcode_modifier): Remove oldgcc.
275 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
276 instructions for old (<= 2.8.1) versions of gcc.
277 * i386-tbl.h: Regenerated.
278
e771e7c9
JB
2792018-03-08 Jan Beulich <jbeulich@suse.com>
280
281 * i386-opc.h (EVEXDYN): New.
282 * i386-opc.tbl: Fold various AVX512VL templates.
283 * i386-tlb.h: Re-generate.
284
ed438a93
JB
2852018-03-08 Jan Beulich <jbeulich@suse.com>
286
287 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
288 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
289 vpexpandd, vpexpandq): Fold AFX512VF templates.
290 * i386-tlb.h: Re-generate.
291
454172a9
JB
2922018-03-08 Jan Beulich <jbeulich@suse.com>
293
294 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
295 Fold 128- and 256-bit VEX-encoded templates.
296 * i386-tlb.h: Re-generate.
297
36824150
JB
2982018-03-08 Jan Beulich <jbeulich@suse.com>
299
300 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
301 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
302 vpexpandd, vpexpandq): Fold AVX512F templates.
303 * i386-tlb.h: Re-generate.
304
e7f5c0a9
JB
3052018-03-08 Jan Beulich <jbeulich@suse.com>
306
307 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
308 64-bit templates. Drop Disp<N>.
309 * i386-tlb.h: Re-generate.
310
25a4277f
JB
3112018-03-08 Jan Beulich <jbeulich@suse.com>
312
313 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
314 and 256-bit templates.
315 * i386-tlb.h: Re-generate.
316
d2224064
JB
3172018-03-08 Jan Beulich <jbeulich@suse.com>
318
319 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
320 * i386-tlb.h: Re-generate.
321
1b193f0b
JB
3222018-03-08 Jan Beulich <jbeulich@suse.com>
323
324 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
325 Drop NoAVX.
326 * i386-tlb.h: Re-generate.
327
f2f6a710
JB
3282018-03-08 Jan Beulich <jbeulich@suse.com>
329
330 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
331 * i386-tlb.h: Re-generate.
332
38e314eb
JB
3332018-03-08 Jan Beulich <jbeulich@suse.com>
334
335 * i386-gen.c (opcode_modifiers): Delete FloatD.
336 * i386-opc.h (FloatD): Delete.
337 (struct i386_opcode_modifier): Delete floatd.
338 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
339 FloatD by D.
340 * i386-tlb.h: Re-generate.
341
d53e6b98
JB
3422018-03-08 Jan Beulich <jbeulich@suse.com>
343
344 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
345
2907c2f5
JB
3462018-03-08 Jan Beulich <jbeulich@suse.com>
347
348 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
349 * i386-tlb.h: Re-generate.
350
73053c1f
JB
3512018-03-08 Jan Beulich <jbeulich@suse.com>
352
353 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
354 forms.
355 * i386-tlb.h: Re-generate.
356
52fe4420
AM
3572018-03-07 Alan Modra <amodra@gmail.com>
358
359 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
360 bfd_arch_rs6000.
361 * disassemble.h (print_insn_rs6000): Delete.
362 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
363 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
364 (print_insn_rs6000): Delete.
365
a6743a54
AM
3662018-03-03 Alan Modra <amodra@gmail.com>
367
368 * sysdep.h (opcodes_error_handler): Define.
369 (_bfd_error_handler): Declare.
370 * Makefile.am: Remove stray #.
371 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
372 EDIT" comment.
373 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
374 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
375 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
376 opcodes_error_handler to print errors. Standardize error messages.
377 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
378 and include opintl.h.
379 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
380 * i386-gen.c: Standardize error messages.
381 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
382 * Makefile.in: Regenerate.
383 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
384 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
385 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
386 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
387 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
388 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
389 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
390 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
391 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
392 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
393 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
394 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
395 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
396
8305403a
L
3972018-03-01 H.J. Lu <hongjiu.lu@intel.com>
398
399 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
400 vpsub[bwdq] instructions.
401 * i386-tbl.h: Regenerated.
402
e184813f
AM
4032018-03-01 Alan Modra <amodra@gmail.com>
404
405 * configure.ac (ALL_LINGUAS): Sort.
406 * configure: Regenerate.
407
5b616bef
TP
4082018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
409
410 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
411 macro by assignements.
412
b6f8c7c4
L
4132018-02-27 H.J. Lu <hongjiu.lu@intel.com>
414
415 PR gas/22871
416 * i386-gen.c (opcode_modifiers): Add Optimize.
417 * i386-opc.h (Optimize): New enum.
418 (i386_opcode_modifier): Add optimize.
419 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
420 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
421 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
422 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
423 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
424 vpxord and vpxorq.
425 * i386-tbl.h: Regenerated.
426
e95b887f
AM
4272018-02-26 Alan Modra <amodra@gmail.com>
428
429 * crx-dis.c (getregliststring): Allocate a large enough buffer
430 to silence false positive gcc8 warning.
431
0bccfb29
JW
4322018-02-22 Shea Levy <shea@shealevy.com>
433
434 * disassemble.c (ARCH_riscv): Define if ARCH_all.
435
6b6b6807
L
4362018-02-22 H.J. Lu <hongjiu.lu@intel.com>
437
438 * i386-opc.tbl: Add {rex},
439 * i386-tbl.h: Regenerated.
440
75f31665
MR
4412018-02-20 Maciej W. Rozycki <macro@mips.com>
442
443 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
444 (mips16_opcodes): Replace `M' with `m' for "restore".
445
e207bc53
TP
4462018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
447
448 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
449
87993319
MR
4502018-02-13 Maciej W. Rozycki <macro@mips.com>
451
452 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
453 variable to `function_index'.
454
68d20676
NC
4552018-02-13 Nick Clifton <nickc@redhat.com>
456
457 PR 22823
458 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
459 about truncation of printing.
460
d2159fdc
HW
4612018-02-12 Henry Wong <henry@stuffedcow.net>
462
463 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
464
f174ef9f
NC
4652018-02-05 Nick Clifton <nickc@redhat.com>
466
467 * po/pt_BR.po: Updated Brazilian Portuguese translation.
468
be3a8dca
IT
4692018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
470
471 * i386-dis.c (enum): Add pconfig.
472 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
473 (cpu_flags): Add CpuPCONFIG.
474 * i386-opc.h (enum): Add CpuPCONFIG.
475 (i386_cpu_flags): Add cpupconfig.
476 * i386-opc.tbl: Add PCONFIG instruction.
477 * i386-init.h: Regenerate.
478 * i386-tbl.h: Likewise.
479
3233d7d0
IT
4802018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
481
482 * i386-dis.c (enum): Add PREFIX_0F09.
483 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
484 (cpu_flags): Add CpuWBNOINVD.
485 * i386-opc.h (enum): Add CpuWBNOINVD.
486 (i386_cpu_flags): Add cpuwbnoinvd.
487 * i386-opc.tbl: Add WBNOINVD instruction.
488 * i386-init.h: Regenerate.
489 * i386-tbl.h: Likewise.
490
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4912018-01-17 Jim Wilson <jimw@sifive.com>
492
493 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
494
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4952018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
496
497 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
498 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
499 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
500 (cpu_flags): Add CpuIBT, CpuSHSTK.
501 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
502 (i386_cpu_flags): Add cpuibt, cpushstk.
503 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
504 * i386-init.h: Regenerate.
505 * i386-tbl.h: Likewise.
506
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5072018-01-16 Nick Clifton <nickc@redhat.com>
508
509 * po/pt_BR.po: Updated Brazilian Portugese translation.
510 * po/de.po: Updated German translation.
511
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5122018-01-15 Jim Wilson <jimw@sifive.com>
513
514 * riscv-opc.c (match_c_nop): New.
515 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
516
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5172018-01-15 Nick Clifton <nickc@redhat.com>
518
519 * po/uk.po: Updated Ukranian translation.
520
3957a496
NC
5212018-01-13 Nick Clifton <nickc@redhat.com>
522
523 * po/opcodes.pot: Regenerated.
524
769c7ea5
NC
5252018-01-13 Nick Clifton <nickc@redhat.com>
526
527 * configure: Regenerate.
528
faf766e3
NC
5292018-01-13 Nick Clifton <nickc@redhat.com>
530
531 2.30 branch created.
532
888a89da
IT
5332018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
534
535 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
536 * i386-tbl.h: Regenerate.
537
cbda583a
JB
5382018-01-10 Jan Beulich <jbeulich@suse.com>
539
540 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
541 * i386-tbl.h: Re-generate.
542
c9e92278
JB
5432018-01-10 Jan Beulich <jbeulich@suse.com>
544
545 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
546 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
547 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
548 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
549 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
550 Disp8MemShift of AVX512VL forms.
551 * i386-tbl.h: Re-generate.
552
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5532018-01-09 Jim Wilson <jimw@sifive.com>
554
555 * riscv-dis.c (maybe_print_address): If base_reg is zero,
556 then the hi_addr value is zero.
557
91d8b670
JG
5582018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
559
560 * arm-dis.c (arm_opcodes): Add csdb.
561 (thumb32_opcodes): Add csdb.
562
be2e7d95
JG
5632018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
564
565 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
566 * aarch64-asm-2.c: Regenerate.
567 * aarch64-dis-2.c: Regenerate.
568 * aarch64-opc-2.c: Regenerate.
569
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L
5702018-01-08 H.J. Lu <hongjiu.lu@intel.com>
571
572 PR gas/22681
573 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
574 Remove AVX512 vmovd with 64-bit operands.
575 * i386-tbl.h: Regenerated.
576
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JW
5772018-01-05 Jim Wilson <jimw@sifive.com>
578
579 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
580 jalr.
581
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5822018-01-03 Alan Modra <amodra@gmail.com>
583
584 Update year range in copyright notice of all files.
585
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JB
5862018-01-02 Jan Beulich <jbeulich@suse.com>
587
588 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
589 and OPERAND_TYPE_REGZMM entries.
590
1e563868 591For older changes see ChangeLog-2017
3499769a 592\f
1e563868 593Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
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594
595Copying and distribution of this file, with or without modification,
596are permitted in any medium without royalty provided the copyright
597notice and this notice are preserved.
598
599Local Variables:
600mode: change-log
601left-margin: 8
602fill-column: 74
603version-control: never
604End:
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