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Fix 32-bit host/target --enable-targets=all build failure from Doug Evans.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
aa2273ba
JW		 12005-11-22 James E Wilson <wilson@specifix.com>
2
3 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
4 opcode_fprintf_vma): New.
5 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
6
ce7a772b
AM		 72005-11-16 Alan Modra <amodra@bigpond.net.au>
8
9 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
10 frsqrtes.
11
0499d65b
TS		 122005-11-14 David Ung <davidu@mips.com>
13
14 * mips16-opc.c: Add MIPS16e save/restore opcodes.
15 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
16 codes for save/restore.
17
dc82c973
AS		 182005-11-10 Andreas Schwab <schwab@suse.de>
19
20 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
21 coprocessor ID 1.
22
dbb33a87
NC		 232005-11-08 H.J. Lu <hongjiu.lu@intel.com>
24
25 * m32c-desc.c: Regenerated.
26
6f84a2a6
NS		 272005-11-08 Nathan Sidwell <nathan@codesourcery.com>
28
29 Add ms2.
30 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
31 ms1-opc.c, ms1-opc.h: Regenerated.
32
a541e3ce
SE		 332005-11-07 Steve Ellcey <sje@cup.hp.com>
34
35 * configure: Regenerate after modifying bfd/warning.m4.
36
3e7d61b2
AM		 372005-11-07 Alan Modra <amodra@bigpond.net.au>
38
39 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
40 ignored rex prefixes here.
41 (print_insn): Instead, handle them similarly to fwait followed
42 by non-fp insns.
43
a92e0d0a
L		 442005-11-02 H.J. Lu <hongjiu.lu@intel.com>
45
46 * iq2000-desc.c: Regenerated.
47 * iq2000-desc.h: Likewise.
48 * iq2000-dis.c: Likewise.
49 * iq2000-opc.c: Likewise.
50
36b0c57d
PB		 512005-11-02 Paul Brook <paul@codesourcery.com>
52
53 * arm-dis.c (print_insn_thumb32): Word align blx target address.
54
9a2ff3f5
AM		 552005-10-31 Alan Modra <amodra@bigpond.net.au>
56
57 * arm-dis.c (print_insn): Warning fix.
58
9e5169a8
L		 592005-10-30 H.J. Lu <hongjiu.lu@intel.com>
60
61 * Makefile.am: Run "make dep-am".
62 * Makefile.in: Regenerated.
63
64 * dep-in.sed: Replace " ./" with " ".
65
fb53f5a8
DB		 662005-10-28 Dave Brolley <brolley@redhat.com>
67
68 * All CGEN-generated sources: Regenerate.
69
70 Contribute the following changes:
71 2005-09-19 Dave Brolley <brolley@redhat.com>
72
73 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
74 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
75 bfd_arch_m32c case.
76
77 2005-02-16 Dave Brolley <brolley@redhat.com>
78
79 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
80 cgen_isa_mask_* to cgen_bitset_*.
81 * cgen-opc.c: Likewise.
82
83 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
84
85 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
86 * *-dis.c: Regenerate.
87
88 2003-06-05 DJ Delorie <dj@redhat.com>
89
90 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
91 it, as it may point to a reused buffer. Set prev_isas when we
92 change cpus.
93
94 2002-12-13 Dave Brolley <brolley@redhat.com>
95
96 * cgen-opc.c (cgen_isa_mask_create): New support function for
97 CGEN_ISA_MASK.
98 (cgen_isa_mask_init): Ditto.
99 (cgen_isa_mask_clear): Ditto.
100 (cgen_isa_mask_add): Ditto.
101 (cgen_isa_mask_set): Ditto.
102 (cgen_isa_supported): Ditto.
103 (cgen_isa_mask_compare): Ditto.
104 (cgen_isa_mask_intersection): Ditto.
105 (cgen_isa_mask_copy): Ditto.
106 (cgen_isa_mask_combine): Ditto.
107 * cgen-dis.in (libiberty.h): #include it.
108 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
109 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
110 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
111 * Makefile.in: Regenerated.
112
c6552317
DD		 1132005-10-27 DJ Delorie <dj@redhat.com>
114
115 * m32c-asm.c: Regenerate.
116 * m32c-desc.c: Regenerate.
117 * m32c-desc.h: Regenerate.
118 * m32c-dis.c: Regenerate.
119 * m32c-ibld.c: Regenerate.
120 * m32c-opc.c: Regenerate.
121 * m32c-opc.h: Regenerate.
122
f75eb1c0
DD		 1232005-10-26 DJ Delorie <dj@redhat.com>
124
125 * m32c-asm.c: Regenerate.
126 * m32c-desc.c: Regenerate.
127 * m32c-desc.h: Regenerate.
128 * m32c-dis.c: Regenerate.
129 * m32c-ibld.c: Regenerate.
130 * m32c-opc.c: Regenerate.
131 * m32c-opc.h: Regenerate.
132
f1022c90
PB		 1332005-10-26 Paul Brook <paul@codesourcery.com>
134
135 * arm-dis.c (arm_opcodes): Correct "sel" entry.
136
e277c00b
AM		 1372005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
138
139 * m32r-asm.c: Regenerate.
140
92e0a941
DD		 1412005-10-25 DJ Delorie <dj@redhat.com>
142
143 * m32c-asm.c: Regenerate.
144 * m32c-desc.c: Regenerate.
145 * m32c-desc.h: Regenerate.
146 * m32c-dis.c: Regenerate.
147 * m32c-ibld.c: Regenerate.
148 * m32c-opc.c: Regenerate.
149 * m32c-opc.h: Regenerate.
150
3c9b82ba
NC		 1512005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
152
153 * configure.in: Add target architecture bfd_arch_z80.
154 * configure: Regenerated.
3e7d61b2 155 * disassemble.c (disassembler)<ARCH_z80>: Add case
3c9b82ba
NC		 156 bfd_arch_z80.
157 * z80-dis.c: New file.
158
3caac5b8
AM		 1592005-10-25 Alan Modra <amodra@bigpond.net.au>
160
161 * po/POTFILES.in: Regenerate.
162 * po/opcodes.pot: Regenerate.
163
6a2375c6
JB		 1642005-10-24 Jan Beulich <jbeulich@novell.com>
165
166 * ia64-asmtab.c: Regenerate.
167
a1a280bb
DD		 1682005-10-21 DJ Delorie <dj@redhat.com>
169
170 * m32c-asm.c: Regenerate.
171 * m32c-desc.c: Regenerate.
172 * m32c-desc.h: Regenerate.
173 * m32c-dis.c: Regenerate.
174 * m32c-ibld.c: Regenerate.
175 * m32c-opc.c: Regenerate.
176 * m32c-opc.h: Regenerate.
177
b7d48530
NC		 1782005-10-21 Nick Clifton <nickc@redhat.com>
179
180 * bfin-dis.c: Tidy up code, removing redundant constructs.
181
8dd744b6
MS		 1822005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
183
184 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
185 instructions.
186
e74eb924
NC		 1872005-10-18 Nick Clifton <nickc@redhat.com>
188
189 * m32r-asm.c: Regenerate after updating m32r.opc.
190
471e4e36
JZ		 1912005-10-18 Jie Zhang <jie.zhang@analog.com>
192
193 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
194 reading instruction from memory.
195
5e03663f
NC		 1962005-10-18 Nick Clifton <nickc@redhat.com>
197
198 * m32r-asm.c: Regenerate after updating m32r.opc.
199
ab7c9a26
NC		 2002005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
201
202 * m32r-asm.c: Regenerate after updating m32r.opc.
203
19590ef7
RE		 2042005-10-08 James Lemke <jim@wasabisystems.com>
205
206 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
207 operations.
208
6edfbbad
DJ		 2092005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
210
211 * ppc-dis.c (struct dis_private): Remove.
212 (powerpc_dialect): Avoid aliasing warnings.
213 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
214
095f2843
NC		 2152005-09-30 Nick Clifton <nickc@redhat.com>
216
217 * po/ga.po: New Irish translation.
218 * configure.in (ALL_LINGUAS): Add "ga".
219 * configure: Regenerate.
220
fdd3b9b3
L		 2212005-09-30 H.J. Lu <hongjiu.lu@intel.com>
222
223 * Makefile.am: Run "make dep-am".
224 * Makefile.in: Regenerated.
225 * aclocal.m4: Likewise.
226 * configure: Likewise.
227
4b7f6baa
CM		 2282005-09-30 Catherine Moore <clm@cm00re.com>
229
230 * Makefile.am: Bfin support.
231 * Makefile.in: Regenerated.
232 * aclocal.m4: Regenerated.
233 * bfin-dis.c: New file.
234 * configure.in: Bfin support.
235 * configure: Regenerated.
236 * disassemble.c (ARCH_bfin): Define.
237 (disassembler): Add case for bfd_arch_bfin.
238
1a114b12
JB		 2392005-09-28 Jan Beulich <jbeulich@novell.com>
240
241 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
242 (indirEv): Use it.
243 (stackEv): New.
244 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
245 (dis386): Document and use new 'V' meta character. Use it for
246 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
247 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
248 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
249 data prefix as used whenever DFLAG was examined. Handle 'V'.
250 (intel_operand_size): Use stack_v_mode.
251 (OP_E): Use stack_v_mode, but handle only the special case of
252 64-bit mode without operand size override here; fall through to
253 v_mode case otherwise.
254 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
255 and no operand size override is present.
256 (OP_J): Use get32s for obtaining the displacement also when rex64
257 is present.
258
3eb17e6b
PB		 2592005-09-08 Paul Brook <paul@codesourcery.com>
260
261 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
262
61cc0267
CF		 2632005-09-06 Chao-ying Fu <fu@mips.com>
264
265 * mips-opc.c (MT32): New define.
266 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
267 bottom to avoid opcode collision with "mftr" and "mttr".
268 Add MT instructions.
269 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
270 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
271 formats.
272
b13dd07a
PB		 2732005-09-02 Paul Brook <paul@codesourcery.com>
274
275 * arm-dis.c (coprocessor_opcodes): Add null terminator.
276
8f06b2d8
PB		 2772005-09-02 Paul Brook <paul@codesourcery.com>
278
279 * arm-dis.c (coprocessor_opcodes): New.
280 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
281 (print_insn_coprocessor): New function.
282 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
283 format characters.
284 (print_insn_thumb32): Use print_insn_coprocessor.
285
a2dfd01f
PB		 2862005-08-30 Paul Brook <paul@codesourcery.com>
287
288 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
289
3f31e633
JB		 2902005-08-26 Jan Beulich <jbeulich@novell.com>
291
292 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
293 re-use.
294 (OP_E): Call intel_operand_size, move call site out of mode
295 dependent code.
296 (OP_OFF): Call intel_operand_size if suffix_always. Remove
297 ATTRIBUTE_UNUSED from parameters.
298 (OP_OFF64): Likewise.
299 (OP_ESreg): Call intel_operand_size.
300 (OP_DSreg): Likewise.
301 (OP_DIR): Use colon rather than semicolon as separator of far
302 jump/call operands.
303
fd25c5a9
CF		 3042005-08-25 Chao-ying Fu <fu@mips.com>
305
306 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
307 (mips_builtin_opcodes): Add DSP instructions.
308 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
309 mips64, mips64r2.
310 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
311 operand formats.
312
dd8b7c22
DU		 3132005-08-23 David Ung <davidu@mips.com>
314
315 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
3e7d61b2 316 instructions to the table.
dd8b7c22 317
c17ae8a2
AM		 3182005-08-18 Alan Modra <amodra@bigpond.net.au>
319
848cf006 320 * a29k-dis.c: Delete.
c17ae8a2
AM		 321 * Makefile.am: Remove a29k support.
322 * configure.in: Likewise.
323 * disassemble.c: Likewise.
324 * Makefile.in: Regenerate.
325 * configure: Regenerate.
326 * po/POTFILES.in: Regenerate.
327
36ae0db3
DJ		 3282005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
329
330 * ppc-dis.c (powerpc_dialect): Handle e300.
331 (print_ppc_disassembler_options): Likewise.
332 * ppc-opc.c (PPCE300): Define.
333 (powerpc_opcodes): Mark icbt as available for the e300.
334
63a3357b
DA		 3352005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
336
337 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
338 Use "rp" instead of "%r2" in "b,l" insns.
339
ad101263
MS		 3402005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
341
342 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
343 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
344 (main): Likewise.
345 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
346 and 4 bit optional masks.
347 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
348 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
349 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
350 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
351 (s390_opformats): Likewise.
352 * s390-opc.txt: Add new instructions for cpu type z9-109.
353
f1fa1093
DA		 3542005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
355
356 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
357
e9f89963
PB		 3582005-07-29 Paul Brook <paul@codesourcery.com>
359
360 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
361
92e90b6e
PB		 3622005-07-29 Paul Brook <paul@codesourcery.com>
363
364 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
365 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
366
fd54057a
DD		 3672005-07-25 DJ Delorie <dj@redhat.com>
368
369 * m32c-asm.c Regenerate.
370 * m32c-dis.c Regenerate.
371
760c0f6a
DD		 3722005-07-20 DJ Delorie <dj@redhat.com>
373
374 * disassemble.c (disassemble_init_for_target): M32C ISAs are
375 enums, so convert them to bit masks, which attributes are.
376
85da3a56
NC		 3772005-07-18 Nick Clifton <nickc@redhat.com>
378
379 * configure.in: Restore alpha ordering to list of arches.
380 * configure: Regenerate.
381 * disassemble.c: Restore alpha ordering to list of arches.
382
3832005-07-18 Nick Clifton <nickc@redhat.com>
384
385 * m32c-asm.c: Regenerate.
386 * m32c-desc.c: Regenerate.
387 * m32c-desc.h: Regenerate.
388 * m32c-dis.c: Regenerate.
389 * m32c-ibld.h: Regenerate.
390 * m32c-opc.c: Regenerate.
391 * m32c-opc.h: Regenerate.
392
22cbf2e7
L		 3932005-07-18 H.J. Lu <hongjiu.lu@intel.com>
394
395 * i386-dis.c (PNI_Fixup): Update comment.
396 (VMX_Fixup): Properly handle the suffix check.
397
0aea0460
DA		 3982005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
399
400 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
401 mfctl disassembly.
402
0f82ff91
AM		 4032005-07-16 Alan Modra <amodra@bigpond.net.au>
404
405 * Makefile.am: Run "make dep-am".
406 (stamp-m32c): Fix cpu dependencies.
407 * Makefile.in: Regenerate.
408 * ip2k-dis.c: Regenerate.
409
90700ea2
L		 4102007-07-15 H.J. Lu <hongjiu.lu@intel.com>
411
412 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
413 (VMX_Fixup): New. Fix up Intel VMX Instructions.
414 (Em): New.
415 (Gm): New.
416 (VM): New.
417 (dis386_twobyte): Updated entries 0x78 and 0x79.
418 (twobyte_has_modrm): Likewise.
419 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
420 (OP_G): Handle m_mode.
421
49f58d10
JB		 4222005-07-14 Jim Blandy <jimb@redhat.com>
423
424 Add support for the Renesas M32C and M16C.
425 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
426 * m32c-desc.h, m32c-opc.h: New.
427 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
428 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
429 m32c-opc.c.
430 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
431 m32c-ibld.lo, m32c-opc.lo.
432 (CLEANFILES): List stamp-m32c.
433 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
434 (CGEN_CPUS): Add m32c.
435 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
436 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
437 (m32c_opc_h): New variable.
438 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
439 (m32c-opc.lo): New rules.
440 * Makefile.in: Regenerated.
441 * configure.in: Add case for bfd_m32c_arch.
442 * configure: Regenerated.
443 * disassemble.c (ARCH_m32c): New.
444 [ARCH_m32c]: #include "m32c-desc.h".
445 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
446 (disassemble_init_for_target) [ARCH_m32c]: Same.
447
448 * cgen-ops.h, cgen-types.h: New files.
449 * Makefile.am (HFILES): List them.
450 * Makefile.in: Regenerated.
3e7d61b2 451
0fd3a477
JW		 4522005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
453
454 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
455 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
456 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
457 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
458 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
459 v850-dis.c: Fix format bugs.
460 * ia64-gen.c (fail, warn): Add format attribute.
461 * or32-opc.c (debug): Likewise.
462
22f8fcbd
NC		 4632005-07-07 Khem Raj <kraj@mvista.com>
464
465 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
466 disassembly pattern.
467
d125c27b
AM		 4682005-07-06 Alan Modra <amodra@bigpond.net.au>
469
470 * Makefile.am (stamp-m32r): Fix path to cpu files.
471 (stamp-m32r, stamp-iq2000): Likewise.
472 * Makefile.in: Regenerate.
473 * m32r-asm.c: Regenerate.
474 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
475 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
476
3ec2b351
NC		 4772005-07-05 Nick Clifton <nickc@redhat.com>
478
479 * iq2000-asm.c: Regenerate.
480 * ms1-asm.c: Regenerate.
481
30123838
JB		 4822005-07-05 Jan Beulich <jbeulich@novell.com>
483
484 * i386-dis.c (SVME_Fixup): New.
485 (grps): Use it for the lidt entry.
486 (PNI_Fixup): Call OP_M rather than OP_E.
487 (INVLPG_Fixup): Likewise.
488
b0eec63e
L		 4892005-07-04 H.J. Lu <hongjiu.lu@intel.com>
490
491 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
492
47b0e7ad
NC		 4932005-07-01 Nick Clifton <nickc@redhat.com>
494
495 * a29k-dis.c: Update to ISO C90 style function declarations and
496 fix formatting.
497 * alpha-opc.c: Likewise.
498 * arc-dis.c: Likewise.
499 * arc-opc.c: Likewise.
500 * avr-dis.c: Likewise.
501 * cgen-asm.in: Likewise.
502 * cgen-dis.in: Likewise.
503 * cgen-ibld.in: Likewise.
504 * cgen-opc.c: Likewise.
505 * cris-dis.c: Likewise.
506 * d10v-dis.c: Likewise.
507 * d30v-dis.c: Likewise.
508 * d30v-opc.c: Likewise.
509 * dis-buf.c: Likewise.
510 * dlx-dis.c: Likewise.
511 * h8300-dis.c: Likewise.
512 * h8500-dis.c: Likewise.
513 * hppa-dis.c: Likewise.
514 * i370-dis.c: Likewise.
515 * i370-opc.c: Likewise.
516 * m10200-dis.c: Likewise.
517 * m10300-dis.c: Likewise.
518 * m68k-dis.c: Likewise.
519 * m88k-dis.c: Likewise.
520 * mips-dis.c: Likewise.
521 * mmix-dis.c: Likewise.
522 * msp430-dis.c: Likewise.
523 * ns32k-dis.c: Likewise.
524 * or32-dis.c: Likewise.
525 * or32-opc.c: Likewise.
526 * pdp11-dis.c: Likewise.
527 * pj-dis.c: Likewise.
528 * s390-dis.c: Likewise.
529 * sh-dis.c: Likewise.
530 * sh64-dis.c: Likewise.
531 * sparc-dis.c: Likewise.
532 * sparc-opc.c: Likewise.
533 * sysdep.h: Likewise.
534 * tic30-dis.c: Likewise.
535 * tic4x-dis.c: Likewise.
536 * tic80-dis.c: Likewise.
537 * v850-dis.c: Likewise.
538 * v850-opc.c: Likewise.
539 * vax-dis.c: Likewise.
540 * w65-dis.c: Likewise.
541 * z8kgen.c: Likewise.
3e7d61b2 542
47b0e7ad
NC		 543 * fr30-*: Regenerate.
544 * frv-*: Regenerate.
545 * ip2k-*: Regenerate.
546 * iq2000-*: Regenerate.
547 * m32r-*: Regenerate.
548 * ms1-*: Regenerate.
549 * openrisc-*: Regenerate.
550 * xstormy16-*: Regenerate.
551
cc16ba8c
BE		 5522005-06-23 Ben Elliston <bje@gnu.org>
553
554 * m68k-dis.c: Use ISC C90.
555 * m68k-opc.c: Formatting fixes.
556
4b185e97
DU		 5572005-06-16 David Ung <davidu@mips.com>
558
3e7d61b2
AM		 559 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
560 instructions to the table; seb/seh/sew/zeb/zeh/zew.
4b185e97 561
ac188222
DB		 5622005-06-15 Dave Brolley <brolley@redhat.com>
563
564 Contribute Morpho ms1 on behalf of Red Hat
3e7d61b2 565 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
ac188222
DB		 566 ms1-opc.h: New files, Morpho ms1 target.
567
568 2004-05-14 Stan Cox <scox@redhat.com>
569
570 * disassemble.c (ARCH_ms1): Define.
571 (disassembler): Handle bfd_arch_ms1
572
573 2004-05-13 Michael Snyder <msnyder@redhat.com>
574
575 * Makefile.am, Makefile.in: Add ms1 target.
576 * configure.in: Ditto.
577
6b5d3a4d
ZW		 5782005-06-08 Zack Weinberg <zack@codesourcery.com>
579
580 * arm-opc.h: Delete; fold contents into ...
581 * arm-dis.c: ... here. Move includes of internal COFF headers
582 next to includes of internal ELF headers.
583 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
584 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
585 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
586 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
587 (iwmmxt_wwnames, iwmmxt_wwssnames):
588 Make const.
589 (regnames): Remove iWMMXt coprocessor register sets.
590 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
591 (get_arm_regnames): Adjust fourth argument to match above changes.
592 (set_iwmmxt_regnames): Delete.
593 (print_insn_arm): Constify 'c'. Use ISO syntax for function
594 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
595 and iwmmxt_cregnames, not set_iwmmxt_regnames.
596 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
597 ISO syntax for function pointer calls.
598
4a5329c6
ZW		 5992005-06-07 Zack Weinberg <zack@codesourcery.com>
600
601 * arm-dis.c: Split up the comments describing the format codes, so
602 that the ARM and 16-bit Thumb opcode tables each have comments
603 preceding them that describe all the codes, and only the codes,
604 valid in those tables. (32-bit Thumb table is already like this.)
605 Reorder the lists in all three comments to match the order in
606 which the codes are implemented.
607 Remove all forward declarations of static functions. Convert all
608 function definitions to ISO C format.
609 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
610 Return nothing.
611 (print_insn_thumb16): Remove unused case 'I'.
612 (print_insn): Update for changed calling convention of subroutines.
613
3d456fa1
JB		 6142005-05-25 Jan Beulich <jbeulich@novell.com>
615
616 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
617 hex (but retain it being displayed as signed). Remove redundant
618 checks. Add handling of displacements for 16-bit addressing in Intel
619 mode.
620
2888cb7a
JB		 6212005-05-25 Jan Beulich <jbeulich@novell.com>
622
623 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
624 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
625 masking of 'rm' in 16-bit memory address handling.
626
1ed8e1e4
AM		 6272005-05-19 Anton Blanchard <anton@samba.org>
628
629 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
630 (print_ppc_disassembler_options): Document it.
631 * ppc-opc.c (SVC_LEV): Define.
632 (LEV): Allow optional operand.
633 (POWER5): Define.
634 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
635 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
636
49cc2e69
KC		 6372005-05-19 Kelley Cook <kcook@gcc.gnu.org>
638
639 * Makefile.in: Regenerate.
640
c19d1205
ZW		 6412005-05-17 Zack Weinberg <zack@codesourcery.com>
642
643 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
644 instructions. Adjust disassembly of some opcodes to match
645 unified syntax.
646 (thumb32_opcodes): New table.
647 (print_insn_thumb): Rename print_insn_thumb16; don't handle
648 two-halfword branches here.
649 (print_insn_thumb32): New function.
650 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
651 and print_insn_thumb32. Be consistent about order of
652 halfwords when printing 32-bit instructions.
653
003519a7
L		 6542005-05-07 H.J. Lu <hongjiu.lu@intel.com>
655
656 PR 843
657 * i386-dis.c (branch_v_mode): New.
658 (indirEv): Use branch_v_mode instead of v_mode.
659 (OP_E): Handle branch_v_mode.
660
920a34a7
L		 6612005-05-07 H.J. Lu <hongjiu.lu@intel.com>
662
663 * d10v-dis.c (dis_2_short): Support 64bit host.
664
5de773c1
NC		 6652005-05-07 Nick Clifton <nickc@redhat.com>
666
667 * po/nl.po: Updated translation.
668
f4321104
NC		 6692005-05-07 Nick Clifton <nickc@redhat.com>
670
671 * Update the address and phone number of the FSF organization in
672 the GPL notices in the following files:
673 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
674 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
675 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
676 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
677 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
678 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
679 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
680 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
681 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
682 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
683 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
684 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
685 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
686 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
687 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
688 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
689 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
690 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
691 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
692 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
693 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
694 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
695 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
696 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
697 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
698 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
699 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
700 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
701 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
702 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
703 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
704 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
705 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
706
10b076a2
JW		 7072005-05-05 James E Wilson <wilson@specifixinc.com>
708
709 * ia64-opc.c: Include sysdep.h before libiberty.h.
710
022716b6
NC		 7112005-05-05 Nick Clifton <nickc@redhat.com>
712
713 * configure.in (ALL_LINGUAS): Add vi.
714 * configure: Regenerate.
715 * po/vi.po: New.
716
db5152b4
JG		 7172005-04-26 Jerome Guitton <guitton@gnat.com>
718
719 * configure.in: Fix the check for basename declaration.
720 * configure: Regenerate.
721
eed0d89a
AM		 7222005-04-19 Alan Modra <amodra@bigpond.net.au>
723
724 * ppc-opc.c (RTO): Define.
725 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
726 entries to suit PPC440.
727
791fe849
MK		 7282005-04-18 Mark Kettenis <kettenis@gnu.org>
729
730 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
731 Add xcrypt-ctr.
732
ffe58f7c
NC		 7332005-04-14 Nick Clifton <nickc@redhat.com>
734
735 * po/fi.po: New translation: Finnish.
736 * configure.in (ALL_LINGUAS): Add fi.
737 * configure: Regenerate.
738
9e9b66a9
AM		 7392005-04-14 Alan Modra <amodra@bigpond.net.au>
740
741 * Makefile.am (NO_WERROR): Define.
742 * configure.in: Invoke AM_BINUTILS_WARNINGS.
743 * Makefile.in: Regenerate.
744 * aclocal.m4: Regenerate.
745 * configure: Regenerate.
746
9494d739
NC		 7472005-04-04 Nick Clifton <nickc@redhat.com>
748
749 * fr30-asm.c: Regenerate.
750 * frv-asm.c: Regenerate.
751 * iq2000-asm.c: Regenerate.
752 * m32r-asm.c: Regenerate.
753 * openrisc-asm.c: Regenerate.
754
6128c599
JB		 7552005-04-01 Jan Beulich <jbeulich@novell.com>
756
757 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
758 visible operands in Intel mode. The first operand of monitor is
759 %rax in 64-bit mode.
760
373ff435
JB		 7612005-04-01 Jan Beulich <jbeulich@novell.com>
762
763 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
764 easier future additions.
765
4bd60896
JG		 7662005-03-31 Jerome Guitton <guitton@gnat.com>
767
768 * configure.in: Check for basename.
769 * configure: Regenerate.
770 * config.in: Ditto.
771
4cc91dba
L		 7722005-03-29 H.J. Lu <hongjiu.lu@intel.com>
773
774 * i386-dis.c (SEG_Fixup): New.
775 (Sv): New.
776 (dis386): Use "Sv" for 0x8c and 0x8e.
777
ec72cfe5
NC		 7782005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
779 Nick Clifton <nickc@redhat.com>
c19d1205 780
ec72cfe5
NC		 781 * vax-dis.c: (entry_addr): New varible: An array of user supplied
782 function entry mask addresses.
783 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 784 elements in entry_addr.
ec72cfe5
NC		 785 (entry_addr_total_slots): New variable: The total number of
786 elements in entry_addr.
787 (parse_disassembler_options): New function. Fills in the entry_addr
788 array.
789 (free_entry_array): New function. Release the memory used by the
790 entry addr array. Suppressed because there is no way to call it.
791 (is_function_entry): Check if a given address is a function's
792 start address by looking at supplied entry mask addresses and
793 symbol information, if available.
794 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
795
85064c79
L		 7962005-03-23 H.J. Lu <hongjiu.lu@intel.com>
797
798 * cris-dis.c (print_with_operands): Use ~31L for long instead
799 of ~31.
800
de7141c7
L		 8012005-03-20 H.J. Lu <hongjiu.lu@intel.com>
802
803 * mmix-opc.c (O): Revert the last change.
804 (Z): Likewise.
805
e493ab45
L		 8062005-03-19 H.J. Lu <hongjiu.lu@intel.com>
807
808 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
809 (Z): Likewise.
810
d8d7c459
HPN		 8112005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
812
813 * mmix-opc.c (O, Z): Force expression as unsigned long.
814
ebdb0383
NC		 8152005-03-18 Nick Clifton <nickc@redhat.com>
816
817 * ip2k-asm.c: Regenerate.
818 * op/opcodes.pot: Regenerate.
819
1ad12f97
NC		 8202005-03-16 Nick Clifton <nickc@redhat.com>
821 Ben Elliston <bje@au.ibm.com>
822
569acd2c 823 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 824 compiler command line. Enabled by default. Disable via
569acd2c 825 --disable-werror.
1ad12f97
NC		 826 * configure: Regenerate.
827
4eb30afc
AM		 8282005-03-16 Alan Modra <amodra@bigpond.net.au>
829
830 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
831 BOOKE.
832
ea8409f7
AM		 8332005-03-15 Alan Modra <amodra@bigpond.net.au>
834
729ae8d2
AM		 835 * po/es.po: Commit new Spanish translation.
836
ea8409f7
AM		 837 * po/fr.po: Commit new French translation.
838
4f495e61
NC		 8392005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
840
841 * vax-dis.c: Fix spelling error
842 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
843 of just "Entry mask: < r1 ... >"
844
0a003adc
ZW		 8452005-03-12 Zack Weinberg <zack@codesourcery.com>
846
847 * arm-dis.c (arm_opcodes): Document %E and %V.
848 Add entries for v6T2 ARM instructions:
849 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
850 (print_insn_arm): Add support for %E and %V.
885fc257 851 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 852
da99ee72
AM		 8532005-03-10 Jeff Baker <jbaker@qnx.com>
854 Alan Modra <amodra@bigpond.net.au>
855
856 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
857 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
858 (SPRG_MASK): Delete.
859 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 860 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 861 mfsprg4..7 after msprg and consolidate.
862
220abb21
AM		 8632005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
864
865 * vax-dis.c (entry_mask_bit): New array.
866 (print_insn_vax): Decode function entry mask.
867
0e06657a
AH		 8682005-03-07 Aldy Hernandez <aldyh@redhat.com>
869
870 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
871
06647dfd
AM		 8722005-03-05 Alan Modra <amodra@bigpond.net.au>
873
874 * po/opcodes.pot: Regenerate.
875
82b829a7
RR		 8762005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
877
220abb21 878 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 879 (dsmOneArcInst): Use the enum values for the decoding class.
880 Remove redundant case in the switch for decodingClass value 11.
82b829a7 881
c4a530c5
JB		 8822005-03-02 Jan Beulich <jbeulich@novell.com>
883
884 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
885 accesses.
886 (OP_C): Consider lock prefix in non-64-bit modes.
887
47d8304e
AM		 8882005-02-24 Alan Modra <amodra@bigpond.net.au>
889
890 * cris-dis.c (format_hex): Remove ineffective warning fix.
891 * crx-dis.c (make_instruction): Warning fix.
892 * frv-asm.c: Regenerate.
893
ec36c4a4
NC		 8942005-02-23 Nick Clifton <nickc@redhat.com>
895
33b71eeb
NC		 896 * cgen-dis.in: Use bfd_byte for buffers that are passed to
897 read_memory.
06647dfd 898
33b71eeb 899 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 900
ec36c4a4
NC		 901 * crx-dis.c (make_instruction): Move argument structure into inner
902 scope and ensure that all of its fields are initialised before
903 they are used.
904
33b71eeb
NC		 905 * fr30-asm.c: Regenerate.
906 * fr30-dis.c: Regenerate.
907 * frv-asm.c: Regenerate.
908 * frv-dis.c: Regenerate.
909 * ip2k-asm.c: Regenerate.
910 * ip2k-dis.c: Regenerate.
911 * iq2000-asm.c: Regenerate.
912 * iq2000-dis.c: Regenerate.
913 * m32r-asm.c: Regenerate.
914 * m32r-dis.c: Regenerate.
915 * openrisc-asm.c: Regenerate.
916 * openrisc-dis.c: Regenerate.
917 * xstormy16-asm.c: Regenerate.
918 * xstormy16-dis.c: Regenerate.
919
53c9ebc5
AM		 9202005-02-22 Alan Modra <amodra@bigpond.net.au>
921
922 * arc-ext.c: Warning fixes.
923 * arc-ext.h: Likewise.
924 * cgen-opc.c: Likewise.
925 * ia64-gen.c: Likewise.
926 * maxq-dis.c: Likewise.
927 * ns32k-dis.c: Likewise.
928 * w65-dis.c: Likewise.
929 * ia64-asmtab.c: Regenerate.
930
610ad19b
AM		 9312005-02-22 Alan Modra <amodra@bigpond.net.au>
932
933 * fr30-desc.c: Regenerate.
934 * fr30-desc.h: Regenerate.
935 * fr30-opc.c: Regenerate.
936 * fr30-opc.h: Regenerate.
937 * frv-desc.c: Regenerate.
938 * frv-desc.h: Regenerate.
939 * frv-opc.c: Regenerate.
940 * frv-opc.h: Regenerate.
941 * ip2k-desc.c: Regenerate.
942 * ip2k-desc.h: Regenerate.
943 * ip2k-opc.c: Regenerate.
944 * ip2k-opc.h: Regenerate.
945 * iq2000-desc.c: Regenerate.
946 * iq2000-desc.h: Regenerate.
947 * iq2000-opc.c: Regenerate.
948 * iq2000-opc.h: Regenerate.
949 * m32r-desc.c: Regenerate.
950 * m32r-desc.h: Regenerate.
951 * m32r-opc.c: Regenerate.
952 * m32r-opc.h: Regenerate.
953 * m32r-opinst.c: Regenerate.
954 * openrisc-desc.c: Regenerate.
955 * openrisc-desc.h: Regenerate.
956 * openrisc-opc.c: Regenerate.
957 * openrisc-opc.h: Regenerate.
958 * xstormy16-desc.c: Regenerate.
959 * xstormy16-desc.h: Regenerate.
960 * xstormy16-opc.c: Regenerate.
961 * xstormy16-opc.h: Regenerate.
962
db9db6f2
AM		 9632005-02-21 Alan Modra <amodra@bigpond.net.au>
964
965 * Makefile.am: Run "make dep-am"
966 * Makefile.in: Regenerate.
967
bf143b25
NC		 9682005-02-15 Nick Clifton <nickc@redhat.com>
969
970 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
971 compile time warnings.
972 (print_keyword): Likewise.
973 (default_print_insn): Likewise.
974
975 * fr30-desc.c: Regenerated.
976 * fr30-desc.h: Regenerated.
977 * fr30-dis.c: Regenerated.
978 * fr30-opc.c: Regenerated.
979 * fr30-opc.h: Regenerated.
980 * frv-desc.c: Regenerated.
981 * frv-dis.c: Regenerated.
982 * frv-opc.c: Regenerated.
983 * ip2k-asm.c: Regenerated.
984 * ip2k-desc.c: Regenerated.
985 * ip2k-desc.h: Regenerated.
986 * ip2k-dis.c: Regenerated.
987 * ip2k-opc.c: Regenerated.
988 * ip2k-opc.h: Regenerated.
989 * iq2000-desc.c: Regenerated.
990 * iq2000-dis.c: Regenerated.
991 * iq2000-opc.c: Regenerated.
992 * m32r-asm.c: Regenerated.
993 * m32r-desc.c: Regenerated.
994 * m32r-desc.h: Regenerated.
995 * m32r-dis.c: Regenerated.
996 * m32r-opc.c: Regenerated.
997 * m32r-opc.h: Regenerated.
998 * m32r-opinst.c: Regenerated.
999 * openrisc-desc.c: Regenerated.
1000 * openrisc-desc.h: Regenerated.
1001 * openrisc-dis.c: Regenerated.
1002 * openrisc-opc.c: Regenerated.
1003 * openrisc-opc.h: Regenerated.
1004 * xstormy16-desc.c: Regenerated.
1005 * xstormy16-desc.h: Regenerated.
1006 * xstormy16-dis.c: Regenerated.
1007 * xstormy16-opc.c: Regenerated.
1008 * xstormy16-opc.h: Regenerated.
1009
d6098898
L		 10102005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1011
1012 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1013 address.
1014
5a84f3e0
NC		 10152005-02-11 Nick Clifton <nickc@redhat.com>
1016
bc18c937
NC		 1017 * iq2000-asm.c: Regenerate.
1018
5a84f3e0
NC		 1019 * frv-dis.c: Regenerate.
1020
0a40490e
JB		 10212005-02-07 Jim Blandy <jimb@redhat.com>
1022
1023 * Makefile.am (CGEN): Load guile.scm before calling the main
1024 application script.
1025 * Makefile.in: Regenerated.
1026 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1027 Simply pass the cgen-opc.scm path to ${cgen} as its first
1028 argument; ${cgen} itself now contains the '-s', or whatever is
1029 appropriate for the Scheme being used.
1030
c46f8c51
AC		 10312005-01-31 Andrew Cagney <cagney@gnu.org>
1032
1033 * configure: Regenerate to track ../gettext.m4.
1034
60b9a617
JB		 10352005-01-31 Jan Beulich <jbeulich@novell.com>
1036
1037 * ia64-gen.c (NELEMS): Define.
1038 (shrink): Generate alias with missing second predicate register when
1039 opcode has two outputs and these are both predicates.
1040 * ia64-opc-i.c (FULL17): Define.
1041 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1042 here to generate output template.
1043 (TBITCM, TNATCM): Undefine after use.
1044 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1045 first input. Add ld16 aliases without ar.csd as second output. Add
1046 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1047 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1048 ar.ccv as third/fourth inputs. Consolidate through...
1049 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1050 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1051 * ia64-asmtab.c: Regenerate.
1052
a53bf506
AC		 10532005-01-27 Andrew Cagney <cagney@gnu.org>
1054
1055 * configure: Regenerate to track ../gettext.m4 change.
1056
90219bd0
AO		 10572005-01-25 Alexandre Oliva <aoliva@redhat.com>
1058
1059 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1060 * frv-asm.c: Rebuilt.
1061 * frv-desc.c: Rebuilt.
1062 * frv-desc.h: Rebuilt.
1063 * frv-dis.c: Rebuilt.
1064 * frv-ibld.c: Rebuilt.
1065 * frv-opc.c: Rebuilt.
1066 * frv-opc.h: Rebuilt.
1067
45181ed1
AC		 10682005-01-24 Andrew Cagney <cagney@gnu.org>
1069
1070 * configure: Regenerate, ../gettext.m4 was updated.
1071
9e836e3d
FF		 10722005-01-21 Fred Fish <fnf@specifixinc.com>
1073
1074 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1075 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1076 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1077 * mips-dis.c: Ditto.
1078
5e8cb021
AM		 10792005-01-20 Alan Modra <amodra@bigpond.net.au>
1080
1081 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1082
986e18a5
FF		 10832005-01-19 Fred Fish <fnf@specifixinc.com>
1084
1085 * mips-dis.c (no_aliases): New disassembly option flag.
1086 (set_default_mips_dis_options): Init no_aliases to zero.
1087 (parse_mips_dis_option): Handle no-aliases option.
1088 (print_insn_mips): Ignore table entries that are aliases
1089 if no_aliases is set.
1090 (print_insn_mips16): Ditto.
1091 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1092 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1093 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1094 * mips16-opc.c (mips16_opcodes): Ditto.
1095
e38bc3b5
NC		 10962005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1097
1098 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1099 (inheritance diagram): Add missing edge.
1100 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1101 easier for the testsuite.
1102 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1103 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 1104 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 1105 arch_sh2a_or_sh4_up child.
1106 (sh_table): Do renaming as above.
1107 Correct comment for ldc.l for gas testsuite to read.
1108 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1109 Correct comments for movy.w and movy.l for gas testsuite to read.
1110 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1111
9df48ba9
L		 11122005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1113
1114 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1115
2033b4b9
L		 11162005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1117
1118 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1119
0bcb06d2
AS		 11202005-01-10 Andreas Schwab <schwab@suse.de>
1121
1122 * disassemble.c (disassemble_init_for_target) <case
1123 bfd_arch_ia64>: Set skip_zeroes to 16.
1124 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1125
47add74d
TL		 11262004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1127
1128 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1129
246f4c05
SS		 11302004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1131
1132 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1133 memory references. Convert avr_operand() to C90 formatting.
1134
0e1200e5
TL		 11352004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1136
1137 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1138
89a649f7
TL		 11392004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1140
1141 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1142 (no_op_insn): Initialize array with instructions that have no
1143 operands.
1144 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1145
6255809c
RE		 11462004-11-29 Richard Earnshaw <rearnsha@arm.com>
1147
1148 * arm-dis.c: Correct top-level comment.
1149
2fbad815
RE		 11502004-11-27 Richard Earnshaw <rearnsha@arm.com>
1151
1152 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1153 architecuture defining the insn.
1154 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 1155 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1156 field.
2fbad815
RE		 1157 Also include opcode/arm.h.
1158 * Makefile.am (arm-dis.lo): Update dependency list.
1159 * Makefile.in: Regenerate.
1160
d81acc42
NC		 11612004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1162
1163 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1164 reflect the change to the short immediate syntax.
1165
ca4f2377
AM		 11662004-11-19 Alan Modra <amodra@bigpond.net.au>
1167
5da8bf1b
AM		 1168 * or32-opc.c (debug): Warning fix.
1169 * po/POTFILES.in: Regenerate.
1170
ca4f2377
AM		 1171 * maxq-dis.c: Formatting.
1172 (print_insn): Warning fix.
1173
b7693d02
DJ		 11742004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1175
1176 * arm-dis.c (WORD_ADDRESS): Define.
1177 (print_insn): Use it. Correct big-endian end-of-section handling.
1178
300dac7e
NC		 11792004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1180 Vineet Sharma <vineets@noida.hcltech.com>
1181
1182 * maxq-dis.c: New file.
1183 * disassemble.c (ARCH_maxq): Define.
610ad19b 1184 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 1185 instructions..
1186 * configure.in: Add case for bfd_maxq_arch.
1187 * configure: Regenerate.
1188 * Makefile.am: Add support for maxq-dis.c
1189 * Makefile.in: Regenerate.
1190 * aclocal.m4: Regenerate.
1191
42048ee7
TL		 11922004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1193
1194 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1195 mode.
1196 * crx-dis.c: Likewise.
1197
bd21e58e
HPN		 11982004-11-04 Hans-Peter Nilsson <hp@axis.com>
1199
1200 Generally, handle CRISv32.
1201 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1202 (struct cris_disasm_data): New type.
1203 (format_reg, format_hex, cris_constraint, print_flags)
1204 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1205 callers changed.
1206 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1207 (print_insn_crisv32_without_register_prefix)
1208 (print_insn_crisv10_v32_with_register_prefix)
1209 (print_insn_crisv10_v32_without_register_prefix)
1210 (cris_parse_disassembler_options): New functions.
1211 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1212 parameter. All callers changed.
1213 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1214 failure.
1215 (cris_constraint) <case 'Y', 'U'>: New cases.
1216 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1217 for constraint 'n'.
1218 (print_with_operands) <case 'Y'>: New case.
1219 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1220 <case 'N', 'Y', 'Q'>: New cases.
1221 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1222 (print_insn_cris_with_register_prefix)
1223 (print_insn_cris_without_register_prefix): Call
1224 cris_parse_disassembler_options.
1225 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1226 for CRISv32 and the size of immediate operands. New v32-only
1227 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1228 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1229 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1230 Change brp to be v3..v10.
1231 (cris_support_regs): New vector.
1232 (cris_opcodes): Update head comment. New format characters '[',
1233 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1234 Add new opcodes for v32 and adjust existing opcodes to accommodate
1235 differences to earlier variants.
1236 (cris_cond15s): New vector.
1237
9306ca4a
JB		 12382004-11-04 Jan Beulich <jbeulich@novell.com>
1239
1240 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1241 (indirEb): Remove.
1242 (Mp): Use f_mode rather than none at all.
1243 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1244 replaces what previously was x_mode; x_mode now means 128-bit SSE
1245 operands.
1246 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1247 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1248 pinsrw's second operand is Edqw.
1249 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1250 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1251 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1252 mode when an operand size override is present or always suffixing.
1253 More instructions will need to be added to this group.
1254 (putop): Handle new macro chars 'C' (short/long suffix selector),
1255 'I' (Intel mode override for following macro char), and 'J' (for
1256 adding the 'l' prefix to far branches in AT&T mode). When an
1257 alternative was specified in the template, honor macro character when
1258 specified for Intel mode.
1259 (OP_E): Handle new *_mode values. Correct pointer specifications for
1260 memory operands. Consolidate output of index register.
1261 (OP_G): Handle new *_mode values.
1262 (OP_I): Handle const_1_mode.
1263 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1264 respective opcode prefix bits have been consumed.
1265 (OP_EM, OP_EX): Provide some default handling for generating pointer
1266 specifications.
1267
f39c96a9
TL		 12682004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1269
1270 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1271 COP_INST macro.
1272
812337be
TL		 12732004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1274
1275 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1276 (getregliststring): Support HI/LO and user registers.
610ad19b 1277 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 1278 rearrangement done in CRX opcode header file.
1279 (crx_regtab): Likewise.
1280 (crx_optab): Likewise.
610ad19b 1281 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 1282 formats.
1283 support new Co-Processor instruction 'cpi'.
1284
4030fa5a
NC		 12852004-10-27 Nick Clifton <nickc@redhat.com>
1286
1287 * opcodes/iq2000-asm.c: Regenerate.
1288 * opcodes/iq2000-desc.c: Regenerate.
1289 * opcodes/iq2000-desc.h: Regenerate.
1290 * opcodes/iq2000-dis.c: Regenerate.
1291 * opcodes/iq2000-ibld.c: Regenerate.
1292 * opcodes/iq2000-opc.c: Regenerate.
1293 * opcodes/iq2000-opc.h: Regenerate.
1294
fc3d45e8
TL		 12952004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1296
1297 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1298 us4, us5 (respectively).
1299 Remove unsupported 'popa' instruction.
1300 Reverse operands order in store co-processor instructions.
1301
3c55da70
AM		 13022004-10-15 Alan Modra <amodra@bigpond.net.au>
1303
1304 * Makefile.am: Run "make dep-am"
1305 * Makefile.in: Regenerate.
1306
7fa3d080
BW		 13072004-10-12 Bob Wilson <bob.wilson@acm.org>
1308
1309 * xtensa-dis.c: Use ISO C90 formatting.
1310
e612bb4d
AM		 13112004-10-09 Alan Modra <amodra@bigpond.net.au>
1312
1313 * ppc-opc.c: Revert 2004-09-09 change.
1314
43cd72b9
BW		 13152004-10-07 Bob Wilson <bob.wilson@acm.org>
1316
1317 * xtensa-dis.c (state_names): Delete.
1318 (fetch_data): Use xtensa_isa_maxlength.
1319 (print_xtensa_operand): Replace operand parameter with opcode/operand
1320 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1321 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1322 instruction bundles. Use xmalloc instead of malloc.
1323
bbac1f2a
NC		 13242004-10-07 David Gibson <david@gibson.dropbear.id.au>
1325
1326 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1327 initializers.
1328
48c9f030
NC		 13292004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1330
1331 * crx-opc.c (crx_instruction): Support Co-processor insns.
1332 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1333 (getregliststring): Change function to use the above enum.
1334 (print_arg): Handle CO-Processor insns.
1335 (crx_cinvs): Add 'b' option to invalidate the branch-target
1336 cache.
1337
12c64a4e
AH		 13382004-10-06 Aldy Hernandez <aldyh@redhat.com>
1339
1340 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1341 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1342 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1343 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1344 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1345
14127cc4
NC		 13462004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1347
1348 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1349 rather than add it.
1350
0dd132b6
NC		 13512004-09-30 Paul Brook <paul@codesourcery.com>
1352
1353 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1354 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1355
3f85e526
L		 13562004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1357
1358 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1359 (CONFIG_STATUS_DEPENDENCIES): New.
1360 (Makefile): Removed.
1361 (config.status): Likewise.
1362 * Makefile.in: Regenerated.
1363
8ae85421
AM		 13642004-09-17 Alan Modra <amodra@bigpond.net.au>
1365
1366 * Makefile.am: Run "make dep-am".
1367 * Makefile.in: Regenerate.
1368 * aclocal.m4: Regenerate.
1369 * configure: Regenerate.
1370 * po/POTFILES.in: Regenerate.
1371 * po/opcodes.pot: Regenerate.
1372
24443139
AS		 13732004-09-11 Andreas Schwab <schwab@suse.de>
1374
1375 * configure: Rebuild.
1376
2a309db0
AM		 13772004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1378
1379 * ppc-opc.c (L): Make this field not optional.
1380
42851540
NC		 13812004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1382
1383 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1384 Fix parameter to 'm[t|f]csr' insns.
1385
979273e3
NN		 13862004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1387
1388 * configure.in: Autoupdate to autoconf 2.59.
1389 * aclocal.m4: Rebuild with aclocal 1.4p6.
1390 * configure: Rebuild with autoconf 2.59.
1391 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1392 bfd changes for autoconf 2.59 on the way).
1393 * config.in: Rebuild with autoheader 2.59.
1394
ac28a1cb
RS		 13952004-08-27 Richard Sandiford <rsandifo@redhat.com>
1396
1397 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1398
30d1c836
ML		 13992004-07-30 Michal Ludvig <mludvig@suse.cz>
1400
1401 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1402 (GRPPADLCK2): New define.
1403 (twobyte_has_modrm): True for 0xA6.
1404 (grps): GRPPADLCK2 for opcode 0xA6.
1405
0b0ac059
AO		 14062004-07-29 Alexandre Oliva <aoliva@redhat.com>
1407
1408 Introduce SH2a support.
1409 * sh-opc.h (arch_sh2a_base): Renumber.
1410 (arch_sh2a_nofpu_base): Remove.
1411 (arch_sh_base_mask): Adjust.
1412 (arch_opann_mask): New.
1413 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1414 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1415 (sh_table): Adjust whitespace.
1416 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1417 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1418 instruction list throughout.
1419 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1420 of arch_sh2a in instruction list throughout.
1421 (arch_sh2e_up): Accomodate above changes.
1422 (arch_sh2_up): Ditto.
1423 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1424 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1425 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1426 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1427 * sh-opc.h (arch_sh2a_nofpu): New.
1428 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1429 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1430 instruction.
1431 2004-01-20 DJ Delorie <dj@redhat.com>
1432 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1433 2003-12-29 DJ Delorie <dj@redhat.com>
1434 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1435 sh_opcode_info, sh_table): Add sh2a support.
1436 (arch_op32): New, to tag 32-bit opcodes.
1437 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1438 2003-12-02 Michael Snyder <msnyder@redhat.com>
1439 * sh-opc.h (arch_sh2a): Add.
1440 * sh-dis.c (arch_sh2a): Handle.
1441 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1442
670ec21d
NC		 14432004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1444
1445 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1446
ed049af3
NC		 14472004-07-22 Nick Clifton <nickc@redhat.com>
1448
1449 PR/280
1450 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1451 insns - this is done by objdump itself.
1452 * h8500-dis.c (print_insn_h8500): Likewise.
1453
20f0a1fc
NC		 14542004-07-21 Jan Beulich <jbeulich@novell.com>
1455
1456 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1457 regardless of address size prefix in effect.
1458 (ptr_reg): Size or address registers does not depend on rex64, but
1459 on the presence of an address size override.
1460 (OP_MMX): Use rex.x only for xmm registers.
1461 (OP_EM): Use rex.z only for xmm registers.
1462
6f14957b
MR		 14632004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1464
1465 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1466 move/branch operations to the bottom so that VR5400 multimedia
1467 instructions take precedence in disassembly.
1468
1586d91e
MR		 14692004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1470
1471 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1472 ISA-specific "break" encoding.
1473
982de27a
NC		 14742004-07-13 Elvis Chiang <elvisfb@gmail.com>
1475
1476 * arm-opc.h: Fix typo in comment.
1477
4300ab10
AS		 14782004-07-11 Andreas Schwab <schwab@suse.de>
1479
1480 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1481
8577e690
AS		 14822004-07-09 Andreas Schwab <schwab@suse.de>
1483
1484 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1485
1fe1f39c
NC		 14862004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1487
1488 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1489 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1490 (crx-dis.lo): New target.
1491 (crx-opc.lo): Likewise.
1492 * Makefile.in: Regenerate.
1493 * configure.in: Handle bfd_crx_arch.
1494 * configure: Regenerate.
1495 * crx-dis.c: New file.
1496 * crx-opc.c: New file.
1497 * disassemble.c (ARCH_crx): Define.
1498 (disassembler): Handle ARCH_crx.
1499
7a33b495
JW		 15002004-06-29 James E Wilson <wilson@specifixinc.com>
1501
1502 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1503 * ia64-asmtab.c: Regnerate.
1504
98e69875
AM		 15052004-06-28 Alan Modra <amodra@bigpond.net.au>
1506
1507 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1508 (extract_fxm): Don't test dialect.
1509 (XFXFXM_MASK): Include the power4 bit.
1510 (XFXM): Add p4 param.
1511 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1512
a53b85e2
AO		 15132004-06-27 Alexandre Oliva <aoliva@redhat.com>
1514
1515 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1516 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1517
d0618d1c
AM		 15182004-06-26 Alan Modra <amodra@bigpond.net.au>
1519
1520 * ppc-opc.c (BH, XLBH_MASK): Define.
1521 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1522
1d9f512f
AM		 15232004-06-24 Alan Modra <amodra@bigpond.net.au>
1524
1525 * i386-dis.c (x_mode): Comment.
1526 (two_source_ops): File scope.
1527 (float_mem): Correct fisttpll and fistpll.
1528 (float_mem_mode): New table.
1529 (dofloat): Use it.
1530 (OP_E): Correct intel mode PTR output.
1531 (ptr_reg): Use open_char and close_char.
1532 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1533 operands. Set two_source_ops.
1534
52886d70
AM		 15352004-06-15 Alan Modra <amodra@bigpond.net.au>
1536
1537 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1538 instead of _raw_size.
1539
bad9ceea
JJ		 15402004-06-08 Jakub Jelinek <jakub@redhat.com>
1541
1542 * ia64-gen.c (in_iclass): Handle more postinc st
1543 and ld variants.
1544 * ia64-asmtab.c: Rebuilt.
1545
0451f5df
MS		 15462004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1547
1548 * s390-opc.txt: Correct architecture mask for some opcodes.
1549 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1550 in the esa mode as well.
1551
f6f9408f
JR		 15522004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1553
1554 * sh-dis.c (target_arch): Make unsigned.
1555 (print_insn_sh): Replace (most of) switch with a call to
1556 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1557 * sh-opc.h: Redefine architecture flags values.
1558 Add sh3-nommu architecture.
1559 Reorganise <arch>_up macros so they make more visual sense.
1560 (SH_MERGE_ARCH_SET): Define new macro.
1561 (SH_VALID_BASE_ARCH_SET): Likewise.
1562 (SH_VALID_MMU_ARCH_SET): Likewise.
1563 (SH_VALID_CO_ARCH_SET): Likewise.
1564 (SH_VALID_ARCH_SET): Likewise.
1565 (SH_MERGE_ARCH_SET_VALID): Likewise.
1566 (SH_ARCH_SET_HAS_FPU): Likewise.
1567 (SH_ARCH_SET_HAS_DSP): Likewise.
1568 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1569 (sh_get_arch_from_bfd_mach): Add prototype.
1570 (sh_get_arch_up_from_bfd_mach): Likewise.
1571 (sh_get_bfd_mach_from_arch_set): Likewise.
1572 (sh_merge_bfd_arc): Likewise.
1573
be8c092b
NC		 15742004-05-24 Peter Barada <peter@the-baradas.com>
1575
1576 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1577 into new match_insn_m68k function. Loop over canidate
1578 matches and select first that completely matches.
be8c092b
NC		 1579 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1580 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1581 to verify addressing for MAC/EMAC.
be8c092b
NC		 1582 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1583 reigster halves since 'fpu' and 'spl' look misleading.
1584 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1585 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1586 first, tighten up match masks.
1587 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1588 'size' from special case code in print_insn_m68k to
1589 determine decode size of insns.
1590
a30e9cc4
AM		 15912004-05-19 Alan Modra <amodra@bigpond.net.au>
1592
1593 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1594 well as when -mpower4.
1595
9598fbe5
NC		 15962004-05-13 Nick Clifton <nickc@redhat.com>
1597
1598 * po/fr.po: Updated French translation.
1599
6b6e92f4
NC		 16002004-05-05 Peter Barada <peter@the-baradas.com>
1601
1602 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1603 variants in arch_mask. Only set m68881/68851 for 68k chips.
1604 * m68k-op.c: Switch from ColdFire chips to core variants.
1605
a404d431
AM		 16062004-05-05 Alan Modra <amodra@bigpond.net.au>
1607
a30e9cc4 1608 PR 147.
a404d431
AM		 1609 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1610
f3806e43
BE		 16112004-04-29 Ben Elliston <bje@au.ibm.com>
1612
520ceea4
BE		 1613 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1614 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1615
1f1799d5
KK		 16162004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1617
1618 * sh-dis.c (print_insn_sh): Print the value in constant pool
1619 as a symbol if it looks like a symbol.
1620
fd99574b
NC		 16212004-04-22 Peter Barada <peter@the-baradas.com>
1622
1623 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1624 appropriate ColdFire architectures.
1625 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1626 mask addressing.
1627 Add EMAC instructions, fix MAC instructions. Remove
1628 macmw/macml/msacmw/msacml instructions since mask addressing now
1629 supported.
1630
b4781d44
JJ		 16312004-04-20 Jakub Jelinek <jakub@redhat.com>
1632
1633 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1634 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1635 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1636 macro. Adjust all users.
1637
91809fda 16382004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1639
91809fda
NC		 1640 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1641 separately.
1642
f4453dfa
NC		 16432004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1644
1645 * m32r-asm.c: Regenerate.
1646
9b0de91a
SS		 16472004-03-29 Stan Shebs <shebs@apple.com>
1648
1649 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1650 used.
1651
e20c0b3d
AM		 16522004-03-19 Alan Modra <amodra@bigpond.net.au>
1653
1654 * aclocal.m4: Regenerate.
1655 * config.in: Regenerate.
1656 * configure: Regenerate.
1657 * po/POTFILES.in: Regenerate.
1658 * po/opcodes.pot: Regenerate.
1659
fdd12ef3
AM		 16602004-03-16 Alan Modra <amodra@bigpond.net.au>
1661
1662 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1663 PPC_OPERANDS_GPR_0.
1664 * ppc-opc.c (RA0): Define.
1665 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1666 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1667 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1668
2dc111b3 16692004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1670
1671 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1672
7bfeee7b
AM		 16732004-03-15 Alan Modra <amodra@bigpond.net.au>
1674
1675 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1676
7ffdda93
ML		 16772004-03-12 Michal Ludvig <mludvig@suse.cz>
1678
1679 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1680 (grps): Delete GRPPLOCK entry.
7ffdda93 1681
cc0ec051
AM		 16822004-03-12 Alan Modra <amodra@bigpond.net.au>
1683
1684 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1685 (M, Mp): Use OP_M.
1686 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1687 (GRPPADLCK): Define.
1688 (dis386): Use NOP_Fixup on "nop".
1689 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1690 (twobyte_has_modrm): Set for 0xa7.
1691 (padlock_table): Delete. Move to..
1692 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1693 and clflush.
1694 (print_insn): Revert PADLOCK_SPECIAL code.
1695 (OP_E): Delete sfence, lfence, mfence checks.
1696
4fd61dcb
JJ		 16972004-03-12 Jakub Jelinek <jakub@redhat.com>
1698
1699 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1700 (INVLPG_Fixup): New function.
1701 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1702
0f10071e
ML		 17032004-03-12 Michal Ludvig <mludvig@suse.cz>
1704
1705 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1706 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1707 (padlock_table): New struct with PadLock instructions.
1708 (print_insn): Handle PADLOCK_SPECIAL.
1709
c02908d2
AM		 17102004-03-12 Alan Modra <amodra@bigpond.net.au>
1711
1712 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1713 (OP_E): Twiddle clflush to sfence here.
1714
d5bb7600
NC		 17152004-03-08 Nick Clifton <nickc@redhat.com>
1716
1717 * po/de.po: Updated German translation.
1718
ae51a426
JR		 17192003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1720
1721 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1722 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1723 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1724 accordingly.
1725
676a64f4
RS		 17262004-03-01 Richard Sandiford <rsandifo@redhat.com>
1727
1728 * frv-asm.c: Regenerate.
1729 * frv-desc.c: Regenerate.
1730 * frv-desc.h: Regenerate.
1731 * frv-dis.c: Regenerate.
1732 * frv-ibld.c: Regenerate.
1733 * frv-opc.c: Regenerate.
1734 * frv-opc.h: Regenerate.
1735
c7a48b9a
RS		 17362004-03-01 Richard Sandiford <rsandifo@redhat.com>
1737
1738 * frv-desc.c, frv-opc.c: Regenerate.
1739
8ae0baa2
RS		 17402004-03-01 Richard Sandiford <rsandifo@redhat.com>
1741
1742 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1743
ce11586c
JR		 17442004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1745
1746 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1747 Also correct mistake in the comment.
1748
6a5709a5
JR		 17492004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1750
1751 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1752 ensure that double registers have even numbers.
1753 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1754 that reserved instruction 0xfffd does not decode the same
1755 as 0xfdfd (ftrv).
1756 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1757 REG_N refers to a double register.
1758 Add REG_N_B01 nibble type and use it instead of REG_NM
1759 in ftrv.
1760 Adjust the bit patterns in a few comments.
1761
e5d2b64f 17622004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1763
1764 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1765
1f04b05f
AH		 17662004-02-20 Aldy Hernandez <aldyh@redhat.com>
1767
1768 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1769
2f3b8700
AH		 17702004-02-20 Aldy Hernandez <aldyh@redhat.com>
1771
1772 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1773
f0b26da6 17742004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1775
1776 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1777 mtivor32, mtivor33, mtivor34.
f0b26da6 1778
23d59c56 17792004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1780
1781 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1782
34920d91
NC		 17832004-02-10 Petko Manolov <petkan@nucleusys.com>
1784
1785 * arm-opc.h Maverick accumulator register opcode fixes.
1786
44d86481
BE		 17872004-02-13 Ben Elliston <bje@wasabisystems.com>
1788
1789 * m32r-dis.c: Regenerate.
1790
17707c23
MS		 17912004-01-27 Michael Snyder <msnyder@redhat.com>
1792
1793 * sh-opc.h (sh_table): "fsrra", not "fssra".
1794
fe3a9bc4
NC		 17952004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1796
1797 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1798 contraints.
1799
ff24f124
JJ		 18002004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1801
1802 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1803
a02a862a
AM		 18042004-01-19 Alan Modra <amodra@bigpond.net.au>
1805
1806 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1807 1. Don't print scale factor on AT&T mode when index missing.
1808
d164ea7f
AO		 18092004-01-16 Alexandre Oliva <aoliva@redhat.com>
1810
1811 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1812 when loaded into XR registers.
1813
cb10e79a
RS		 18142004-01-14 Richard Sandiford <rsandifo@redhat.com>
1815
1816 * frv-desc.h: Regenerate.
1817 * frv-desc.c: Regenerate.
1818 * frv-opc.c: Regenerate.
1819
f532f3fa
MS		 18202004-01-13 Michael Snyder <msnyder@redhat.com>
1821
1822 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1823
e45d0630
PB		 18242004-01-09 Paul Brook <paul@codesourcery.com>
1825
1826 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1827 specific opcodes.
1828
3ba7a1aa
DJ		 18292004-01-07 Daniel Jacobowitz <drow@mvista.com>
1830
1831 * Makefile.am (libopcodes_la_DEPENDENCIES)
1832 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1833 comment about the problem.
1834 * Makefile.in: Regenerate.
1835
ba2d3f07
AO		 18362004-01-06 Alexandre Oliva <aoliva@redhat.com>
1837
1838 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1839 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1840 cut&paste errors in shifting/truncating numerical operands.
1841 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1842 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1843 (parse_uslo16): Likewise.
1844 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1845 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1846 (parse_s12): Likewise.
1847 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1848 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1849 (parse_uslo16): Likewise.
1850 (parse_uhi16): Parse gothi and gotfuncdeschi.
1851 (parse_d12): Parse got12 and gotfuncdesc12.
1852 (parse_s12): Likewise.
1853
3ab48931
NC		 18542004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1855
1856 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1857 instruction which looks similar to an 'rla' instruction.
a0bd404e 1858
c9e214e5 1859For older changes see ChangeLog-0203
252b5132
RH		 1860\f
1861Local Variables:
2f6d2f85
NC		 1862mode: change-log
1863left-margin: 8
1864fill-column: 74
252b5132
RH		 1865version-control: never
1866End:
GDB Binutils - Deliverables
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