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* ld-mmix/sec-1.d: Adjust for section order changes.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
c85a332d
AM		 12005-12-27 Alan Modra <amodra@bigpond.net.au>
2
3 * Makefile.am: Run "make dep-am".
4 * Makefile.in: Regenerate.
5 * po/POTFILES.in: Regenerate.
6
54758c3e
NC		 72005-12-22 Laurent Menten <laurent.menten@teledisnet.be>
8
9 * pj-opc.c (jsr, ret, getstatic, putstatic, getfield, putfield,
10 invokevirtual, invokespecial, invokestatic, invokeinterface,
11 goto_w, jsr_w, ldc_quick, ldc_w_quick, ldc2_w_quick,
12 getfield_quick, putfield_quick, getfield2_quick, putfield2_quick,
13 getstatic_quick, putstatic_quick, getstatic2_quick,
14 putstatic2_quick, invokevirtual_quick, invokenonvirtual_quick,
15 invokesuper_quick, invokestatic_quick, invokeinterface_quick,
16 aastore_quick, new_quick, anewarray_quick, multianewarray_quick,
17 checkcast_quick, instanceof_quick, invokevirtiual_quick_w,
18 getfield_quick_w, putfield_quick_w, nonnull_quick,
19 agetfield_quick, aputfield_quick, agetstatic_quick,
20 aputstatic_quick, aldc_quick, aldc_w_quick, exit_sync_method): Fix
21 opcodes.
22
d031aafb
NS		 232005-12-16 Nathan Sidwell <nathan@codesourcery.com>
24
25 Second part of ms1 to mt renaming.
26 * Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
27 (stamp-mt): Adjust rule.
28 (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
29 adjust.
30 * Makefile.in: Rebuilt.
31 * configure: Rebuilt.
32 * configure.in (bfd_mt_arch): Rename & adjust.
33 * disassemble.c (ARCH_mt): Renamed.
34 (disassembler): Adjust.
35 * mt-asm.c: Renamed, rebuilt.
36 * mt-desc.c: Renamed, rebuilt.
37 * mt-desc.h: Renamed, rebuilt.
38 * mt-dis.c: Renamed, rebuilt.
39 * mt-ibld.c: Renamed, rebuilt.
40 * mt-opc.c: Renamed, rebuilt.
41 * mt-opc.h: Renamed, rebuilt.
42
eda87aba
DD		 432005-12-13 DJ Delorie <dj@redhat.com>
44
45 * m32c-desc.c: Regenerate.
46 * m32c-opc.c: Regenerate.
47 * m32c-opc.h: Regenerate.
48
4970f871
NS		 492005-12-12 Nathan Sidwell <nathan@codesourcery.com>
50
51 * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
52 * Makefile.in: Rebuilt.
53 * configure.in: Replace ms1 files with mt files.
54 * configure: Rebuilt.
55
272c9217
JB		 562005-12-08 Jan Beulich <jbeulich@novell.com>
57
58 * i386-dis.c (MAXLEN): Reduce to architectural limit.
59 (fetch_data): Check for sufficient buffer size.
60
422673a9
JB		 612005-12-08 Jan Beulich <jbeulich@novell.com>
62
63 * i386-dis.c (OP_ST): Remove prefix in Intel mode.
64
6e50d963
AM		 652005-12-08 Daniel Jacobowitz <dan@codesourcery.com>
66
67 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
68
cf54500c
HPN		 692005-12-07 Hans-Peter Nilsson <hp@axis.com>
70
71 * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
72 MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
73
cb712a9e
L		 742005-12-06 H.J. Lu <hongjiu.lu@intel.com>
75
76 PR gas/1874
77 * i386-dis.c (address_mode): New enum type.
78 (address_mode): New variable.
79 (mode_64bit): Removed.
80 (ckprefix): Updated to check address_mode instead of mode_64bit.
81 (prefix_name): Likewise.
82 (print_insn): Likewise.
83 (putop): Likewise.
84 (print_operand_value): Likewise.
85 (intel_operand_size): Likewise.
86 (OP_E): Likewise.
87 (OP_G): Likewise.
88 (set_op): Likewise.
89 (OP_REG): Likewise.
90 (OP_I): Likewise.
91 (OP_I64): Likewise.
92 (OP_OFF): Likewise.
93 (OP_OFF64): Likewise.
94 (ptr_reg): Likewise.
95 (OP_C): Likewise.
96 (SVME_Fixup): Likewise.
97 (print_insn): Set address_mode.
98 (PNI_Fixup): Add 64bit and address size override support for
99 monitor and mwait.
100
cdedc9f0
HPN		 1012005-12-06 Hans-Peter Nilsson <hp@axis.com>
102
103 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
104 (print_with_operands): Check for prefix when [PC+] is seen.
105
3609e0fe
DB		 1062005-12-02 Dave Brolley <brolley@redhat.com>
107
108 * configure.in (cgen_files): Add cgen-bitset.lo.
109 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
110 * Makefile.am (CFILES): Add cgen-bitset.c.
111 (ALL_MACHINES): Add cgen-bitset.lo.
112 (cgen-bitset.lo): New target.
6e50d963
AM		 113 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
114 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
115 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
3609e0fe
DB		 116 (cgen_bitset_union): Moved from here ...
117 * cgen-bitset.c: ... to here. New file.
118 * Makefile.in: Regenerated.
119 * configure: Regenerated.
120
aa2273ba
JW		 1212005-11-22 James E Wilson <wilson@specifix.com>
122
123 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
124 opcode_fprintf_vma): New.
125 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
126
ce7a772b
AM		 1272005-11-16 Alan Modra <amodra@bigpond.net.au>
128
129 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
130 frsqrtes.
131
0499d65b
TS		 1322005-11-14 David Ung <davidu@mips.com>
133
134 * mips16-opc.c: Add MIPS16e save/restore opcodes.
135 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
136 codes for save/restore.
137
dc82c973
AS		 1382005-11-10 Andreas Schwab <schwab@suse.de>
139
140 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
141 coprocessor ID 1.
142
dbb33a87
NC		 1432005-11-08 H.J. Lu <hongjiu.lu@intel.com>
144
145 * m32c-desc.c: Regenerated.
146
6f84a2a6
NS		 1472005-11-08 Nathan Sidwell <nathan@codesourcery.com>
148
149 Add ms2.
150 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
151 ms1-opc.c, ms1-opc.h: Regenerated.
152
a541e3ce
SE		 1532005-11-07 Steve Ellcey <sje@cup.hp.com>
154
155 * configure: Regenerate after modifying bfd/warning.m4.
156
3e7d61b2
AM		 1572005-11-07 Alan Modra <amodra@bigpond.net.au>
158
159 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
160 ignored rex prefixes here.
161 (print_insn): Instead, handle them similarly to fwait followed
162 by non-fp insns.
163
a92e0d0a
L		 1642005-11-02 H.J. Lu <hongjiu.lu@intel.com>
165
166 * iq2000-desc.c: Regenerated.
167 * iq2000-desc.h: Likewise.
168 * iq2000-dis.c: Likewise.
169 * iq2000-opc.c: Likewise.
170
36b0c57d
PB		 1712005-11-02 Paul Brook <paul@codesourcery.com>
172
173 * arm-dis.c (print_insn_thumb32): Word align blx target address.
174
9a2ff3f5
AM		 1752005-10-31 Alan Modra <amodra@bigpond.net.au>
176
177 * arm-dis.c (print_insn): Warning fix.
178
9e5169a8
L		 1792005-10-30 H.J. Lu <hongjiu.lu@intel.com>
180
181 * Makefile.am: Run "make dep-am".
182 * Makefile.in: Regenerated.
183
184 * dep-in.sed: Replace " ./" with " ".
185
fb53f5a8
DB		 1862005-10-28 Dave Brolley <brolley@redhat.com>
187
188 * All CGEN-generated sources: Regenerate.
189
190 Contribute the following changes:
191 2005-09-19 Dave Brolley <brolley@redhat.com>
192
193 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
194 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
195 bfd_arch_m32c case.
196
197 2005-02-16 Dave Brolley <brolley@redhat.com>
198
199 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
200 cgen_isa_mask_* to cgen_bitset_*.
201 * cgen-opc.c: Likewise.
202
203 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
204
205 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
206 * *-dis.c: Regenerate.
207
208 2003-06-05 DJ Delorie <dj@redhat.com>
209
210 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
211 it, as it may point to a reused buffer. Set prev_isas when we
212 change cpus.
213
214 2002-12-13 Dave Brolley <brolley@redhat.com>
215
216 * cgen-opc.c (cgen_isa_mask_create): New support function for
217 CGEN_ISA_MASK.
218 (cgen_isa_mask_init): Ditto.
219 (cgen_isa_mask_clear): Ditto.
220 (cgen_isa_mask_add): Ditto.
221 (cgen_isa_mask_set): Ditto.
222 (cgen_isa_supported): Ditto.
223 (cgen_isa_mask_compare): Ditto.
224 (cgen_isa_mask_intersection): Ditto.
225 (cgen_isa_mask_copy): Ditto.
226 (cgen_isa_mask_combine): Ditto.
227 * cgen-dis.in (libiberty.h): #include it.
228 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
229 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
230 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
231 * Makefile.in: Regenerated.
232
c6552317
DD		 2332005-10-27 DJ Delorie <dj@redhat.com>
234
235 * m32c-asm.c: Regenerate.
236 * m32c-desc.c: Regenerate.
237 * m32c-desc.h: Regenerate.
238 * m32c-dis.c: Regenerate.
239 * m32c-ibld.c: Regenerate.
240 * m32c-opc.c: Regenerate.
241 * m32c-opc.h: Regenerate.
242
f75eb1c0
DD		 2432005-10-26 DJ Delorie <dj@redhat.com>
244
245 * m32c-asm.c: Regenerate.
246 * m32c-desc.c: Regenerate.
247 * m32c-desc.h: Regenerate.
248 * m32c-dis.c: Regenerate.
249 * m32c-ibld.c: Regenerate.
250 * m32c-opc.c: Regenerate.
251 * m32c-opc.h: Regenerate.
252
f1022c90
PB		 2532005-10-26 Paul Brook <paul@codesourcery.com>
254
255 * arm-dis.c (arm_opcodes): Correct "sel" entry.
256
e277c00b
AM		 2572005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
258
259 * m32r-asm.c: Regenerate.
260
92e0a941
DD		 2612005-10-25 DJ Delorie <dj@redhat.com>
262
263 * m32c-asm.c: Regenerate.
264 * m32c-desc.c: Regenerate.
265 * m32c-desc.h: Regenerate.
266 * m32c-dis.c: Regenerate.
267 * m32c-ibld.c: Regenerate.
268 * m32c-opc.c: Regenerate.
269 * m32c-opc.h: Regenerate.
270
3c9b82ba
NC		 2712005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
272
273 * configure.in: Add target architecture bfd_arch_z80.
274 * configure: Regenerated.
3e7d61b2 275 * disassemble.c (disassembler)<ARCH_z80>: Add case
3c9b82ba
NC		 276 bfd_arch_z80.
277 * z80-dis.c: New file.
278
3caac5b8
AM		 2792005-10-25 Alan Modra <amodra@bigpond.net.au>
280
281 * po/POTFILES.in: Regenerate.
282 * po/opcodes.pot: Regenerate.
283
6a2375c6
JB		 2842005-10-24 Jan Beulich <jbeulich@novell.com>
285
286 * ia64-asmtab.c: Regenerate.
287
a1a280bb
DD		 2882005-10-21 DJ Delorie <dj@redhat.com>
289
290 * m32c-asm.c: Regenerate.
291 * m32c-desc.c: Regenerate.
292 * m32c-desc.h: Regenerate.
293 * m32c-dis.c: Regenerate.
294 * m32c-ibld.c: Regenerate.
295 * m32c-opc.c: Regenerate.
296 * m32c-opc.h: Regenerate.
297
b7d48530
NC		 2982005-10-21 Nick Clifton <nickc@redhat.com>
299
300 * bfin-dis.c: Tidy up code, removing redundant constructs.
301
8dd744b6
MS		 3022005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
303
304 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
305 instructions.
306
e74eb924
NC		 3072005-10-18 Nick Clifton <nickc@redhat.com>
308
309 * m32r-asm.c: Regenerate after updating m32r.opc.
310
471e4e36
JZ		 3112005-10-18 Jie Zhang <jie.zhang@analog.com>
312
313 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
314 reading instruction from memory.
315
5e03663f
NC		 3162005-10-18 Nick Clifton <nickc@redhat.com>
317
318 * m32r-asm.c: Regenerate after updating m32r.opc.
319
ab7c9a26
NC		 3202005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
321
322 * m32r-asm.c: Regenerate after updating m32r.opc.
323
19590ef7
RE		 3242005-10-08 James Lemke <jim@wasabisystems.com>
325
326 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
327 operations.
328
6edfbbad
DJ		 3292005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
330
331 * ppc-dis.c (struct dis_private): Remove.
332 (powerpc_dialect): Avoid aliasing warnings.
333 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
334
095f2843
NC		 3352005-09-30 Nick Clifton <nickc@redhat.com>
336
337 * po/ga.po: New Irish translation.
338 * configure.in (ALL_LINGUAS): Add "ga".
339 * configure: Regenerate.
340
fdd3b9b3
L		 3412005-09-30 H.J. Lu <hongjiu.lu@intel.com>
342
343 * Makefile.am: Run "make dep-am".
344 * Makefile.in: Regenerated.
345 * aclocal.m4: Likewise.
346 * configure: Likewise.
347
4b7f6baa
CM		 3482005-09-30 Catherine Moore <clm@cm00re.com>
349
350 * Makefile.am: Bfin support.
351 * Makefile.in: Regenerated.
352 * aclocal.m4: Regenerated.
353 * bfin-dis.c: New file.
354 * configure.in: Bfin support.
355 * configure: Regenerated.
356 * disassemble.c (ARCH_bfin): Define.
357 (disassembler): Add case for bfd_arch_bfin.
358
1a114b12
JB		 3592005-09-28 Jan Beulich <jbeulich@novell.com>
360
361 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
362 (indirEv): Use it.
363 (stackEv): New.
364 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
365 (dis386): Document and use new 'V' meta character. Use it for
366 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
367 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
368 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
369 data prefix as used whenever DFLAG was examined. Handle 'V'.
370 (intel_operand_size): Use stack_v_mode.
371 (OP_E): Use stack_v_mode, but handle only the special case of
372 64-bit mode without operand size override here; fall through to
373 v_mode case otherwise.
374 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
375 and no operand size override is present.
376 (OP_J): Use get32s for obtaining the displacement also when rex64
377 is present.
378
3eb17e6b
PB		 3792005-09-08 Paul Brook <paul@codesourcery.com>
380
381 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
382
61cc0267
CF		 3832005-09-06 Chao-ying Fu <fu@mips.com>
384
385 * mips-opc.c (MT32): New define.
386 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
387 bottom to avoid opcode collision with "mftr" and "mttr".
388 Add MT instructions.
389 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
390 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
391 formats.
392
b13dd07a
PB		 3932005-09-02 Paul Brook <paul@codesourcery.com>
394
395 * arm-dis.c (coprocessor_opcodes): Add null terminator.
396
8f06b2d8
PB		 3972005-09-02 Paul Brook <paul@codesourcery.com>
398
399 * arm-dis.c (coprocessor_opcodes): New.
400 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
401 (print_insn_coprocessor): New function.
402 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
403 format characters.
404 (print_insn_thumb32): Use print_insn_coprocessor.
405
a2dfd01f
PB		 4062005-08-30 Paul Brook <paul@codesourcery.com>
407
408 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
409
3f31e633
JB		 4102005-08-26 Jan Beulich <jbeulich@novell.com>
411
412 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
413 re-use.
414 (OP_E): Call intel_operand_size, move call site out of mode
415 dependent code.
416 (OP_OFF): Call intel_operand_size if suffix_always. Remove
417 ATTRIBUTE_UNUSED from parameters.
418 (OP_OFF64): Likewise.
419 (OP_ESreg): Call intel_operand_size.
420 (OP_DSreg): Likewise.
421 (OP_DIR): Use colon rather than semicolon as separator of far
422 jump/call operands.
423
fd25c5a9
CF		 4242005-08-25 Chao-ying Fu <fu@mips.com>
425
426 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
427 (mips_builtin_opcodes): Add DSP instructions.
428 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
429 mips64, mips64r2.
430 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
431 operand formats.
432
dd8b7c22
DU		 4332005-08-23 David Ung <davidu@mips.com>
434
435 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
3e7d61b2 436 instructions to the table.
dd8b7c22 437
c17ae8a2
AM		 4382005-08-18 Alan Modra <amodra@bigpond.net.au>
439
848cf006 440 * a29k-dis.c: Delete.
c17ae8a2
AM		 441 * Makefile.am: Remove a29k support.
442 * configure.in: Likewise.
443 * disassemble.c: Likewise.
444 * Makefile.in: Regenerate.
445 * configure: Regenerate.
446 * po/POTFILES.in: Regenerate.
447
36ae0db3
DJ		 4482005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
449
450 * ppc-dis.c (powerpc_dialect): Handle e300.
451 (print_ppc_disassembler_options): Likewise.
452 * ppc-opc.c (PPCE300): Define.
453 (powerpc_opcodes): Mark icbt as available for the e300.
454
63a3357b
DA		 4552005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
456
457 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
458 Use "rp" instead of "%r2" in "b,l" insns.
459
ad101263
MS		 4602005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
461
462 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
463 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
464 (main): Likewise.
465 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
466 and 4 bit optional masks.
467 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
468 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
469 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
470 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
471 (s390_opformats): Likewise.
472 * s390-opc.txt: Add new instructions for cpu type z9-109.
473
f1fa1093
DA		 4742005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
475
476 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
477
e9f89963
PB		 4782005-07-29 Paul Brook <paul@codesourcery.com>
479
480 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
481
92e90b6e
PB		 4822005-07-29 Paul Brook <paul@codesourcery.com>
483
484 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
485 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
486
fd54057a
DD		 4872005-07-25 DJ Delorie <dj@redhat.com>
488
489 * m32c-asm.c Regenerate.
490 * m32c-dis.c Regenerate.
491
760c0f6a
DD		 4922005-07-20 DJ Delorie <dj@redhat.com>
493
494 * disassemble.c (disassemble_init_for_target): M32C ISAs are
495 enums, so convert them to bit masks, which attributes are.
496
85da3a56
NC		 4972005-07-18 Nick Clifton <nickc@redhat.com>
498
499 * configure.in: Restore alpha ordering to list of arches.
500 * configure: Regenerate.
501 * disassemble.c: Restore alpha ordering to list of arches.
502
5032005-07-18 Nick Clifton <nickc@redhat.com>
504
505 * m32c-asm.c: Regenerate.
506 * m32c-desc.c: Regenerate.
507 * m32c-desc.h: Regenerate.
508 * m32c-dis.c: Regenerate.
509 * m32c-ibld.h: Regenerate.
510 * m32c-opc.c: Regenerate.
511 * m32c-opc.h: Regenerate.
512
22cbf2e7
L		 5132005-07-18 H.J. Lu <hongjiu.lu@intel.com>
514
515 * i386-dis.c (PNI_Fixup): Update comment.
516 (VMX_Fixup): Properly handle the suffix check.
517
0aea0460
DA		 5182005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
519
520 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
521 mfctl disassembly.
522
0f82ff91
AM		 5232005-07-16 Alan Modra <amodra@bigpond.net.au>
524
525 * Makefile.am: Run "make dep-am".
526 (stamp-m32c): Fix cpu dependencies.
527 * Makefile.in: Regenerate.
528 * ip2k-dis.c: Regenerate.
529
90700ea2
L		 5302007-07-15 H.J. Lu <hongjiu.lu@intel.com>
531
532 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
533 (VMX_Fixup): New. Fix up Intel VMX Instructions.
534 (Em): New.
535 (Gm): New.
536 (VM): New.
537 (dis386_twobyte): Updated entries 0x78 and 0x79.
538 (twobyte_has_modrm): Likewise.
539 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
540 (OP_G): Handle m_mode.
541
49f58d10
JB		 5422005-07-14 Jim Blandy <jimb@redhat.com>
543
544 Add support for the Renesas M32C and M16C.
545 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
546 * m32c-desc.h, m32c-opc.h: New.
547 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
548 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
549 m32c-opc.c.
550 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
551 m32c-ibld.lo, m32c-opc.lo.
552 (CLEANFILES): List stamp-m32c.
553 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
554 (CGEN_CPUS): Add m32c.
555 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
556 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
557 (m32c_opc_h): New variable.
558 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
559 (m32c-opc.lo): New rules.
560 * Makefile.in: Regenerated.
561 * configure.in: Add case for bfd_m32c_arch.
562 * configure: Regenerated.
563 * disassemble.c (ARCH_m32c): New.
564 [ARCH_m32c]: #include "m32c-desc.h".
565 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
566 (disassemble_init_for_target) [ARCH_m32c]: Same.
567
568 * cgen-ops.h, cgen-types.h: New files.
569 * Makefile.am (HFILES): List them.
570 * Makefile.in: Regenerated.
3e7d61b2 571
0fd3a477
JW		 5722005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
573
574 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
575 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
576 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
577 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
578 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
579 v850-dis.c: Fix format bugs.
580 * ia64-gen.c (fail, warn): Add format attribute.
581 * or32-opc.c (debug): Likewise.
582
22f8fcbd
NC		 5832005-07-07 Khem Raj <kraj@mvista.com>
584
585 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
586 disassembly pattern.
587
d125c27b
AM		 5882005-07-06 Alan Modra <amodra@bigpond.net.au>
589
590 * Makefile.am (stamp-m32r): Fix path to cpu files.
591 (stamp-m32r, stamp-iq2000): Likewise.
592 * Makefile.in: Regenerate.
593 * m32r-asm.c: Regenerate.
594 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
595 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
596
3ec2b351
NC		 5972005-07-05 Nick Clifton <nickc@redhat.com>
598
599 * iq2000-asm.c: Regenerate.
600 * ms1-asm.c: Regenerate.
601
30123838
JB		 6022005-07-05 Jan Beulich <jbeulich@novell.com>
603
604 * i386-dis.c (SVME_Fixup): New.
605 (grps): Use it for the lidt entry.
606 (PNI_Fixup): Call OP_M rather than OP_E.
607 (INVLPG_Fixup): Likewise.
608
b0eec63e
L		 6092005-07-04 H.J. Lu <hongjiu.lu@intel.com>
610
611 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
612
47b0e7ad
NC		 6132005-07-01 Nick Clifton <nickc@redhat.com>
614
615 * a29k-dis.c: Update to ISO C90 style function declarations and
616 fix formatting.
617 * alpha-opc.c: Likewise.
618 * arc-dis.c: Likewise.
619 * arc-opc.c: Likewise.
620 * avr-dis.c: Likewise.
621 * cgen-asm.in: Likewise.
622 * cgen-dis.in: Likewise.
623 * cgen-ibld.in: Likewise.
624 * cgen-opc.c: Likewise.
625 * cris-dis.c: Likewise.
626 * d10v-dis.c: Likewise.
627 * d30v-dis.c: Likewise.
628 * d30v-opc.c: Likewise.
629 * dis-buf.c: Likewise.
630 * dlx-dis.c: Likewise.
631 * h8300-dis.c: Likewise.
632 * h8500-dis.c: Likewise.
633 * hppa-dis.c: Likewise.
634 * i370-dis.c: Likewise.
635 * i370-opc.c: Likewise.
636 * m10200-dis.c: Likewise.
637 * m10300-dis.c: Likewise.
638 * m68k-dis.c: Likewise.
639 * m88k-dis.c: Likewise.
640 * mips-dis.c: Likewise.
641 * mmix-dis.c: Likewise.
642 * msp430-dis.c: Likewise.
643 * ns32k-dis.c: Likewise.
644 * or32-dis.c: Likewise.
645 * or32-opc.c: Likewise.
646 * pdp11-dis.c: Likewise.
647 * pj-dis.c: Likewise.
648 * s390-dis.c: Likewise.
649 * sh-dis.c: Likewise.
650 * sh64-dis.c: Likewise.
651 * sparc-dis.c: Likewise.
652 * sparc-opc.c: Likewise.
653 * sysdep.h: Likewise.
654 * tic30-dis.c: Likewise.
655 * tic4x-dis.c: Likewise.
656 * tic80-dis.c: Likewise.
657 * v850-dis.c: Likewise.
658 * v850-opc.c: Likewise.
659 * vax-dis.c: Likewise.
660 * w65-dis.c: Likewise.
661 * z8kgen.c: Likewise.
3e7d61b2 662
47b0e7ad
NC		 663 * fr30-*: Regenerate.
664 * frv-*: Regenerate.
665 * ip2k-*: Regenerate.
666 * iq2000-*: Regenerate.
667 * m32r-*: Regenerate.
668 * ms1-*: Regenerate.
669 * openrisc-*: Regenerate.
670 * xstormy16-*: Regenerate.
671
cc16ba8c
BE		 6722005-06-23 Ben Elliston <bje@gnu.org>
673
674 * m68k-dis.c: Use ISC C90.
675 * m68k-opc.c: Formatting fixes.
676
4b185e97
DU		 6772005-06-16 David Ung <davidu@mips.com>
678
3e7d61b2
AM		 679 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
680 instructions to the table; seb/seh/sew/zeb/zeh/zew.
4b185e97 681
ac188222
DB		 6822005-06-15 Dave Brolley <brolley@redhat.com>
683
684 Contribute Morpho ms1 on behalf of Red Hat
3e7d61b2 685 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
ac188222
DB		 686 ms1-opc.h: New files, Morpho ms1 target.
687
688 2004-05-14 Stan Cox <scox@redhat.com>
689
690 * disassemble.c (ARCH_ms1): Define.
691 (disassembler): Handle bfd_arch_ms1
692
693 2004-05-13 Michael Snyder <msnyder@redhat.com>
694
695 * Makefile.am, Makefile.in: Add ms1 target.
696 * configure.in: Ditto.
697
6b5d3a4d
ZW		 6982005-06-08 Zack Weinberg <zack@codesourcery.com>
699
700 * arm-opc.h: Delete; fold contents into ...
701 * arm-dis.c: ... here. Move includes of internal COFF headers
702 next to includes of internal ELF headers.
703 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
704 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
705 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
706 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
707 (iwmmxt_wwnames, iwmmxt_wwssnames):
708 Make const.
709 (regnames): Remove iWMMXt coprocessor register sets.
710 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
711 (get_arm_regnames): Adjust fourth argument to match above changes.
712 (set_iwmmxt_regnames): Delete.
713 (print_insn_arm): Constify 'c'. Use ISO syntax for function
714 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
715 and iwmmxt_cregnames, not set_iwmmxt_regnames.
716 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
717 ISO syntax for function pointer calls.
718
4a5329c6
ZW		 7192005-06-07 Zack Weinberg <zack@codesourcery.com>
720
721 * arm-dis.c: Split up the comments describing the format codes, so
722 that the ARM and 16-bit Thumb opcode tables each have comments
723 preceding them that describe all the codes, and only the codes,
724 valid in those tables. (32-bit Thumb table is already like this.)
725 Reorder the lists in all three comments to match the order in
726 which the codes are implemented.
727 Remove all forward declarations of static functions. Convert all
728 function definitions to ISO C format.
729 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
730 Return nothing.
731 (print_insn_thumb16): Remove unused case 'I'.
732 (print_insn): Update for changed calling convention of subroutines.
733
3d456fa1
JB		 7342005-05-25 Jan Beulich <jbeulich@novell.com>
735
736 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
737 hex (but retain it being displayed as signed). Remove redundant
738 checks. Add handling of displacements for 16-bit addressing in Intel
739 mode.
740
2888cb7a
JB		 7412005-05-25 Jan Beulich <jbeulich@novell.com>
742
743 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
744 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
745 masking of 'rm' in 16-bit memory address handling.
746
1ed8e1e4
AM		 7472005-05-19 Anton Blanchard <anton@samba.org>
748
749 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
750 (print_ppc_disassembler_options): Document it.
751 * ppc-opc.c (SVC_LEV): Define.
752 (LEV): Allow optional operand.
753 (POWER5): Define.
754 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
755 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
756
49cc2e69
KC		 7572005-05-19 Kelley Cook <kcook@gcc.gnu.org>
758
759 * Makefile.in: Regenerate.
760
c19d1205
ZW		 7612005-05-17 Zack Weinberg <zack@codesourcery.com>
762
763 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
764 instructions. Adjust disassembly of some opcodes to match
765 unified syntax.
766 (thumb32_opcodes): New table.
767 (print_insn_thumb): Rename print_insn_thumb16; don't handle
768 two-halfword branches here.
769 (print_insn_thumb32): New function.
770 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
771 and print_insn_thumb32. Be consistent about order of
772 halfwords when printing 32-bit instructions.
773
003519a7
L		 7742005-05-07 H.J. Lu <hongjiu.lu@intel.com>
775
776 PR 843
777 * i386-dis.c (branch_v_mode): New.
778 (indirEv): Use branch_v_mode instead of v_mode.
779 (OP_E): Handle branch_v_mode.
780
920a34a7
L		 7812005-05-07 H.J. Lu <hongjiu.lu@intel.com>
782
783 * d10v-dis.c (dis_2_short): Support 64bit host.
784
5de773c1
NC		 7852005-05-07 Nick Clifton <nickc@redhat.com>
786
787 * po/nl.po: Updated translation.
788
f4321104
NC		 7892005-05-07 Nick Clifton <nickc@redhat.com>
790
791 * Update the address and phone number of the FSF organization in
792 the GPL notices in the following files:
793 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
794 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
795 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
796 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
797 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
798 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
799 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
800 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
801 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
802 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
803 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
804 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
805 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
806 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
807 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
808 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
809 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
810 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
811 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
812 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
813 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
814 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
815 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
816 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
817 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
818 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
819 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
820 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
821 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
822 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
823 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
824 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
825 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
826
10b076a2
JW		 8272005-05-05 James E Wilson <wilson@specifixinc.com>
828
829 * ia64-opc.c: Include sysdep.h before libiberty.h.
830
022716b6
NC		 8312005-05-05 Nick Clifton <nickc@redhat.com>
832
833 * configure.in (ALL_LINGUAS): Add vi.
834 * configure: Regenerate.
835 * po/vi.po: New.
836
db5152b4
JG		 8372005-04-26 Jerome Guitton <guitton@gnat.com>
838
839 * configure.in: Fix the check for basename declaration.
840 * configure: Regenerate.
841
eed0d89a
AM		 8422005-04-19 Alan Modra <amodra@bigpond.net.au>
843
844 * ppc-opc.c (RTO): Define.
845 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
846 entries to suit PPC440.
847
791fe849
MK		 8482005-04-18 Mark Kettenis <kettenis@gnu.org>
849
850 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
851 Add xcrypt-ctr.
852
ffe58f7c
NC		 8532005-04-14 Nick Clifton <nickc@redhat.com>
854
855 * po/fi.po: New translation: Finnish.
856 * configure.in (ALL_LINGUAS): Add fi.
857 * configure: Regenerate.
858
9e9b66a9
AM		 8592005-04-14 Alan Modra <amodra@bigpond.net.au>
860
861 * Makefile.am (NO_WERROR): Define.
862 * configure.in: Invoke AM_BINUTILS_WARNINGS.
863 * Makefile.in: Regenerate.
864 * aclocal.m4: Regenerate.
865 * configure: Regenerate.
866
9494d739
NC		 8672005-04-04 Nick Clifton <nickc@redhat.com>
868
869 * fr30-asm.c: Regenerate.
870 * frv-asm.c: Regenerate.
871 * iq2000-asm.c: Regenerate.
872 * m32r-asm.c: Regenerate.
873 * openrisc-asm.c: Regenerate.
874
6128c599
JB		 8752005-04-01 Jan Beulich <jbeulich@novell.com>
876
877 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
878 visible operands in Intel mode. The first operand of monitor is
879 %rax in 64-bit mode.
880
373ff435
JB		 8812005-04-01 Jan Beulich <jbeulich@novell.com>
882
883 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
884 easier future additions.
885
4bd60896
JG		 8862005-03-31 Jerome Guitton <guitton@gnat.com>
887
888 * configure.in: Check for basename.
889 * configure: Regenerate.
890 * config.in: Ditto.
891
4cc91dba
L		 8922005-03-29 H.J. Lu <hongjiu.lu@intel.com>
893
894 * i386-dis.c (SEG_Fixup): New.
895 (Sv): New.
896 (dis386): Use "Sv" for 0x8c and 0x8e.
897
ec72cfe5
NC		 8982005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
899 Nick Clifton <nickc@redhat.com>
c19d1205 900
ec72cfe5
NC		 901 * vax-dis.c: (entry_addr): New varible: An array of user supplied
902 function entry mask addresses.
903 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 904 elements in entry_addr.
ec72cfe5
NC		 905 (entry_addr_total_slots): New variable: The total number of
906 elements in entry_addr.
907 (parse_disassembler_options): New function. Fills in the entry_addr
908 array.
909 (free_entry_array): New function. Release the memory used by the
910 entry addr array. Suppressed because there is no way to call it.
911 (is_function_entry): Check if a given address is a function's
912 start address by looking at supplied entry mask addresses and
913 symbol information, if available.
914 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
915
85064c79
L		 9162005-03-23 H.J. Lu <hongjiu.lu@intel.com>
917
918 * cris-dis.c (print_with_operands): Use ~31L for long instead
919 of ~31.
920
de7141c7
L		 9212005-03-20 H.J. Lu <hongjiu.lu@intel.com>
922
923 * mmix-opc.c (O): Revert the last change.
924 (Z): Likewise.
925
e493ab45
L		 9262005-03-19 H.J. Lu <hongjiu.lu@intel.com>
927
928 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
929 (Z): Likewise.
930
d8d7c459
HPN		 9312005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
932
933 * mmix-opc.c (O, Z): Force expression as unsigned long.
934
ebdb0383
NC		 9352005-03-18 Nick Clifton <nickc@redhat.com>
936
937 * ip2k-asm.c: Regenerate.
938 * op/opcodes.pot: Regenerate.
939
1ad12f97
NC		 9402005-03-16 Nick Clifton <nickc@redhat.com>
941 Ben Elliston <bje@au.ibm.com>
942
569acd2c 943 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 944 compiler command line. Enabled by default. Disable via
569acd2c 945 --disable-werror.
1ad12f97
NC		 946 * configure: Regenerate.
947
4eb30afc
AM		 9482005-03-16 Alan Modra <amodra@bigpond.net.au>
949
950 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
951 BOOKE.
952
ea8409f7
AM		 9532005-03-15 Alan Modra <amodra@bigpond.net.au>
954
729ae8d2
AM		 955 * po/es.po: Commit new Spanish translation.
956
ea8409f7
AM		 957 * po/fr.po: Commit new French translation.
958
4f495e61
NC		 9592005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
960
961 * vax-dis.c: Fix spelling error
962 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
963 of just "Entry mask: < r1 ... >"
964
0a003adc
ZW		 9652005-03-12 Zack Weinberg <zack@codesourcery.com>
966
967 * arm-dis.c (arm_opcodes): Document %E and %V.
968 Add entries for v6T2 ARM instructions:
969 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
970 (print_insn_arm): Add support for %E and %V.
885fc257 971 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 972
da99ee72
AM		 9732005-03-10 Jeff Baker <jbaker@qnx.com>
974 Alan Modra <amodra@bigpond.net.au>
975
976 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
977 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
978 (SPRG_MASK): Delete.
979 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 980 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 981 mfsprg4..7 after msprg and consolidate.
982
220abb21
AM		 9832005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
984
985 * vax-dis.c (entry_mask_bit): New array.
986 (print_insn_vax): Decode function entry mask.
987
0e06657a
AH		 9882005-03-07 Aldy Hernandez <aldyh@redhat.com>
989
990 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
991
06647dfd
AM		 9922005-03-05 Alan Modra <amodra@bigpond.net.au>
993
994 * po/opcodes.pot: Regenerate.
995
82b829a7
RR		 9962005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
997
220abb21 998 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 999 (dsmOneArcInst): Use the enum values for the decoding class.
1000 Remove redundant case in the switch for decodingClass value 11.
82b829a7 1001
c4a530c5
JB		 10022005-03-02 Jan Beulich <jbeulich@novell.com>
1003
1004 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
1005 accesses.
1006 (OP_C): Consider lock prefix in non-64-bit modes.
1007
47d8304e
AM		 10082005-02-24 Alan Modra <amodra@bigpond.net.au>
1009
1010 * cris-dis.c (format_hex): Remove ineffective warning fix.
1011 * crx-dis.c (make_instruction): Warning fix.
1012 * frv-asm.c: Regenerate.
1013
ec36c4a4
NC		 10142005-02-23 Nick Clifton <nickc@redhat.com>
1015
33b71eeb
NC		 1016 * cgen-dis.in: Use bfd_byte for buffers that are passed to
1017 read_memory.
06647dfd 1018
33b71eeb 1019 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 1020
ec36c4a4
NC		 1021 * crx-dis.c (make_instruction): Move argument structure into inner
1022 scope and ensure that all of its fields are initialised before
1023 they are used.
1024
33b71eeb
NC		 1025 * fr30-asm.c: Regenerate.
1026 * fr30-dis.c: Regenerate.
1027 * frv-asm.c: Regenerate.
1028 * frv-dis.c: Regenerate.
1029 * ip2k-asm.c: Regenerate.
1030 * ip2k-dis.c: Regenerate.
1031 * iq2000-asm.c: Regenerate.
1032 * iq2000-dis.c: Regenerate.
1033 * m32r-asm.c: Regenerate.
1034 * m32r-dis.c: Regenerate.
1035 * openrisc-asm.c: Regenerate.
1036 * openrisc-dis.c: Regenerate.
1037 * xstormy16-asm.c: Regenerate.
1038 * xstormy16-dis.c: Regenerate.
1039
53c9ebc5
AM		 10402005-02-22 Alan Modra <amodra@bigpond.net.au>
1041
1042 * arc-ext.c: Warning fixes.
1043 * arc-ext.h: Likewise.
1044 * cgen-opc.c: Likewise.
1045 * ia64-gen.c: Likewise.
1046 * maxq-dis.c: Likewise.
1047 * ns32k-dis.c: Likewise.
1048 * w65-dis.c: Likewise.
1049 * ia64-asmtab.c: Regenerate.
1050
610ad19b
AM		 10512005-02-22 Alan Modra <amodra@bigpond.net.au>
1052
1053 * fr30-desc.c: Regenerate.
1054 * fr30-desc.h: Regenerate.
1055 * fr30-opc.c: Regenerate.
1056 * fr30-opc.h: Regenerate.
1057 * frv-desc.c: Regenerate.
1058 * frv-desc.h: Regenerate.
1059 * frv-opc.c: Regenerate.
1060 * frv-opc.h: Regenerate.
1061 * ip2k-desc.c: Regenerate.
1062 * ip2k-desc.h: Regenerate.
1063 * ip2k-opc.c: Regenerate.
1064 * ip2k-opc.h: Regenerate.
1065 * iq2000-desc.c: Regenerate.
1066 * iq2000-desc.h: Regenerate.
1067 * iq2000-opc.c: Regenerate.
1068 * iq2000-opc.h: Regenerate.
1069 * m32r-desc.c: Regenerate.
1070 * m32r-desc.h: Regenerate.
1071 * m32r-opc.c: Regenerate.
1072 * m32r-opc.h: Regenerate.
1073 * m32r-opinst.c: Regenerate.
1074 * openrisc-desc.c: Regenerate.
1075 * openrisc-desc.h: Regenerate.
1076 * openrisc-opc.c: Regenerate.
1077 * openrisc-opc.h: Regenerate.
1078 * xstormy16-desc.c: Regenerate.
1079 * xstormy16-desc.h: Regenerate.
1080 * xstormy16-opc.c: Regenerate.
1081 * xstormy16-opc.h: Regenerate.
1082
db9db6f2
AM		 10832005-02-21 Alan Modra <amodra@bigpond.net.au>
1084
1085 * Makefile.am: Run "make dep-am"
1086 * Makefile.in: Regenerate.
1087
bf143b25
NC		 10882005-02-15 Nick Clifton <nickc@redhat.com>
1089
1090 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1091 compile time warnings.
1092 (print_keyword): Likewise.
1093 (default_print_insn): Likewise.
1094
1095 * fr30-desc.c: Regenerated.
1096 * fr30-desc.h: Regenerated.
1097 * fr30-dis.c: Regenerated.
1098 * fr30-opc.c: Regenerated.
1099 * fr30-opc.h: Regenerated.
1100 * frv-desc.c: Regenerated.
1101 * frv-dis.c: Regenerated.
1102 * frv-opc.c: Regenerated.
1103 * ip2k-asm.c: Regenerated.
1104 * ip2k-desc.c: Regenerated.
1105 * ip2k-desc.h: Regenerated.
1106 * ip2k-dis.c: Regenerated.
1107 * ip2k-opc.c: Regenerated.
1108 * ip2k-opc.h: Regenerated.
1109 * iq2000-desc.c: Regenerated.
1110 * iq2000-dis.c: Regenerated.
1111 * iq2000-opc.c: Regenerated.
1112 * m32r-asm.c: Regenerated.
1113 * m32r-desc.c: Regenerated.
1114 * m32r-desc.h: Regenerated.
1115 * m32r-dis.c: Regenerated.
1116 * m32r-opc.c: Regenerated.
1117 * m32r-opc.h: Regenerated.
1118 * m32r-opinst.c: Regenerated.
1119 * openrisc-desc.c: Regenerated.
1120 * openrisc-desc.h: Regenerated.
1121 * openrisc-dis.c: Regenerated.
1122 * openrisc-opc.c: Regenerated.
1123 * openrisc-opc.h: Regenerated.
1124 * xstormy16-desc.c: Regenerated.
1125 * xstormy16-desc.h: Regenerated.
1126 * xstormy16-dis.c: Regenerated.
1127 * xstormy16-opc.c: Regenerated.
1128 * xstormy16-opc.h: Regenerated.
1129
d6098898
L		 11302005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1131
1132 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1133 address.
1134
5a84f3e0
NC		 11352005-02-11 Nick Clifton <nickc@redhat.com>
1136
bc18c937
NC		 1137 * iq2000-asm.c: Regenerate.
1138
5a84f3e0
NC		 1139 * frv-dis.c: Regenerate.
1140
0a40490e
JB		 11412005-02-07 Jim Blandy <jimb@redhat.com>
1142
1143 * Makefile.am (CGEN): Load guile.scm before calling the main
1144 application script.
1145 * Makefile.in: Regenerated.
1146 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1147 Simply pass the cgen-opc.scm path to ${cgen} as its first
1148 argument; ${cgen} itself now contains the '-s', or whatever is
1149 appropriate for the Scheme being used.
1150
c46f8c51
AC		 11512005-01-31 Andrew Cagney <cagney@gnu.org>
1152
1153 * configure: Regenerate to track ../gettext.m4.
1154
60b9a617
JB		 11552005-01-31 Jan Beulich <jbeulich@novell.com>
1156
1157 * ia64-gen.c (NELEMS): Define.
1158 (shrink): Generate alias with missing second predicate register when
1159 opcode has two outputs and these are both predicates.
1160 * ia64-opc-i.c (FULL17): Define.
1161 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1162 here to generate output template.
1163 (TBITCM, TNATCM): Undefine after use.
1164 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1165 first input. Add ld16 aliases without ar.csd as second output. Add
1166 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1167 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1168 ar.ccv as third/fourth inputs. Consolidate through...
1169 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1170 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1171 * ia64-asmtab.c: Regenerate.
1172
a53bf506
AC		 11732005-01-27 Andrew Cagney <cagney@gnu.org>
1174
1175 * configure: Regenerate to track ../gettext.m4 change.
1176
90219bd0
AO		 11772005-01-25 Alexandre Oliva <aoliva@redhat.com>
1178
1179 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1180 * frv-asm.c: Rebuilt.
1181 * frv-desc.c: Rebuilt.
1182 * frv-desc.h: Rebuilt.
1183 * frv-dis.c: Rebuilt.
1184 * frv-ibld.c: Rebuilt.
1185 * frv-opc.c: Rebuilt.
1186 * frv-opc.h: Rebuilt.
1187
45181ed1
AC		 11882005-01-24 Andrew Cagney <cagney@gnu.org>
1189
1190 * configure: Regenerate, ../gettext.m4 was updated.
1191
9e836e3d
FF		 11922005-01-21 Fred Fish <fnf@specifixinc.com>
1193
1194 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1195 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1196 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1197 * mips-dis.c: Ditto.
1198
5e8cb021
AM		 11992005-01-20 Alan Modra <amodra@bigpond.net.au>
1200
1201 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1202
986e18a5
FF		 12032005-01-19 Fred Fish <fnf@specifixinc.com>
1204
1205 * mips-dis.c (no_aliases): New disassembly option flag.
1206 (set_default_mips_dis_options): Init no_aliases to zero.
1207 (parse_mips_dis_option): Handle no-aliases option.
1208 (print_insn_mips): Ignore table entries that are aliases
1209 if no_aliases is set.
1210 (print_insn_mips16): Ditto.
1211 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1212 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1213 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1214 * mips16-opc.c (mips16_opcodes): Ditto.
1215
e38bc3b5
NC		 12162005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1217
1218 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1219 (inheritance diagram): Add missing edge.
1220 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1221 easier for the testsuite.
1222 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1223 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 1224 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 1225 arch_sh2a_or_sh4_up child.
1226 (sh_table): Do renaming as above.
1227 Correct comment for ldc.l for gas testsuite to read.
1228 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1229 Correct comments for movy.w and movy.l for gas testsuite to read.
1230 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1231
9df48ba9
L		 12322005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1233
1234 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1235
2033b4b9
L		 12362005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1237
1238 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1239
0bcb06d2
AS		 12402005-01-10 Andreas Schwab <schwab@suse.de>
1241
1242 * disassemble.c (disassemble_init_for_target) <case
1243 bfd_arch_ia64>: Set skip_zeroes to 16.
1244 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1245
47add74d
TL		 12462004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1247
1248 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1249
246f4c05
SS		 12502004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1251
1252 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1253 memory references. Convert avr_operand() to C90 formatting.
1254
0e1200e5
TL		 12552004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1256
1257 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1258
89a649f7
TL		 12592004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1260
1261 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1262 (no_op_insn): Initialize array with instructions that have no
1263 operands.
1264 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1265
6255809c
RE		 12662004-11-29 Richard Earnshaw <rearnsha@arm.com>
1267
1268 * arm-dis.c: Correct top-level comment.
1269
2fbad815
RE		 12702004-11-27 Richard Earnshaw <rearnsha@arm.com>
1271
1272 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1273 architecuture defining the insn.
1274 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 1275 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1276 field.
2fbad815
RE		 1277 Also include opcode/arm.h.
1278 * Makefile.am (arm-dis.lo): Update dependency list.
1279 * Makefile.in: Regenerate.
1280
d81acc42
NC		 12812004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1282
1283 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1284 reflect the change to the short immediate syntax.
1285
ca4f2377
AM		 12862004-11-19 Alan Modra <amodra@bigpond.net.au>
1287
5da8bf1b
AM		 1288 * or32-opc.c (debug): Warning fix.
1289 * po/POTFILES.in: Regenerate.
1290
ca4f2377
AM		 1291 * maxq-dis.c: Formatting.
1292 (print_insn): Warning fix.
1293
b7693d02
DJ		 12942004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1295
1296 * arm-dis.c (WORD_ADDRESS): Define.
1297 (print_insn): Use it. Correct big-endian end-of-section handling.
1298
300dac7e
NC		 12992004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1300 Vineet Sharma <vineets@noida.hcltech.com>
1301
1302 * maxq-dis.c: New file.
1303 * disassemble.c (ARCH_maxq): Define.
610ad19b 1304 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 1305 instructions..
1306 * configure.in: Add case for bfd_maxq_arch.
1307 * configure: Regenerate.
1308 * Makefile.am: Add support for maxq-dis.c
1309 * Makefile.in: Regenerate.
1310 * aclocal.m4: Regenerate.
1311
42048ee7
TL		 13122004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1313
1314 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1315 mode.
1316 * crx-dis.c: Likewise.
1317
bd21e58e
HPN		 13182004-11-04 Hans-Peter Nilsson <hp@axis.com>
1319
1320 Generally, handle CRISv32.
1321 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1322 (struct cris_disasm_data): New type.
1323 (format_reg, format_hex, cris_constraint, print_flags)
1324 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1325 callers changed.
1326 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1327 (print_insn_crisv32_without_register_prefix)
1328 (print_insn_crisv10_v32_with_register_prefix)
1329 (print_insn_crisv10_v32_without_register_prefix)
1330 (cris_parse_disassembler_options): New functions.
1331 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1332 parameter. All callers changed.
1333 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1334 failure.
1335 (cris_constraint) <case 'Y', 'U'>: New cases.
1336 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1337 for constraint 'n'.
1338 (print_with_operands) <case 'Y'>: New case.
1339 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1340 <case 'N', 'Y', 'Q'>: New cases.
1341 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1342 (print_insn_cris_with_register_prefix)
1343 (print_insn_cris_without_register_prefix): Call
1344 cris_parse_disassembler_options.
1345 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1346 for CRISv32 and the size of immediate operands. New v32-only
1347 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1348 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1349 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1350 Change brp to be v3..v10.
1351 (cris_support_regs): New vector.
1352 (cris_opcodes): Update head comment. New format characters '[',
1353 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1354 Add new opcodes for v32 and adjust existing opcodes to accommodate
1355 differences to earlier variants.
1356 (cris_cond15s): New vector.
1357
9306ca4a
JB		 13582004-11-04 Jan Beulich <jbeulich@novell.com>
1359
1360 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1361 (indirEb): Remove.
1362 (Mp): Use f_mode rather than none at all.
1363 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1364 replaces what previously was x_mode; x_mode now means 128-bit SSE
1365 operands.
1366 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1367 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1368 pinsrw's second operand is Edqw.
1369 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1370 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1371 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1372 mode when an operand size override is present or always suffixing.
1373 More instructions will need to be added to this group.
1374 (putop): Handle new macro chars 'C' (short/long suffix selector),
1375 'I' (Intel mode override for following macro char), and 'J' (for
1376 adding the 'l' prefix to far branches in AT&T mode). When an
1377 alternative was specified in the template, honor macro character when
1378 specified for Intel mode.
1379 (OP_E): Handle new *_mode values. Correct pointer specifications for
1380 memory operands. Consolidate output of index register.
1381 (OP_G): Handle new *_mode values.
1382 (OP_I): Handle const_1_mode.
1383 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1384 respective opcode prefix bits have been consumed.
1385 (OP_EM, OP_EX): Provide some default handling for generating pointer
1386 specifications.
1387
f39c96a9
TL		 13882004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1389
1390 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1391 COP_INST macro.
1392
812337be
TL		 13932004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1394
1395 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1396 (getregliststring): Support HI/LO and user registers.
610ad19b 1397 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 1398 rearrangement done in CRX opcode header file.
1399 (crx_regtab): Likewise.
1400 (crx_optab): Likewise.
610ad19b 1401 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 1402 formats.
1403 support new Co-Processor instruction 'cpi'.
1404
4030fa5a
NC		 14052004-10-27 Nick Clifton <nickc@redhat.com>
1406
1407 * opcodes/iq2000-asm.c: Regenerate.
1408 * opcodes/iq2000-desc.c: Regenerate.
1409 * opcodes/iq2000-desc.h: Regenerate.
1410 * opcodes/iq2000-dis.c: Regenerate.
1411 * opcodes/iq2000-ibld.c: Regenerate.
1412 * opcodes/iq2000-opc.c: Regenerate.
1413 * opcodes/iq2000-opc.h: Regenerate.
1414
fc3d45e8
TL		 14152004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1416
1417 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1418 us4, us5 (respectively).
1419 Remove unsupported 'popa' instruction.
1420 Reverse operands order in store co-processor instructions.
1421
3c55da70
AM		 14222004-10-15 Alan Modra <amodra@bigpond.net.au>
1423
1424 * Makefile.am: Run "make dep-am"
1425 * Makefile.in: Regenerate.
1426
7fa3d080
BW		 14272004-10-12 Bob Wilson <bob.wilson@acm.org>
1428
1429 * xtensa-dis.c: Use ISO C90 formatting.
1430
e612bb4d
AM		 14312004-10-09 Alan Modra <amodra@bigpond.net.au>
1432
1433 * ppc-opc.c: Revert 2004-09-09 change.
1434
43cd72b9
BW		 14352004-10-07 Bob Wilson <bob.wilson@acm.org>
1436
1437 * xtensa-dis.c (state_names): Delete.
1438 (fetch_data): Use xtensa_isa_maxlength.
1439 (print_xtensa_operand): Replace operand parameter with opcode/operand
1440 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1441 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1442 instruction bundles. Use xmalloc instead of malloc.
1443
bbac1f2a
NC		 14442004-10-07 David Gibson <david@gibson.dropbear.id.au>
1445
1446 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1447 initializers.
1448
48c9f030
NC		 14492004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1450
1451 * crx-opc.c (crx_instruction): Support Co-processor insns.
1452 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1453 (getregliststring): Change function to use the above enum.
1454 (print_arg): Handle CO-Processor insns.
1455 (crx_cinvs): Add 'b' option to invalidate the branch-target
1456 cache.
1457
12c64a4e
AH		 14582004-10-06 Aldy Hernandez <aldyh@redhat.com>
1459
1460 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1461 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1462 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1463 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1464 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1465
14127cc4
NC		 14662004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1467
1468 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1469 rather than add it.
1470
0dd132b6
NC		 14712004-09-30 Paul Brook <paul@codesourcery.com>
1472
1473 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1474 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1475
3f85e526
L		 14762004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1477
1478 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1479 (CONFIG_STATUS_DEPENDENCIES): New.
1480 (Makefile): Removed.
1481 (config.status): Likewise.
1482 * Makefile.in: Regenerated.
1483
8ae85421
AM		 14842004-09-17 Alan Modra <amodra@bigpond.net.au>
1485
1486 * Makefile.am: Run "make dep-am".
1487 * Makefile.in: Regenerate.
1488 * aclocal.m4: Regenerate.
1489 * configure: Regenerate.
1490 * po/POTFILES.in: Regenerate.
1491 * po/opcodes.pot: Regenerate.
1492
24443139
AS		 14932004-09-11 Andreas Schwab <schwab@suse.de>
1494
1495 * configure: Rebuild.
1496
2a309db0
AM		 14972004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1498
1499 * ppc-opc.c (L): Make this field not optional.
1500
42851540
NC		 15012004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1502
1503 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1504 Fix parameter to 'm[t|f]csr' insns.
1505
979273e3
NN		 15062004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1507
1508 * configure.in: Autoupdate to autoconf 2.59.
1509 * aclocal.m4: Rebuild with aclocal 1.4p6.
1510 * configure: Rebuild with autoconf 2.59.
1511 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1512 bfd changes for autoconf 2.59 on the way).
1513 * config.in: Rebuild with autoheader 2.59.
1514
ac28a1cb
RS		 15152004-08-27 Richard Sandiford <rsandifo@redhat.com>
1516
1517 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1518
30d1c836
ML		 15192004-07-30 Michal Ludvig <mludvig@suse.cz>
1520
1521 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1522 (GRPPADLCK2): New define.
1523 (twobyte_has_modrm): True for 0xA6.
1524 (grps): GRPPADLCK2 for opcode 0xA6.
1525
0b0ac059
AO		 15262004-07-29 Alexandre Oliva <aoliva@redhat.com>
1527
1528 Introduce SH2a support.
1529 * sh-opc.h (arch_sh2a_base): Renumber.
1530 (arch_sh2a_nofpu_base): Remove.
1531 (arch_sh_base_mask): Adjust.
1532 (arch_opann_mask): New.
1533 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1534 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1535 (sh_table): Adjust whitespace.
1536 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1537 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1538 instruction list throughout.
1539 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1540 of arch_sh2a in instruction list throughout.
1541 (arch_sh2e_up): Accomodate above changes.
1542 (arch_sh2_up): Ditto.
1543 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1544 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1545 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1546 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1547 * sh-opc.h (arch_sh2a_nofpu): New.
1548 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1549 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1550 instruction.
1551 2004-01-20 DJ Delorie <dj@redhat.com>
1552 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1553 2003-12-29 DJ Delorie <dj@redhat.com>
1554 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1555 sh_opcode_info, sh_table): Add sh2a support.
1556 (arch_op32): New, to tag 32-bit opcodes.
1557 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1558 2003-12-02 Michael Snyder <msnyder@redhat.com>
1559 * sh-opc.h (arch_sh2a): Add.
1560 * sh-dis.c (arch_sh2a): Handle.
1561 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1562
670ec21d
NC		 15632004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1564
1565 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1566
ed049af3
NC		 15672004-07-22 Nick Clifton <nickc@redhat.com>
1568
1569 PR/280
1570 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1571 insns - this is done by objdump itself.
1572 * h8500-dis.c (print_insn_h8500): Likewise.
1573
20f0a1fc
NC		 15742004-07-21 Jan Beulich <jbeulich@novell.com>
1575
1576 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1577 regardless of address size prefix in effect.
1578 (ptr_reg): Size or address registers does not depend on rex64, but
1579 on the presence of an address size override.
1580 (OP_MMX): Use rex.x only for xmm registers.
1581 (OP_EM): Use rex.z only for xmm registers.
1582
6f14957b
MR		 15832004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1584
1585 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1586 move/branch operations to the bottom so that VR5400 multimedia
1587 instructions take precedence in disassembly.
1588
1586d91e
MR		 15892004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1590
1591 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1592 ISA-specific "break" encoding.
1593
982de27a
NC		 15942004-07-13 Elvis Chiang <elvisfb@gmail.com>
1595
1596 * arm-opc.h: Fix typo in comment.
1597
4300ab10
AS		 15982004-07-11 Andreas Schwab <schwab@suse.de>
1599
1600 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1601
8577e690
AS		 16022004-07-09 Andreas Schwab <schwab@suse.de>
1603
1604 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1605
1fe1f39c
NC		 16062004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1607
1608 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1609 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1610 (crx-dis.lo): New target.
1611 (crx-opc.lo): Likewise.
1612 * Makefile.in: Regenerate.
1613 * configure.in: Handle bfd_crx_arch.
1614 * configure: Regenerate.
1615 * crx-dis.c: New file.
1616 * crx-opc.c: New file.
1617 * disassemble.c (ARCH_crx): Define.
1618 (disassembler): Handle ARCH_crx.
1619
7a33b495
JW		 16202004-06-29 James E Wilson <wilson@specifixinc.com>
1621
1622 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1623 * ia64-asmtab.c: Regnerate.
1624
98e69875
AM		 16252004-06-28 Alan Modra <amodra@bigpond.net.au>
1626
1627 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1628 (extract_fxm): Don't test dialect.
1629 (XFXFXM_MASK): Include the power4 bit.
1630 (XFXM): Add p4 param.
1631 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1632
a53b85e2
AO		 16332004-06-27 Alexandre Oliva <aoliva@redhat.com>
1634
1635 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1636 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1637
d0618d1c
AM		 16382004-06-26 Alan Modra <amodra@bigpond.net.au>
1639
1640 * ppc-opc.c (BH, XLBH_MASK): Define.
1641 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1642
1d9f512f
AM		 16432004-06-24 Alan Modra <amodra@bigpond.net.au>
1644
1645 * i386-dis.c (x_mode): Comment.
1646 (two_source_ops): File scope.
1647 (float_mem): Correct fisttpll and fistpll.
1648 (float_mem_mode): New table.
1649 (dofloat): Use it.
1650 (OP_E): Correct intel mode PTR output.
1651 (ptr_reg): Use open_char and close_char.
1652 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1653 operands. Set two_source_ops.
1654
52886d70
AM		 16552004-06-15 Alan Modra <amodra@bigpond.net.au>
1656
1657 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1658 instead of _raw_size.
1659
bad9ceea
JJ		 16602004-06-08 Jakub Jelinek <jakub@redhat.com>
1661
1662 * ia64-gen.c (in_iclass): Handle more postinc st
1663 and ld variants.
1664 * ia64-asmtab.c: Rebuilt.
1665
0451f5df
MS		 16662004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1667
1668 * s390-opc.txt: Correct architecture mask for some opcodes.
1669 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1670 in the esa mode as well.
1671
f6f9408f
JR		 16722004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1673
1674 * sh-dis.c (target_arch): Make unsigned.
1675 (print_insn_sh): Replace (most of) switch with a call to
1676 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1677 * sh-opc.h: Redefine architecture flags values.
1678 Add sh3-nommu architecture.
1679 Reorganise <arch>_up macros so they make more visual sense.
1680 (SH_MERGE_ARCH_SET): Define new macro.
1681 (SH_VALID_BASE_ARCH_SET): Likewise.
1682 (SH_VALID_MMU_ARCH_SET): Likewise.
1683 (SH_VALID_CO_ARCH_SET): Likewise.
1684 (SH_VALID_ARCH_SET): Likewise.
1685 (SH_MERGE_ARCH_SET_VALID): Likewise.
1686 (SH_ARCH_SET_HAS_FPU): Likewise.
1687 (SH_ARCH_SET_HAS_DSP): Likewise.
1688 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1689 (sh_get_arch_from_bfd_mach): Add prototype.
1690 (sh_get_arch_up_from_bfd_mach): Likewise.
1691 (sh_get_bfd_mach_from_arch_set): Likewise.
1692 (sh_merge_bfd_arc): Likewise.
1693
be8c092b
NC		 16942004-05-24 Peter Barada <peter@the-baradas.com>
1695
1696 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1697 into new match_insn_m68k function. Loop over canidate
1698 matches and select first that completely matches.
be8c092b
NC		 1699 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1700 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1701 to verify addressing for MAC/EMAC.
be8c092b
NC		 1702 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1703 reigster halves since 'fpu' and 'spl' look misleading.
1704 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1705 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1706 first, tighten up match masks.
1707 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1708 'size' from special case code in print_insn_m68k to
1709 determine decode size of insns.
1710
a30e9cc4
AM		 17112004-05-19 Alan Modra <amodra@bigpond.net.au>
1712
1713 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1714 well as when -mpower4.
1715
9598fbe5
NC		 17162004-05-13 Nick Clifton <nickc@redhat.com>
1717
1718 * po/fr.po: Updated French translation.
1719
6b6e92f4
NC		 17202004-05-05 Peter Barada <peter@the-baradas.com>
1721
1722 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1723 variants in arch_mask. Only set m68881/68851 for 68k chips.
1724 * m68k-op.c: Switch from ColdFire chips to core variants.
1725
a404d431
AM		 17262004-05-05 Alan Modra <amodra@bigpond.net.au>
1727
a30e9cc4 1728 PR 147.
a404d431
AM		 1729 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1730
f3806e43
BE		 17312004-04-29 Ben Elliston <bje@au.ibm.com>
1732
520ceea4
BE		 1733 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1734 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1735
1f1799d5
KK		 17362004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1737
1738 * sh-dis.c (print_insn_sh): Print the value in constant pool
1739 as a symbol if it looks like a symbol.
1740
fd99574b
NC		 17412004-04-22 Peter Barada <peter@the-baradas.com>
1742
1743 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1744 appropriate ColdFire architectures.
1745 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1746 mask addressing.
1747 Add EMAC instructions, fix MAC instructions. Remove
1748 macmw/macml/msacmw/msacml instructions since mask addressing now
1749 supported.
1750
b4781d44
JJ		 17512004-04-20 Jakub Jelinek <jakub@redhat.com>
1752
1753 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1754 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1755 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1756 macro. Adjust all users.
1757
91809fda 17582004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1759
91809fda
NC		 1760 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1761 separately.
1762
f4453dfa
NC		 17632004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1764
1765 * m32r-asm.c: Regenerate.
1766
9b0de91a
SS		 17672004-03-29 Stan Shebs <shebs@apple.com>
1768
1769 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1770 used.
1771
e20c0b3d
AM		 17722004-03-19 Alan Modra <amodra@bigpond.net.au>
1773
1774 * aclocal.m4: Regenerate.
1775 * config.in: Regenerate.
1776 * configure: Regenerate.
1777 * po/POTFILES.in: Regenerate.
1778 * po/opcodes.pot: Regenerate.
1779
fdd12ef3
AM		 17802004-03-16 Alan Modra <amodra@bigpond.net.au>
1781
1782 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1783 PPC_OPERANDS_GPR_0.
1784 * ppc-opc.c (RA0): Define.
1785 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1786 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1787 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1788
2dc111b3 17892004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1790
1791 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1792
7bfeee7b
AM		 17932004-03-15 Alan Modra <amodra@bigpond.net.au>
1794
1795 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1796
7ffdda93
ML		 17972004-03-12 Michal Ludvig <mludvig@suse.cz>
1798
1799 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1800 (grps): Delete GRPPLOCK entry.
7ffdda93 1801
cc0ec051
AM		 18022004-03-12 Alan Modra <amodra@bigpond.net.au>
1803
1804 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1805 (M, Mp): Use OP_M.
1806 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1807 (GRPPADLCK): Define.
1808 (dis386): Use NOP_Fixup on "nop".
1809 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1810 (twobyte_has_modrm): Set for 0xa7.
1811 (padlock_table): Delete. Move to..
1812 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1813 and clflush.
1814 (print_insn): Revert PADLOCK_SPECIAL code.
1815 (OP_E): Delete sfence, lfence, mfence checks.
1816
4fd61dcb
JJ		 18172004-03-12 Jakub Jelinek <jakub@redhat.com>
1818
1819 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1820 (INVLPG_Fixup): New function.
1821 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1822
0f10071e
ML		 18232004-03-12 Michal Ludvig <mludvig@suse.cz>
1824
1825 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1826 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1827 (padlock_table): New struct with PadLock instructions.
1828 (print_insn): Handle PADLOCK_SPECIAL.
1829
c02908d2
AM		 18302004-03-12 Alan Modra <amodra@bigpond.net.au>
1831
1832 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1833 (OP_E): Twiddle clflush to sfence here.
1834
d5bb7600
NC		 18352004-03-08 Nick Clifton <nickc@redhat.com>
1836
1837 * po/de.po: Updated German translation.
1838
ae51a426
JR		 18392003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1840
1841 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1842 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1843 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1844 accordingly.
1845
676a64f4
RS		 18462004-03-01 Richard Sandiford <rsandifo@redhat.com>
1847
1848 * frv-asm.c: Regenerate.
1849 * frv-desc.c: Regenerate.
1850 * frv-desc.h: Regenerate.
1851 * frv-dis.c: Regenerate.
1852 * frv-ibld.c: Regenerate.
1853 * frv-opc.c: Regenerate.
1854 * frv-opc.h: Regenerate.
1855
c7a48b9a
RS		 18562004-03-01 Richard Sandiford <rsandifo@redhat.com>
1857
1858 * frv-desc.c, frv-opc.c: Regenerate.
1859
8ae0baa2
RS		 18602004-03-01 Richard Sandiford <rsandifo@redhat.com>
1861
1862 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1863
ce11586c
JR		 18642004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1865
1866 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1867 Also correct mistake in the comment.
1868
6a5709a5
JR		 18692004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1870
1871 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1872 ensure that double registers have even numbers.
1873 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1874 that reserved instruction 0xfffd does not decode the same
1875 as 0xfdfd (ftrv).
1876 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1877 REG_N refers to a double register.
1878 Add REG_N_B01 nibble type and use it instead of REG_NM
1879 in ftrv.
1880 Adjust the bit patterns in a few comments.
1881
e5d2b64f 18822004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1883
1884 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1885
1f04b05f
AH		 18862004-02-20 Aldy Hernandez <aldyh@redhat.com>
1887
1888 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1889
2f3b8700
AH		 18902004-02-20 Aldy Hernandez <aldyh@redhat.com>
1891
1892 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1893
f0b26da6 18942004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1895
1896 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1897 mtivor32, mtivor33, mtivor34.
f0b26da6 1898
23d59c56 18992004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1900
1901 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1902
34920d91
NC		 19032004-02-10 Petko Manolov <petkan@nucleusys.com>
1904
1905 * arm-opc.h Maverick accumulator register opcode fixes.
1906
44d86481
BE		 19072004-02-13 Ben Elliston <bje@wasabisystems.com>
1908
1909 * m32r-dis.c: Regenerate.
1910
17707c23
MS		 19112004-01-27 Michael Snyder <msnyder@redhat.com>
1912
1913 * sh-opc.h (sh_table): "fsrra", not "fssra".
1914
fe3a9bc4
NC		 19152004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1916
1917 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1918 contraints.
1919
ff24f124
JJ		 19202004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1921
1922 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1923
a02a862a
AM		 19242004-01-19 Alan Modra <amodra@bigpond.net.au>
1925
1926 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1927 1. Don't print scale factor on AT&T mode when index missing.
1928
d164ea7f
AO		 19292004-01-16 Alexandre Oliva <aoliva@redhat.com>
1930
1931 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1932 when loaded into XR registers.
1933
cb10e79a
RS		 19342004-01-14 Richard Sandiford <rsandifo@redhat.com>
1935
1936 * frv-desc.h: Regenerate.
1937 * frv-desc.c: Regenerate.
1938 * frv-opc.c: Regenerate.
1939
f532f3fa
MS		 19402004-01-13 Michael Snyder <msnyder@redhat.com>
1941
1942 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1943
e45d0630
PB		 19442004-01-09 Paul Brook <paul@codesourcery.com>
1945
1946 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1947 specific opcodes.
1948
3ba7a1aa
DJ		 19492004-01-07 Daniel Jacobowitz <drow@mvista.com>
1950
1951 * Makefile.am (libopcodes_la_DEPENDENCIES)
1952 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1953 comment about the problem.
1954 * Makefile.in: Regenerate.
1955
ba2d3f07
AO		 19562004-01-06 Alexandre Oliva <aoliva@redhat.com>
1957
1958 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1959 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1960 cut&paste errors in shifting/truncating numerical operands.
1961 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1962 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1963 (parse_uslo16): Likewise.
1964 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1965 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1966 (parse_s12): Likewise.
1967 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1968 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1969 (parse_uslo16): Likewise.
1970 (parse_uhi16): Parse gothi and gotfuncdeschi.
1971 (parse_d12): Parse got12 and gotfuncdesc12.
1972 (parse_s12): Likewise.
1973
3ab48931
NC		 19742004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1975
1976 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1977 instruction which looks similar to an 'rla' instruction.
a0bd404e 1978
c9e214e5 1979For older changes see ChangeLog-0203
252b5132
RH		 1980\f
1981Local Variables:
2f6d2f85
NC		 1982mode: change-log
1983left-margin: 8
1984fill-column: 74
252b5132
RH		 1985version-control: never
1986End:
GDB Binutils - Deliverables
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