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x86: Allow 32-bit registers for tpause and umwait
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
ae1d3843
L		 12018-04-15 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
4 umwait.
5 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
6 64-bit mode.
7 * i386-tbl.h: Regenerated.
8
de89d0a3
IT		 92018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
10
11 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
12 PREFIX_MOD_1_0FAE_REG_6.
13 (va_mode): New.
14 (OP_E_register): Use va_mode.
15 * i386-dis-evex.h (prefix_table):
16 New instructions (see prefixes above).
17 * i386-gen.c (cpu_flag_init): Add WAITPKG.
18 (cpu_flags): Likewise.
19 * i386-opc.h (enum): Likewise.
20 (i386_cpu_flags): Likewise.
21 * i386-opc.tbl: Add umonitor, umwait, tpause.
22 * i386-init.h: Regenerate.
23 * i386-tbl.h: Likewise.
24
a8eb42a8
AM		 252018-04-11 Alan Modra <amodra@gmail.com>
26
27 * opcodes/i860-dis.c: Delete.
28 * opcodes/i960-dis.c: Delete.
29 * Makefile.am: Remove i860 and i960 support.
30 * configure.ac: Likewise.
31 * disassemble.c: Likewise.
32 * disassemble.h: Likewise.
33 * Makefile.in: Regenerate.
34 * configure: Regenerate.
35 * po/POTFILES.in: Regenerate.
36
caf0678c
L		 372018-04-04 H.J. Lu <hongjiu.lu@intel.com>
38
39 PR binutils/23025
40 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
41 to 0.
42 (print_insn): Clear vex instead of vex.evex.
43
4fb0d2b9
NC		 442018-04-04 Nick Clifton <nickc@redhat.com>
45
46 * po/es.po: Updated Spanish translation.
47
c39e5b26
JB		 482018-03-28 Jan Beulich <jbeulich@suse.com>
49
50 * i386-gen.c (opcode_modifiers): Delete VecESize.
51 * i386-opc.h (VecESize): Delete.
52 (struct i386_opcode_modifier): Delete vecesize.
53 * i386-opc.tbl: Drop VecESize.
54 * i386-tlb.h: Re-generate.
55
8e6e0792
JB		 562018-03-28 Jan Beulich <jbeulich@suse.com>
57
58 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
59 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
60 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
61 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
62 * i386-tlb.h: Re-generate.
63
9f123b91
JB		 642018-03-28 Jan Beulich <jbeulich@suse.com>
65
66 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
67 Fold AVX512 forms
68 * i386-tlb.h: Re-generate.
69
9646c87b
JB		 702018-03-28 Jan Beulich <jbeulich@suse.com>
71
72 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
73 (vex_len_table): Drop Y for vcvt*2si.
74 (putop): Replace plain 'Y' handling by abort().
75
c8d59609
NC		 762018-03-28 Nick Clifton <nickc@redhat.com>
77
78 PR 22988
79 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
80 instructions with only a base address register.
81 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
82 handle AARHC64_OPND_SVE_ADDR_R.
83 (aarch64_print_operand): Likewise.
84 * aarch64-asm-2.c: Regenerate.
85 * aarch64_dis-2.c: Regenerate.
86 * aarch64-opc-2.c: Regenerate.
87
b8c169f3
JB		 882018-03-22 Jan Beulich <jbeulich@suse.com>
89
90 * i386-opc.tbl: Drop VecESize from register only insn forms and
91 memory forms not allowing broadcast.
92 * i386-tlb.h: Re-generate.
93
96bc132a
JB		 942018-03-22 Jan Beulich <jbeulich@suse.com>
95
96 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
97 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
98 sha256*): Drop Disp<N>.
99
9f79e886
JB		 1002018-03-22 Jan Beulich <jbeulich@suse.com>
101
102 * i386-dis.c (EbndS, bnd_swap_mode): New.
103 (prefix_table): Use EbndS.
104 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
105 * i386-opc.tbl (bndmov): Move misplaced Load.
106 * i386-tlb.h: Re-generate.
107
d6793fa1
JB		 1082018-03-22 Jan Beulich <jbeulich@suse.com>
109
110 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
111 templates allowing memory operands and folded ones for register
112 only flavors.
113 * i386-tlb.h: Re-generate.
114
f7768225
JB		 1152018-03-22 Jan Beulich <jbeulich@suse.com>
116
117 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
118 256-bit templates. Drop redundant leftover Disp<N>.
119 * i386-tlb.h: Re-generate.
120
0e35537d
JW		 1212018-03-14 Kito Cheng <kito.cheng@gmail.com>
122
123 * riscv-opc.c (riscv_insn_types): New.
124
b4a3689a
NC		 1252018-03-13 Nick Clifton <nickc@redhat.com>
126
127 * po/pt_BR.po: Updated Brazilian Portuguese translation.
128
d3d50934
L		 1292018-03-08 H.J. Lu <hongjiu.lu@intel.com>
130
131 * i386-opc.tbl: Add Optimize to clr.
132 * i386-tbl.h: Regenerated.
133
bd5dea88
L		 1342018-03-08 H.J. Lu <hongjiu.lu@intel.com>
135
136 * i386-gen.c (opcode_modifiers): Remove OldGcc.
137 * i386-opc.h (OldGcc): Removed.
138 (i386_opcode_modifier): Remove oldgcc.
139 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
140 instructions for old (<= 2.8.1) versions of gcc.
141 * i386-tbl.h: Regenerated.
142
e771e7c9
JB		 1432018-03-08 Jan Beulich <jbeulich@suse.com>
144
145 * i386-opc.h (EVEXDYN): New.
146 * i386-opc.tbl: Fold various AVX512VL templates.
147 * i386-tlb.h: Re-generate.
148
ed438a93
JB		 1492018-03-08 Jan Beulich <jbeulich@suse.com>
150
151 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
152 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
153 vpexpandd, vpexpandq): Fold AFX512VF templates.
154 * i386-tlb.h: Re-generate.
155
454172a9
JB		 1562018-03-08 Jan Beulich <jbeulich@suse.com>
157
158 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
159 Fold 128- and 256-bit VEX-encoded templates.
160 * i386-tlb.h: Re-generate.
161
36824150
JB		 1622018-03-08 Jan Beulich <jbeulich@suse.com>
163
164 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
165 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
166 vpexpandd, vpexpandq): Fold AVX512F templates.
167 * i386-tlb.h: Re-generate.
168
e7f5c0a9
JB		 1692018-03-08 Jan Beulich <jbeulich@suse.com>
170
171 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
172 64-bit templates. Drop Disp<N>.
173 * i386-tlb.h: Re-generate.
174
25a4277f
JB		 1752018-03-08 Jan Beulich <jbeulich@suse.com>
176
177 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
178 and 256-bit templates.
179 * i386-tlb.h: Re-generate.
180
d2224064
JB		 1812018-03-08 Jan Beulich <jbeulich@suse.com>
182
183 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
184 * i386-tlb.h: Re-generate.
185
1b193f0b
JB		 1862018-03-08 Jan Beulich <jbeulich@suse.com>
187
188 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
189 Drop NoAVX.
190 * i386-tlb.h: Re-generate.
191
f2f6a710
JB		 1922018-03-08 Jan Beulich <jbeulich@suse.com>
193
194 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
195 * i386-tlb.h: Re-generate.
196
38e314eb
JB		 1972018-03-08 Jan Beulich <jbeulich@suse.com>
198
199 * i386-gen.c (opcode_modifiers): Delete FloatD.
200 * i386-opc.h (FloatD): Delete.
201 (struct i386_opcode_modifier): Delete floatd.
202 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
203 FloatD by D.
204 * i386-tlb.h: Re-generate.
205
d53e6b98
JB		 2062018-03-08 Jan Beulich <jbeulich@suse.com>
207
208 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
209
2907c2f5
JB		 2102018-03-08 Jan Beulich <jbeulich@suse.com>
211
212 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
213 * i386-tlb.h: Re-generate.
214
73053c1f
JB		 2152018-03-08 Jan Beulich <jbeulich@suse.com>
216
217 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
218 forms.
219 * i386-tlb.h: Re-generate.
220
52fe4420
AM		 2212018-03-07 Alan Modra <amodra@gmail.com>
222
223 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
224 bfd_arch_rs6000.
225 * disassemble.h (print_insn_rs6000): Delete.
226 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
227 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
228 (print_insn_rs6000): Delete.
229
a6743a54
AM		 2302018-03-03 Alan Modra <amodra@gmail.com>
231
232 * sysdep.h (opcodes_error_handler): Define.
233 (_bfd_error_handler): Declare.
234 * Makefile.am: Remove stray #.
235 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
236 EDIT" comment.
237 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
238 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
239 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
240 opcodes_error_handler to print errors. Standardize error messages.
241 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
242 and include opintl.h.
243 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
244 * i386-gen.c: Standardize error messages.
245 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
246 * Makefile.in: Regenerate.
247 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
248 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
249 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
250 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
251 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
252 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
253 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
254 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
255 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
256 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
257 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
258 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
259 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
260
8305403a
L		 2612018-03-01 H.J. Lu <hongjiu.lu@intel.com>
262
263 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
264 vpsub[bwdq] instructions.
265 * i386-tbl.h: Regenerated.
266
e184813f
AM		 2672018-03-01 Alan Modra <amodra@gmail.com>
268
269 * configure.ac (ALL_LINGUAS): Sort.
270 * configure: Regenerate.
271
5b616bef
TP		 2722018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
273
274 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
275 macro by assignements.
276
b6f8c7c4
L		 2772018-02-27 H.J. Lu <hongjiu.lu@intel.com>
278
279 PR gas/22871
280 * i386-gen.c (opcode_modifiers): Add Optimize.
281 * i386-opc.h (Optimize): New enum.
282 (i386_opcode_modifier): Add optimize.
283 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
284 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
285 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
286 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
287 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
288 vpxord and vpxorq.
289 * i386-tbl.h: Regenerated.
290
e95b887f
AM		 2912018-02-26 Alan Modra <amodra@gmail.com>
292
293 * crx-dis.c (getregliststring): Allocate a large enough buffer
294 to silence false positive gcc8 warning.
295
0bccfb29
JW		 2962018-02-22 Shea Levy <shea@shealevy.com>
297
298 * disassemble.c (ARCH_riscv): Define if ARCH_all.
299
6b6b6807
L		 3002018-02-22 H.J. Lu <hongjiu.lu@intel.com>
301
302 * i386-opc.tbl: Add {rex},
303 * i386-tbl.h: Regenerated.
304
75f31665
MR		 3052018-02-20 Maciej W. Rozycki <macro@mips.com>
306
307 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
308 (mips16_opcodes): Replace `M' with `m' for "restore".
309
e207bc53
TP		 3102018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
311
312 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
313
87993319
MR		 3142018-02-13 Maciej W. Rozycki <macro@mips.com>
315
316 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
317 variable to `function_index'.
318
68d20676
NC		 3192018-02-13 Nick Clifton <nickc@redhat.com>
320
321 PR 22823
322 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
323 about truncation of printing.
324
d2159fdc
HW		 3252018-02-12 Henry Wong <henry@stuffedcow.net>
326
327 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
328
f174ef9f
NC		 3292018-02-05 Nick Clifton <nickc@redhat.com>
330
331 * po/pt_BR.po: Updated Brazilian Portuguese translation.
332
be3a8dca
IT		 3332018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
334
335 * i386-dis.c (enum): Add pconfig.
336 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
337 (cpu_flags): Add CpuPCONFIG.
338 * i386-opc.h (enum): Add CpuPCONFIG.
339 (i386_cpu_flags): Add cpupconfig.
340 * i386-opc.tbl: Add PCONFIG instruction.
341 * i386-init.h: Regenerate.
342 * i386-tbl.h: Likewise.
343
3233d7d0
IT		 3442018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
345
346 * i386-dis.c (enum): Add PREFIX_0F09.
347 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
348 (cpu_flags): Add CpuWBNOINVD.
349 * i386-opc.h (enum): Add CpuWBNOINVD.
350 (i386_cpu_flags): Add cpuwbnoinvd.
351 * i386-opc.tbl: Add WBNOINVD instruction.
352 * i386-init.h: Regenerate.
353 * i386-tbl.h: Likewise.
354
e925c834
JW		 3552018-01-17 Jim Wilson <jimw@sifive.com>
356
357 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
358
d777820b
IT		 3592018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
360
361 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
362 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
363 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
364 (cpu_flags): Add CpuIBT, CpuSHSTK.
365 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
366 (i386_cpu_flags): Add cpuibt, cpushstk.
367 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
368 * i386-init.h: Regenerate.
369 * i386-tbl.h: Likewise.
370
f6efed01
NC		 3712018-01-16 Nick Clifton <nickc@redhat.com>
372
373 * po/pt_BR.po: Updated Brazilian Portugese translation.
374 * po/de.po: Updated German translation.
375
2721d702
JW		 3762018-01-15 Jim Wilson <jimw@sifive.com>
377
378 * riscv-opc.c (match_c_nop): New.
379 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
380
616dcb87
NC		 3812018-01-15 Nick Clifton <nickc@redhat.com>
382
383 * po/uk.po: Updated Ukranian translation.
384
3957a496
NC		 3852018-01-13 Nick Clifton <nickc@redhat.com>
386
387 * po/opcodes.pot: Regenerated.
388
769c7ea5
NC		 3892018-01-13 Nick Clifton <nickc@redhat.com>
390
391 * configure: Regenerate.
392
faf766e3
NC		 3932018-01-13 Nick Clifton <nickc@redhat.com>
394
395 2.30 branch created.
396
888a89da
IT		 3972018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
398
399 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
400 * i386-tbl.h: Regenerate.
401
cbda583a
JB		 4022018-01-10 Jan Beulich <jbeulich@suse.com>
403
404 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
405 * i386-tbl.h: Re-generate.
406
c9e92278
JB		 4072018-01-10 Jan Beulich <jbeulich@suse.com>
408
409 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
410 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
411 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
412 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
413 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
414 Disp8MemShift of AVX512VL forms.
415 * i386-tbl.h: Re-generate.
416
35fd2b2b
JW		 4172018-01-09 Jim Wilson <jimw@sifive.com>
418
419 * riscv-dis.c (maybe_print_address): If base_reg is zero,
420 then the hi_addr value is zero.
421
91d8b670
JG		 4222018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
423
424 * arm-dis.c (arm_opcodes): Add csdb.
425 (thumb32_opcodes): Add csdb.
426
be2e7d95
JG		 4272018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
428
429 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
430 * aarch64-asm-2.c: Regenerate.
431 * aarch64-dis-2.c: Regenerate.
432 * aarch64-opc-2.c: Regenerate.
433
704a705d
L		 4342018-01-08 H.J. Lu <hongjiu.lu@intel.com>
435
436 PR gas/22681
437 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
438 Remove AVX512 vmovd with 64-bit operands.
439 * i386-tbl.h: Regenerated.
440
35eeb78f
JW		 4412018-01-05 Jim Wilson <jimw@sifive.com>
442
443 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
444 jalr.
445
219d1afa
AM		 4462018-01-03 Alan Modra <amodra@gmail.com>
447
448 Update year range in copyright notice of all files.
449
1508bbf5
JB		 4502018-01-02 Jan Beulich <jbeulich@suse.com>
451
452 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
453 and OPERAND_TYPE_REGZMM entries.
454
1e563868 455For older changes see ChangeLog-2017
3499769a 456\f
1e563868 457Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 458
459Copying and distribution of this file, with or without modification,
460are permitted in any medium without royalty provided the copyright
461notice and this notice are preserved.
462
463Local Variables:
464mode: change-log
465left-margin: 8
466fill-column: 74
467version-control: never
468End:
GDB Binutils - Deliverables
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