[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>

	* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
	nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
	* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
	accordingly.

2004-03-01  Richard Sandiford  <rsandifo@redhat.com>

	* frv-asm.c: Regenerate.
	* frv-desc.c: Regenerate.
	* frv-desc.h: Regenerate.
	* frv-dis.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* frv-opc.c: Regenerate.
	* frv-opc.h: Regenerate.

2004-03-01  Richard Sandiford  <rsandifo@redhat.com>

	* frv-desc.c, frv-opc.c: Regenerate.

2004-03-01  Richard Sandiford  <rsandifo@redhat.com>

	* frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.

2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>

	* sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
	Also correct mistake in the comment.

2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>

	* sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
	ensure that double registers have even numbers.
	Add REG_N_B01 for nn01 (binary 01) nibble to ensure
	that reserved instruction 0xfffd does not decode the same
	as 0xfdfd (ftrv).
	* sh-opc.h: Add REG_N_D nibble type and use it whereever
	REG_N refers to a double register.
	Add REG_N_B01 nibble type and use it instead of REG_NM
	in ftrv.
	Adjust the bit patterns in a few comments.

2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
                                                                                
        * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.

2004-02-20  Aldy Hernandez  <aldyh@redhat.com>

	* ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.

2004-02-20  Aldy Hernandez  <aldyh@redhat.com>

	* ppc-opc.c (powerpc_opcodes): Add m*ivor35.

2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 
        * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
        mtivor32, mtivor33, mtivor34.

2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 
        * ppc-opc.c (powerpc_opcodes): Add mfmcar.

2004-02-10  Petko Manolov  <petkan@nucleusys.com>

	* arm-opc.h Maverick accumulator register opcode fixes.

2004-02-13  Ben Elliston  <bje@wasabisystems.com>

	* m32r-dis.c: Regenerate.

2004-01-27  Michael Snyder  <msnyder@redhat.com>

	* sh-opc.h (sh_table): "fsrra", not "fssra".

2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>

	* sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
	contraints.

2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>

	* sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.

2004-01-19  Alan Modra  <amodra@bigpond.net.au>

	* i386-dis.c (OP_E): Print scale factor on intel mode sib when not
	1.  Don't print scale factor on AT&T mode when index missing.

2004-01-16  Alexandre Oliva  <aoliva@redhat.com>

	* m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
	when loaded into XR registers.

2004-01-14  Richard Sandiford  <rsandifo@redhat.com>

	* frv-desc.h: Regenerate.
	* frv-desc.c: Regenerate.
	* frv-opc.c: Regenerate.

2004-01-13  Michael Snyder  <msnyder@redhat.com>

	* sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.

2004-01-09  Paul Brook  <paul@codesourcery.com>

	* arm-opc.h (arm_opcodes): Move generic mcrr after known
	specific opcodes.

2004-01-07  Daniel Jacobowitz  <drow@mvista.com>

	* Makefile.am (libopcodes_la_DEPENDENCIES)
	(libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
	comment about the problem.
	* Makefile.in: Regenerate.

2004-01-06  Alexandre Oliva  <aoliva@redhat.com>

	2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
	* frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
	cut&paste errors in shifting/truncating numerical operands.
	2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
	* frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
	(parse_uslo16): Likewise.
	(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
	(parse_d12): Parse gotoff12 and gotofffuncdesc12.
	(parse_s12): Likewise.
	2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
	* frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
	(parse_uslo16): Likewise.
	(parse_uhi16): Parse gothi and gotfuncdeschi.
	(parse_d12): Parse got12 and gotfuncdesc12.
	(parse_s12): Likewise.

2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>

	* msp430-dis.c (msp430_doubleoperand): Check for an 'add'
	instruction which looks similar to an 'rla' instruction.

For older changes see ChangeLog-0203
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
ae51a426 JR	1	2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
	2
	3	* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
	4	nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
	5	* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
	6	accordingly.
	7
676a64f4 RS	8	2004-03-01 Richard Sandiford <rsandifo@redhat.com>
	9
	10	* frv-asm.c: Regenerate.
	11	* frv-desc.c: Regenerate.
	12	* frv-desc.h: Regenerate.
	13	* frv-dis.c: Regenerate.
	14	* frv-ibld.c: Regenerate.
	15	* frv-opc.c: Regenerate.
	16	* frv-opc.h: Regenerate.
	17
c7a48b9a RS	18	2004-03-01 Richard Sandiford <rsandifo@redhat.com>
	19
	20	* frv-desc.c, frv-opc.c: Regenerate.
	21
8ae0baa2 RS	22	2004-03-01 Richard Sandiford <rsandifo@redhat.com>
	23
	24	* frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
	25
ce11586c JR	26	2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
	27
	28	* sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
	29	Also correct mistake in the comment.
	30
6a5709a5 JR	31	2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
	32
	33	* sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
	34	ensure that double registers have even numbers.
	35	Add REG_N_B01 for nn01 (binary 01) nibble to ensure
	36	that reserved instruction 0xfffd does not decode the same
	37	as 0xfdfd (ftrv).
	38	* sh-opc.h: Add REG_N_D nibble type and use it whereever
	39	REG_N refers to a double register.
	40	Add REG_N_B01 nibble type and use it instead of REG_NM
	41	in ftrv.
	42	Adjust the bit patterns in a few comments.
	43
e5d2b64f AH	44	2004-02-25 Aldy Hernandez <aldyh@redhat.com>
	45
	46	* ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
	47
1f04b05f AH	48	2004-02-20 Aldy Hernandez <aldyh@redhat.com>
	49
	50	* ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
	51
2f3b8700 AH	52	2004-02-20 Aldy Hernandez <aldyh@redhat.com>
	53
	54	* ppc-opc.c (powerpc_opcodes): Add m*ivor35.
	55
f0b26da6 AH	56	2004-02-20 Aldy Hernandez <aldyh@redhat.com>
	57
	58	* ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
	59	mtivor32, mtivor33, mtivor34.
	60
23d59c56 AH	61	2004-02-19 Aldy Hernandez <aldyh@redhat.com>
23d59c56 AH	62
f0b26da6	63	* ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56	64
34920d91 NC	65	2004-02-10 Petko Manolov <petkan@nucleusys.com>
	66
	67	* arm-opc.h Maverick accumulator register opcode fixes.
	68
44d86481 BE	69	2004-02-13 Ben Elliston <bje@wasabisystems.com>
	70
	71	* m32r-dis.c: Regenerate.
	72
17707c23 MS	73	2004-01-27 Michael Snyder <msnyder@redhat.com>
	74
	75	* sh-opc.h (sh_table): "fsrra", not "fssra".
	76
fe3a9bc4 NC	77	2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
	78
	79	* sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
	80	contraints.
	81
ff24f124 JJ	82	2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
	83
	84	* sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
	85
a02a862a AM	86	2004-01-19 Alan Modra <amodra@bigpond.net.au>
	87
	88	* i386-dis.c (OP_E): Print scale factor on intel mode sib when not
	89	1. Don't print scale factor on AT&T mode when index missing.
	90
d164ea7f AO	91	2004-01-16 Alexandre Oliva <aoliva@redhat.com>
	92
	93	* m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
	94	when loaded into XR registers.
	95
cb10e79a RS	96	2004-01-14 Richard Sandiford <rsandifo@redhat.com>
	97
	98	* frv-desc.h: Regenerate.
	99	* frv-desc.c: Regenerate.
	100	* frv-opc.c: Regenerate.
	101
f532f3fa MS	102	2004-01-13 Michael Snyder <msnyder@redhat.com>
	103
	104	* sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
	105
e45d0630 PB	106	2004-01-09 Paul Brook <paul@codesourcery.com>
	107
	108	* arm-opc.h (arm_opcodes): Move generic mcrr after known
	109	specific opcodes.
	110
3ba7a1aa DJ	111	2004-01-07 Daniel Jacobowitz <drow@mvista.com>
	112
	113	* Makefile.am (libopcodes_la_DEPENDENCIES)
	114	(libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
	115	comment about the problem.
	116	* Makefile.in: Regenerate.
	117
ba2d3f07 AO	118	2004-01-06 Alexandre Oliva <aoliva@redhat.com>
	119
	120	2003-12-19 Alexandre Oliva <aoliva@redhat.com>
	121	* frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
	122	cut&paste errors in shifting/truncating numerical operands.
	123	2003-08-04 Alexandre Oliva <aoliva@redhat.com>
	124	* frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
	125	(parse_uslo16): Likewise.
	126	(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
	127	(parse_d12): Parse gotoff12 and gotofffuncdesc12.
	128	(parse_s12): Likewise.
	129	2003-08-04 Alexandre Oliva <aoliva@redhat.com>
	130	* frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
	131	(parse_uslo16): Likewise.
	132	(parse_uhi16): Parse gothi and gotfuncdeschi.
	133	(parse_d12): Parse got12 and gotfuncdesc12.
	134	(parse_s12): Likewise.
	135
3ab48931 NC	136	2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
	137
	138	* msp430-dis.c (msp430_doubleoperand): Check for an 'add'
	139	instruction which looks similar to an 'rla' instruction.
a0bd404e	140
c9e214e5	141	For older changes see ChangeLog-0203
252b5132 RH	142	\f
252b5132 RH	143	Local Variables:
2f6d2f85 NC	144	mode: change-log
	145	left-margin: 8
	146	fill-column: 74
252b5132 RH	147	version-control: never
252b5132 RH	148	End: