Commit | Line | Data |
---|---|---|
116615c5 L |
1 | 2008-05-22 H.J. Lu <hongjiu.lu@intel.com> |
2 | ||
3 | PR gas/6517 | |
4 | * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss | |
5 | into 32bit and 64bit. Remove Reg64|Qword and add | |
6 | IgnoreSize|No_qSuf on 32bit version. | |
7 | * i386-tbl.h: Regenerated. | |
8 | ||
d9479f2d L |
9 | 2008-05-21 H.J. Lu <hongjiu.lu@intel.com> |
10 | ||
11 | * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq. | |
12 | * i386-tbl.h: Regenerated. | |
13 | ||
3ce6fddb NC |
14 | 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com> |
15 | ||
16 | * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond. | |
17 | ||
8944f3c2 AM |
18 | 2008-05-14 Alan Modra <amodra@bigpond.net.au> |
19 | ||
20 | * Makefile.am: Run "make dep-am". | |
21 | * Makefile.in: Regenerate. | |
22 | ||
f1f8f695 L |
23 | 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> |
24 | ||
25 | * i386-dis.c (MOVBE_Fixup): New. | |
26 | (Mo): Likewise. | |
27 | (PREFIX_0F3880): Likewise. | |
28 | (PREFIX_0F3881): Likewise. | |
29 | (PREFIX_0F38F0): Updated. | |
30 | (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update | |
31 | PREFIX_0F38F0 and PREFIX_0F38F1 for movbe. | |
32 | (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881. | |
33 | ||
34 | * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and | |
35 | CPU_EPT_FLAGS. | |
36 | (cpu_flags): Add CpuMovbe and CpuEPT. | |
37 | ||
38 | * i386-opc.h (CpuMovbe): New. | |
39 | (CpuEPT): Likewise. | |
40 | (CpuLM): Updated. | |
41 | (i386_cpu_flags): Add cpumovbe and cpuept. | |
42 | ||
43 | * i386-opc.tbl: Add entries for movbe and EPT instructions. | |
44 | * i386-init.h: Regenerated. | |
45 | * i386-tbl.h: Likewise. | |
46 | ||
89aa3097 AN |
47 | 2008-04-29 Adam Nemet <anemet@caviumnetworks.com> |
48 | ||
49 | * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for | |
50 | the two drem and the two dremu macros. | |
51 | ||
39c5c168 AN |
52 | 2008-04-28 Adam Nemet <anemet@caviumnetworks.com> |
53 | ||
54 | * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1 | |
55 | instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and | |
56 | cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros | |
57 | INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D. | |
58 | ||
f04d18b7 DM |
59 | 2008-04-25 David S. Miller <davem@davemloft.net> |
60 | ||
61 | * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr | |
62 | instead of %sys_tick_cmpr, as suggested in architecture manuals. | |
63 | ||
6194aaab L |
64 | 2008-04-23 Paolo Bonzini <bonzini@gnu.org> |
65 | ||
66 | * aclocal.m4: Regenerate. | |
67 | * configure: Regenerate. | |
68 | ||
1a6b486f DM |
69 | 2008-04-23 David S. Miller <davem@davemloft.net> |
70 | ||
71 | * sparc-opc.c (asi_table): Add UltraSPARC and Niagara | |
72 | extended values. | |
73 | (prefetch_table): Add missing values. | |
74 | ||
81f8a913 L |
75 | 2008-04-22 H.J. Lu <hongjiu.lu@intel.com> |
76 | ||
77 | * i386-gen.c (opcode_modifiers): Add NoAVX. | |
78 | ||
79 | * i386-opc.h (NoAVX): New. | |
80 | (OldGcc): Updated. | |
81 | (i386_opcode_modifier): Add noavx. | |
82 | ||
83 | * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3 | |
84 | instructions which don't have AVX equivalent. | |
85 | * i386-tbl.h: Regenerated. | |
86 | ||
dae39acc L |
87 | 2008-04-18 H.J. Lu <hongjiu.lu@intel.com> |
88 | ||
89 | * i386-dis.c (OP_VEX_FMA): New. | |
90 | (OP_EX_VexImmW): Likewise. | |
91 | (VexFMA): Likewise. | |
92 | (Vex128FMA): Likewise. | |
93 | (EXVexImmW): Likewise. | |
94 | (get_vex_imm8): Likewise. | |
95 | (OP_EX_VexReg): Likewise. | |
96 | (vex_i4_done): Renamed to ... | |
97 | (vex_w_done): This. | |
98 | (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps | |
99 | and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on | |
100 | FMA instructions. | |
101 | (print_insn): Updated. | |
102 | (OP_EX_VexW): Rewrite to swap register in VEX with EX. | |
103 | (OP_REG_VexI4): Check invalid high registers. | |
104 | ||
ce886ab1 DR |
105 | 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> |
106 | Michael Meissner <michael.meissner@amd.com> | |
107 | ||
108 | * i386-opc.tbl: Fix protX to allow memory in the middle operand. | |
109 | * i386-tbl.h: Regenerate from i386-opc.tbl. | |
8944f3c2 | 110 | |
19a6653c AM |
111 | 2008-04-14 Edmar Wienskoski <edmar@freescale.com> |
112 | ||
113 | * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to | |
114 | accept Power E500MC instructions. | |
115 | (print_ppc_disassembler_options): Document -Me500mc. | |
116 | * ppc-opc.c (DUIS, DUI, T): New. | |
117 | (XRT, XRTRA): Likewise. | |
118 | (E500MC): Likewise. | |
119 | (powerpc_opcodes): Add new Power E500MC instructions. | |
120 | ||
112b7c50 AK |
121 | 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> |
122 | ||
123 | * s390-dis.c (init_disasm): Evaluate disassembler_options. | |
124 | (print_s390_disassembler_options): New function. | |
125 | * disassemble.c (disassembler_usage): Invoke | |
126 | print_s390_disassembler_options. | |
127 | ||
7ff42648 AK |
128 | 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> |
129 | ||
130 | * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes | |
131 | of local variables used for mnemonic parsing: prefix, suffix and | |
132 | number. | |
133 | ||
45a5551e AK |
134 | 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> |
135 | ||
136 | * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic | |
137 | extensions for conditional jumps (o, p, m, nz, z, nm, np, no). | |
138 | (s390_crb_extensions): New extensions table. | |
139 | (insertExpandedMnemonic): Handle '$' tag. | |
140 | * s390-opc.txt: Remove conditional jump variants which can now | |
141 | be expanded automatically. | |
142 | Replace '*' tag with '$' in the compare and branch instructions. | |
143 | ||
06c8514a L |
144 | 2008-04-07 H.J. Lu <hongjiu.lu@intel.com> |
145 | ||
146 | * i386-dis.c (PREFIX_VEX_38XX): Add a tab. | |
147 | (PREFIX_VEX_3AXX): Likewis. | |
148 | ||
b122c285 L |
149 | 2008-04-07 H.J. Lu <hongjiu.lu@intel.com> |
150 | ||
151 | * i386-opc.tbl: Remove 4 extra blank lines. | |
152 | ||
594ab6a3 L |
153 | 2008-04-04 H.J. Lu <hongjiu.lu@intel.com> |
154 | ||
155 | * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL | |
156 | with CPU_PCLMUL_FLAGS/CpuPCLMUL. | |
157 | (cpu_flags): Replace CpuCLMUL with CpuPCLMUL. | |
158 | * i386-opc.tbl: Likewise. | |
159 | ||
160 | * i386-opc.h (CpuCLMUL): Renamed to ... | |
161 | (CpuPCLMUL): This. | |
162 | (CpuFMA): Updated. | |
163 | (i386_cpu_flags): Replace cpuclmul with cpupclmul. | |
164 | ||
165 | * i386-init.h: Regenerated. | |
166 | ||
c0f3af97 L |
167 | 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> |
168 | ||
169 | * i386-dis.c (OP_E_register): New. | |
170 | (OP_E_memory): Likewise. | |
171 | (OP_VEX): Likewise. | |
172 | (OP_EX_Vex): Likewise. | |
173 | (OP_EX_VexW): Likewise. | |
174 | (OP_XMM_Vex): Likewise. | |
175 | (OP_XMM_VexW): Likewise. | |
176 | (OP_REG_VexI4): Likewise. | |
177 | (PCLMUL_Fixup): Likewise. | |
178 | (VEXI4_Fixup): Likewise. | |
179 | (VZERO_Fixup): Likewise. | |
180 | (VCMP_Fixup): Likewise. | |
181 | (VPERMIL2_Fixup): Likewise. | |
182 | (rex_original): Likewise. | |
183 | (rex_ignored): Likewise. | |
184 | (Mxmm): Likewise. | |
185 | (XMM): Likewise. | |
186 | (EXxmm): Likewise. | |
187 | (EXxmmq): Likewise. | |
188 | (EXymmq): Likewise. | |
189 | (Vex): Likewise. | |
190 | (Vex128): Likewise. | |
191 | (Vex256): Likewise. | |
192 | (VexI4): Likewise. | |
193 | (EXdVex): Likewise. | |
194 | (EXqVex): Likewise. | |
195 | (EXVexW): Likewise. | |
196 | (EXdVexW): Likewise. | |
197 | (EXqVexW): Likewise. | |
198 | (XMVex): Likewise. | |
199 | (XMVexW): Likewise. | |
200 | (XMVexI4): Likewise. | |
201 | (PCLMUL): Likewise. | |
202 | (VZERO): Likewise. | |
203 | (VCMP): Likewise. | |
204 | (VPERMIL2): Likewise. | |
205 | (xmm_mode): Likewise. | |
206 | (xmmq_mode): Likewise. | |
207 | (ymmq_mode): Likewise. | |
208 | (vex_mode): Likewise. | |
209 | (vex128_mode): Likewise. | |
210 | (vex256_mode): Likewise. | |
211 | (USE_VEX_C4_TABLE): Likewise. | |
212 | (USE_VEX_C5_TABLE): Likewise. | |
213 | (USE_VEX_LEN_TABLE): Likewise. | |
214 | (VEX_C4_TABLE): Likewise. | |
215 | (VEX_C5_TABLE): Likewise. | |
216 | (VEX_LEN_TABLE): Likewise. | |
217 | (REG_VEX_XX): Likewise. | |
218 | (MOD_VEX_XXX): Likewise. | |
219 | (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. | |
220 | (PREFIX_0F3A44): Likewise. | |
221 | (PREFIX_0F3ADF): Likewise. | |
222 | (PREFIX_VEX_XXX): Likewise. | |
223 | (VEX_OF): Likewise. | |
224 | (VEX_OF38): Likewise. | |
225 | (VEX_OF3A): Likewise. | |
226 | (VEX_LEN_XXX): Likewise. | |
227 | (vex): Likewise. | |
228 | (need_vex): Likewise. | |
229 | (need_vex_reg): Likewise. | |
230 | (vex_i4_done): Likewise. | |
231 | (vex_table): Likewise. | |
232 | (vex_len_table): Likewise. | |
233 | (OP_REG_VexI4): Likewise. | |
234 | (vex_cmp_op): Likewise. | |
235 | (pclmul_op): Likewise. | |
236 | (vpermil2_op): Likewise. | |
237 | (m_mode): Updated. | |
238 | (es_reg): Likewise. | |
239 | (PREFIX_0F38F0): Likewise. | |
240 | (PREFIX_0F3A60): Likewise. | |
241 | (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. | |
242 | (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF | |
243 | and PREFIX_VEX_XXX entries. | |
244 | (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. | |
245 | (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and | |
246 | PREFIX_0F3ADF. | |
247 | (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. | |
248 | Add MOD_VEX_XXX entries. | |
249 | (ckprefix): Initialize rex_original and rex_ignored. Store the | |
250 | REX byte in rex_original. | |
251 | (get_valid_dis386): Handle the implicit prefix in VEX prefix | |
252 | bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. | |
253 | (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before | |
254 | calling get_valid_dis386. Use rex_original and rex_ignored when | |
255 | printing out REX. | |
256 | (putop): Handle "XY". | |
257 | (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and | |
258 | ymmq_mode. | |
259 | (OP_E_extended): Updated to use OP_E_register and | |
260 | OP_E_memory. | |
261 | (OP_XMM): Handle VEX. | |
262 | (OP_EX): Likewise. | |
263 | (XMM_Fixup): Likewise. | |
264 | (CMP_Fixup): Use ARRAY_SIZE. | |
265 | ||
266 | * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, | |
267 | CPU_FMA_FLAGS and CPU_AVX_FLAGS. | |
268 | (operand_type_init): Add OPERAND_TYPE_REGYMM and | |
269 | OPERAND_TYPE_VEX_IMM4. | |
270 | (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. | |
271 | (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, | |
272 | VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, | |
273 | VexImmExt and SSE2AVX. | |
274 | (operand_types): Add RegYMM, Ymmword and Vex_Imm4. | |
275 | ||
276 | * i386-opc.h (CpuAVX): New. | |
277 | (CpuAES): Likewise. | |
278 | (CpuCLMUL): Likewise. | |
279 | (CpuFMA): Likewise. | |
280 | (Vex): Likewise. | |
281 | (Vex256): Likewise. | |
282 | (VexNDS): Likewise. | |
283 | (VexNDD): Likewise. | |
284 | (VexW0): Likewise. | |
285 | (VexW1): Likewise. | |
286 | (Vex0F): Likewise. | |
287 | (Vex0F38): Likewise. | |
288 | (Vex0F3A): Likewise. | |
289 | (Vex3Sources): Likewise. | |
290 | (VexImmExt): Likewise. | |
291 | (SSE2AVX): Likewise. | |
292 | (RegYMM): Likewise. | |
293 | (Ymmword): Likewise. | |
294 | (Vex_Imm4): Likewise. | |
295 | (Implicit1stXmm0): Likewise. | |
296 | (CpuXsave): Updated. | |
297 | (CpuLM): Likewise. | |
298 | (ByteOkIntel): Likewise. | |
299 | (OldGcc): Likewise. | |
300 | (Control): Likewise. | |
301 | (Unspecified): Likewise. | |
302 | (OTMax): Likewise. | |
303 | (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. | |
304 | (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, | |
305 | vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, | |
306 | vex3sources, veximmext and sse2avx. | |
307 | (i386_operand_type): Add regymm, ymmword and vex_imm4. | |
308 | ||
309 | * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. | |
310 | ||
311 | * i386-reg.tbl: Add AVX registers, ymm0..ymm15. | |
312 | ||
313 | * i386-init.h: Regenerated. | |
314 | * i386-tbl.h: Likewise. | |
315 | ||
b21c9cb4 BS |
316 | 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com> |
317 | ||
318 | From Robin Getz <robin.getz@analog.com> | |
319 | * bfin-dis.c (bu32): Typedef. | |
320 | (enum const_forms_t): Add c_uimm32 and c_huimm32. | |
321 | (constant_formats[]): Add uimm32 and huimm16. | |
322 | (fmtconst_val): New. | |
323 | (uimm32): Define. | |
324 | (huimm32): Define. | |
325 | (imm16_val): Define. | |
326 | (luimm16_val): Define. | |
327 | (struct saved_state): Define. | |
328 | (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG, | |
329 | A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG, | |
330 | LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define. | |
331 | (get_allreg): New. | |
332 | (decode_LDIMMhalf_0): Print out the whole register value. | |
333 | ||
ee171c8f BS |
334 | From Jie Zhang <jie.zhang@analog.com> |
335 | * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for | |
336 | multiply and multiply-accumulate to data register instruction. | |
337 | ||
086134ec BS |
338 | * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d, |
339 | c_imm32, c_huimm32e): Define. | |
340 | (constant_formats): Add flags for printing decimal, leading spaces, and | |
341 | exact symbols. | |
342 | (comment, parallel): Add global flags in all disassembly. | |
343 | (fmtconst): Take advantage of new flags, and print default in hex. | |
344 | (fmtconst_val): Likewise. | |
345 | (decode_macfunc): Be consistant with spaces, tabs, comments, | |
346 | capitalization in disassembly, fix minor coding style issues. | |
347 | (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise. | |
348 | (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0, | |
349 | decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0, | |
350 | decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0, | |
351 | decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0, | |
352 | decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0, | |
353 | decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0, | |
354 | decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0, | |
355 | decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0, | |
356 | decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0, | |
357 | _print_insn_bfin, print_insn_bfin): Likewise. | |
358 | ||
58c85be7 RW |
359 | 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
360 | ||
361 | * aclocal.m4: Regenerate. | |
362 | * configure: Likewise. | |
363 | * Makefile.in: Likewise. | |
364 | ||
50e7d84b AM |
365 | 2008-03-13 Alan Modra <amodra@bigpond.net.au> |
366 | ||
367 | * Makefile.am: Run "make dep-am". | |
368 | * Makefile.in: Regenerate. | |
369 | * configure: Regenerate. | |
370 | ||
de866fcc AM |
371 | 2008-03-07 Alan Modra <amodra@bigpond.net.au> |
372 | ||
373 | * ppc-opc.c (powerpc_opcodes): Order and format. | |
374 | ||
28dbc079 L |
375 | 2008-03-01 H.J. Lu <hongjiu.lu@intel.com> |
376 | ||
377 | * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64. | |
378 | * i386-tbl.h: Regenerated. | |
379 | ||
849830bd L |
380 | 2008-02-23 H.J. Lu <hongjiu.lu@intel.com> |
381 | ||
382 | * i386-opc.tbl: Disallow 16-bit near indirect branches for | |
383 | x86-64. | |
384 | * i386-tbl.h: Regenerated. | |
385 | ||
743ddb6b JB |
386 | 2008-02-21 Jan Beulich <jbeulich@novell.com> |
387 | ||
388 | * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword | |
389 | and Fword for far indirect jmp. Allow Reg16 and Word for near | |
390 | indirect jmp on x86-64. Disallow Fword for lcall. | |
391 | * i386-tbl.h: Re-generate. | |
392 | ||
796d5313 NC |
393 | 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com> |
394 | ||
395 | * cr16-opc.c (cr16_num_optab): Defined | |
396 | ||
65da13b5 L |
397 | 2008-02-16 H.J. Lu <hongjiu.lu@intel.com> |
398 | ||
399 | * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG. | |
400 | * i386-init.h: Regenerated. | |
401 | ||
0e336180 NC |
402 | 2008-02-14 Nick Clifton <nickc@redhat.com> |
403 | ||
404 | PR binutils/5524 | |
405 | * configure.in (SHARED_LIBADD): Select the correct host specific | |
406 | file extension for shared libraries. | |
407 | * configure: Regenerate. | |
408 | ||
b7240065 JB |
409 | 2008-02-13 Jan Beulich <jbeulich@novell.com> |
410 | ||
411 | * i386-opc.h (RegFlat): New. | |
412 | * i386-reg.tbl (flat): Add. | |
413 | * i386-tbl.h: Re-generate. | |
414 | ||
34b772a6 JB |
415 | 2008-02-13 Jan Beulich <jbeulich@novell.com> |
416 | ||
417 | * i386-dis.c (a_mode): New. | |
418 | (cond_jump_mode): Adjust. | |
419 | (Ma): Change to a_mode. | |
420 | (intel_operand_size): Handle a_mode. | |
421 | * i386-opc.tbl: Allow Dword and Qword for bound. | |
422 | * i386-tbl.h: Re-generate. | |
423 | ||
a60de03c JB |
424 | 2008-02-13 Jan Beulich <jbeulich@novell.com> |
425 | ||
426 | * i386-gen.c (process_i386_registers): Process new fields. | |
427 | * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to | |
428 | unsigned char. Add dw2_regnum and Dw2Inval. | |
429 | * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo | |
430 | register names. | |
431 | * i386-tbl.h: Re-generate. | |
432 | ||
f03fe4c1 L |
433 | 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> |
434 | ||
4b6bc8eb | 435 | * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS. |
f03fe4c1 L |
436 | * i386-init.h: Updated. |
437 | ||
475a2301 L |
438 | 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> |
439 | ||
440 | * i386-gen.c (cpu_flags): Add CpuXsave. | |
441 | ||
442 | * i386-opc.h (CpuXsave): New. | |
4b6bc8eb | 443 | (CpuLM): Updated. |
475a2301 L |
444 | (i386_cpu_flags): Add cpuxsave. |
445 | ||
446 | * i386-dis.c (MOD_0FAE_REG_4): New. | |
447 | (RM_0F01_REG_2): Likewise. | |
448 | (MOD_0FAE_REG_5): Updated. | |
449 | (RM_0F01_REG_3): Likewise. | |
450 | (reg_table): Use MOD_0FAE_REG_4. | |
451 | (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated | |
452 | for xrstor. | |
453 | (rm_table): Add RM_0F01_REG_2. | |
454 | ||
455 | * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv. | |
456 | * i386-init.h: Regenerated. | |
457 | * i386-tbl.h: Likewise. | |
458 | ||
595785c6 | 459 | 2008-02-11 Jan Beulich <jbeulich@novell.com> |
041179fc | 460 | |
595785c6 JB |
461 | * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove |
462 | Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz). | |
463 | * i386-tbl.h: Re-generate. | |
464 | ||
bb8541b9 L |
465 | 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> |
466 | ||
467 | PR 5715 | |
468 | * configure: Regenerated. | |
469 | ||
57b592a3 AN |
470 | 2008-02-04 Adam Nemet <anemet@caviumnetworks.com> |
471 | ||
472 | * mips-dis.c: Update copyright. | |
473 | (mips_arch_choices): Add Octeon. | |
474 | * mips-opc.c: Update copyright. | |
475 | (IOCT): New macro. | |
476 | (mips_builtin_opcodes): Add Octeon instruction synciobdma. | |
477 | ||
930bb4cf AM |
478 | 2008-01-29 Alan Modra <amodra@bigpond.net.au> |
479 | ||
480 | * ppc-opc.c: Support optional L form mtmsr. | |
481 | ||
82c18208 L |
482 | 2008-01-24 H.J. Lu <hongjiu.lu@intel.com> |
483 | ||
484 | * i386-dis.c (OP_E_extended): Handle r12 like rsp. | |
485 | ||
599121aa L |
486 | 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> |
487 | ||
488 | * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS. | |
489 | * i386-init.h: Regenerated. | |
490 | ||
80098f51 TG |
491 | 2008-01-23 Tristan Gingold <gingold@adacore.com> |
492 | ||
493 | * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr, | |
494 | ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr. | |
495 | ||
115c7c25 L |
496 | 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> |
497 | ||
498 | * i386-gen.c (cpu_flag_init): Remove CpuMMX2. | |
499 | (cpu_flags): Likewise. | |
500 | ||
501 | * i386-opc.h (CpuMMX2): Removed. | |
502 | (CpuSSE): Updated. | |
503 | ||
504 | * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA. | |
505 | * i386-init.h: Regenerated. | |
506 | * i386-tbl.h: Likewise. | |
507 | ||
6305a203 L |
508 | 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> |
509 | ||
510 | * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and | |
511 | CPU_SMX_FLAGS. | |
512 | * i386-init.h: Regenerated. | |
513 | ||
fd07a1c8 L |
514 | 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> |
515 | ||
516 | * i386-opc.tbl: Use Qword on movddup. | |
517 | * i386-tbl.h: Regenerated. | |
518 | ||
321fd21e L |
519 | 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> |
520 | ||
521 | * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax. | |
522 | * i386-tbl.h: Regenerated. | |
523 | ||
4ee52178 L |
524 | 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> |
525 | ||
526 | * i386-dis.c (Mx): New. | |
527 | (PREFIX_0FC3): Likewise. | |
528 | (PREFIX_0FC7_REG_6): Updated. | |
529 | (dis386_twobyte): Use PREFIX_0FC3. | |
530 | (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd. | |
531 | Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on | |
532 | movntss. | |
533 | ||
5c07affc L |
534 | 2008-01-14 H.J. Lu <hongjiu.lu@intel.com> |
535 | ||
536 | * i386-gen.c (opcode_modifiers): Add IntelSyntax. | |
537 | (operand_types): Add Mem. | |
538 | ||
539 | * i386-opc.h (IntelSyntax): New. | |
540 | * i386-opc.h (Mem): New. | |
541 | (Byte): Updated. | |
542 | (Opcode_Modifier_Max): Updated. | |
543 | (i386_opcode_modifier): Add intelsyntax. | |
544 | (i386_operand_type): Add mem. | |
545 | ||
546 | * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more | |
547 | instructions. | |
548 | ||
549 | * i386-reg.tbl: Add size for accumulator. | |
550 | ||
551 | * i386-init.h: Regenerated. | |
552 | * i386-tbl.h: Likewise. | |
553 | ||
0d6a2f58 L |
554 | 2008-01-13 H.J. Lu <hongjiu.lu@intel.com> |
555 | ||
556 | * i386-opc.h (Byte): Fix a typo. | |
557 | ||
7d5e4556 L |
558 | 2008-01-12 H.J. Lu <hongjiu.lu@intel.com> |
559 | ||
560 | PR gas/5534 | |
561 | * i386-gen.c (operand_type_init): Add Dword to | |
562 | OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64. | |
563 | (opcode_modifiers): Remove CheckSize, Byte, Word, Dword, | |
564 | Qword and Xmmword. | |
565 | (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte, | |
566 | Xmmword, Unspecified and Anysize. | |
567 | (set_bitfield): Make Mmword an alias of Qword. Make Oword | |
568 | an alias of Xmmword. | |
569 | ||
570 | * i386-opc.h (CheckSize): Removed. | |
571 | (Byte): Updated. | |
572 | (Word): Likewise. | |
573 | (Dword): Likewise. | |
574 | (Qword): Likewise. | |
575 | (Xmmword): Likewise. | |
576 | (FWait): Updated. | |
577 | (OTMax): Likewise. | |
578 | (i386_opcode_modifier): Remove checksize, byte, word, dword, | |
579 | qword and xmmword. | |
580 | (Fword): New. | |
581 | (TBYTE): Likewise. | |
582 | (Unspecified): Likewise. | |
583 | (Anysize): Likewise. | |
584 | (i386_operand_type): Add byte, word, dword, fword, qword, | |
585 | tbyte xmmword, unspecified and anysize. | |
586 | ||
587 | * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword, | |
588 | Tbyte, Xmmword, Unspecified and Anysize. | |
589 | ||
590 | * i386-reg.tbl: Add size for accumulator. | |
591 | ||
592 | * i386-init.h: Regenerated. | |
593 | * i386-tbl.h: Likewise. | |
594 | ||
b5b1fc4f L |
595 | 2008-01-10 H.J. Lu <hongjiu.lu@intel.com> |
596 | ||
597 | * i386-dis.c (REG_0F0E): Renamed to REG_0F0D. | |
598 | (REG_0F18): Updated. | |
599 | (reg_table): Updated. | |
600 | (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e. | |
601 | (twobyte_has_modrm): Set 1 for 0x19 to 0x1e. | |
602 | ||
50e8458f L |
603 | 2008-01-08 H.J. Lu <hongjiu.lu@intel.com> |
604 | ||
605 | * i386-gen.c (set_bitfield): Use fail () on error. | |
606 | ||
3d4d5afa L |
607 | 2008-01-08 H.J. Lu <hongjiu.lu@intel.com> |
608 | ||
609 | * i386-gen.c (lineno): New. | |
610 | (filename): Likewise. | |
611 | (set_bitfield): Report filename and line numer on error. | |
612 | (process_i386_opcodes): Set filename and update lineno. | |
613 | (process_i386_registers): Likewise. | |
614 | ||
e1d4d893 L |
615 | 2008-01-05 H.J. Lu <hongjiu.lu@intel.com> |
616 | ||
617 | * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to | |
618 | ATTSyntax. | |
619 | ||
620 | * i386-opc.h (IntelMnemonic): Renamed to .. | |
621 | (ATTSyntax): This | |
622 | (Opcode_Modifier_Max): Updated. | |
623 | (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax | |
624 | and intelsyntax. | |
625 | ||
8944f3c2 | 626 | * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax |
e1d4d893 L |
627 | on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp. |
628 | * i386-tbl.h: Regenerated. | |
629 | ||
6f143e4d L |
630 | 2008-01-04 H.J. Lu <hongjiu.lu@intel.com> |
631 | ||
632 | * i386-gen.c: Update copyright to 2008. | |
633 | * i386-opc.h: Likewise. | |
634 | * i386-opc.tbl: Likewise. | |
635 | ||
636 | * i386-init.h: Regenerated. | |
637 | * i386-tbl.h: Likewise. | |
638 | ||
c6add537 L |
639 | 2008-01-04 H.J. Lu <hongjiu.lu@intel.com> |
640 | ||
641 | * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps, | |
642 | pextrb, pextrw, pinsrb, pinsrw and pmovmskb. | |
643 | * i386-tbl.h: Regenerated. | |
644 | ||
3629bb00 L |
645 | 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> |
646 | ||
647 | * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and | |
648 | CpuSSE4_2_Or_ABM. | |
649 | (cpu_flags): Likewise. | |
650 | ||
651 | * i386-opc.h (CpuSSE4_1_Or_5): Removed. | |
652 | (CpuSSE4_2_Or_ABM): Likewise. | |
653 | (CpuLM): Updated. | |
654 | (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm. | |
655 | ||
656 | * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and | |
657 | Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2 | |
658 | and CpuPadLock, respectively. | |
659 | * i386-init.h: Regenerated. | |
660 | * i386-tbl.h: Likewise. | |
661 | ||
24995bd6 L |
662 | 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> |
663 | ||
664 | * i386-gen.c (opcode_modifiers): Remove No_xSuf. | |
665 | ||
666 | * i386-opc.h (No_xSuf): Removed. | |
667 | (CheckSize): Updated. | |
668 | ||
669 | * i386-tbl.h: Regenerated. | |
670 | ||
e0329a22 L |
671 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
672 | ||
673 | * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to | |
674 | CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and | |
675 | CPU_SSE5_FLAGS. | |
676 | (cpu_flags): Add CpuSSE4_2_Or_ABM. | |
677 | ||
678 | * i386-opc.h (CpuSSE4_2_Or_ABM): New. | |
679 | (CpuLM): Updated. | |
680 | (i386_cpu_flags): Add cpusse4_2_or_abm. | |
681 | ||
682 | * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of | |
683 | CpuABM|CpuSSE4_2 on popcnt. | |
684 | * i386-init.h: Regenerated. | |
685 | * i386-tbl.h: Likewise. | |
686 | ||
f2a9c676 L |
687 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
688 | ||
689 | * i386-opc.h: Update comments. | |
690 | ||
d978b5be L |
691 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
692 | ||
693 | * i386-gen.c (opcode_modifiers): Use Qword instead of QWord. | |
694 | * i386-opc.h: Likewise. | |
695 | * i386-opc.tbl: Likewise. | |
696 | ||
582d5edd L |
697 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
698 | ||
699 | PR gas/5534 | |
700 | * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize, | |
701 | Byte, Word, Dword, QWord and Xmmword. | |
702 | ||
703 | * i386-opc.h (No_xSuf): New. | |
704 | (CheckSize): Likewise. | |
705 | (Byte): Likewise. | |
706 | (Word): Likewise. | |
707 | (Dword): Likewise. | |
708 | (QWord): Likewise. | |
709 | (Xmmword): Likewise. | |
710 | (FWait): Updated. | |
711 | (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word, | |
712 | Dword, QWord and Xmmword. | |
713 | ||
714 | * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is | |
715 | used. | |
716 | * i386-tbl.h: Regenerated. | |
717 | ||
3fe15143 MK |
718 | 2008-01-02 Mark Kettenis <kettenis@gnu.org> |
719 | ||
720 | * m88k-dis.c (instructions): Fix fcvt.* instructions. | |
721 | From Miod Vallat. | |
722 | ||
6c7ac64e | 723 | For older changes see ChangeLog-2007 |
252b5132 RH |
724 | \f |
725 | Local Variables: | |
2f6d2f85 NC |
726 | mode: change-log |
727 | left-margin: 8 | |
728 | fill-column: 74 | |
252b5132 RH |
729 | version-control: never |
730 | End: |