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ubsan: i386-dis.c
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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b4b39349
AM		 12020-09-02 Alan Modra <amodra@gmail.com>
2
3 * i386-dis.c (OP_E_memory): Don't cast to signed type when
4 negating.
5 (get32, get32s): Use unsigned types in shift expressions.
6
caf4537a
AM		 72020-09-02 Alan Modra <amodra@gmail.com>
8
9 * csky-dis.c (print_insn_csky): Use unsigned type for "given".
10
3c5097ea
AM		 112020-09-02 Alan Modra <amodra@gmail.com>
12
13 * crx-dis.c: Whitespace.
14 (print_arg): Use unsigned type for longdisp and mask variables,
15 and for left shift constant.
16
ae3e98b4
AM		 172020-09-02 Alan Modra <amodra@gmail.com>
18
19 * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift.
20 * bpf-ibld.c: Regenerate.
21 * epiphany-ibld.c: Regenerate.
22 * fr30-ibld.c: Regenerate.
23 * frv-ibld.c: Regenerate.
24 * ip2k-ibld.c: Regenerate.
25 * iq2000-ibld.c: Regenerate.
26 * lm32-ibld.c: Regenerate.
27 * m32c-ibld.c: Regenerate.
28 * m32r-ibld.c: Regenerate.
29 * mep-ibld.c: Regenerate.
30 * mt-ibld.c: Regenerate.
31 * or1k-ibld.c: Regenerate.
32 * xc16x-ibld.c: Regenerate.
33 * xstormy16-ibld.c: Regenerate.
34
427202d9
AM		 352020-09-02 Alan Modra <amodra@gmail.com>
36
37 * bfin-dis.c (MASKBITS): Use SIGNBIT.
38
4211a340
CQ		 392020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
40
41 * csky-opc.h (csky_v2_opcodes): Move divul and divsl
42 to CSKYV2_ISA_3E3R3 instruction set.
43
8119cc38
CQ		 442020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
45
46 * csky-opc.h (csky_v2_opcodes): Fix Encode of mulsws.
47
8dbe96f0
AM		 482020-09-01 Alan Modra <amodra@gmail.com>
49
50 * mep-ibld.c: Regenerate.
51
e2e82b11
CQ		 522020-08-31 Cooper Qu <cooper.qu@linux.alibaba.com>
53
54 * csky-dis.c (csky_output_operand): Assign dis_info.value for
55 OPRND_TYPE_VREG.
56
2781f857
AM		 572020-08-30 Alan Modra <amodra@gmail.com>
58
59 * cr16-dis.c: Formatting.
60 (parameter): Delete struct typedef. Use dwordU instead
61 throughout file.
62 (make_argument <arg_idxr>): Simplify detection of cbitb, sbitb
63 and tbitb.
64 (make_argument <arg_cr>): Extract 20-bit field not 16-bit.
65
0c0577f6
AM		 662020-08-29 Alan Modra <amodra@gmail.com>
67
68 PR 26446
69 * csky-opc.h (MAX_OPRND_NUM): Define to 5.
70 (union csky_operand): Use MAX_OPRND_NUM to size oprnds array.
71
a1e60a1b
AM		 722020-08-28 Alan Modra <amodra@gmail.com>
73
74 PR 26449
75 PR 26450
76 * cgen-ibld.in (insert_1): Use 1UL in forming mask.
77 (extract_normal): Likewise.
78 (insert_normal): Likewise, and move past zero length test.
79 (put_insn_int_value): Handle mask for zero length, use 1UL.
80 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
81 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
82 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
83 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
84
0861f561
CQ		 852020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com>
86
87 * csky-dis.c (CSKY_DEFAULT_ISA): Define.
88 (csky_dis_info): Add member isa.
89 (csky_find_inst_info): Skip instructions that do not belong to
90 current CPU.
91 (csky_get_disassembler): Get infomation from attribute section.
92 (print_insn_csky): Set defualt ISA flag.
93 * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
94 * csky-opc.h (struct csky_opcode): Change isa_flag16 and
95 isa_flag32'type to unsigned 64 bits.
96
31b3f3e6
JM		 972020-08-26 Jose E. Marchesi <jemarch@gnu.org>
98
99 * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX.
100
4449c81a
DF		 1012020-08-26 David Faust <david.faust@oracle.com>
102
103 * bpf-desc.c: Regenerate.
104 * bpf-desc.h: Likewise.
105 * bpf-opc.c: Likewise.
106 * bpf-opc.h: Likewise.
107 * disassemble.c (disassemble_init_for_target): Set bits for xBPF
108 ISA when appropriate.
109
8640c87d
AM		 1102020-08-25 Alan Modra <amodra@gmail.com>
111
112 PR 26504
113 * vax-dis.c (parse_disassembler_options): Always add at least one
114 to entry_addr_total_slots.
115
531c73a3
CQ		 1162020-08-24 Cooper Qu <cooper.qu@linux.alibaba.com>
117
118 * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
119 in other CPUs to speed up disassembling.
120 * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
121 Change plsli.u16 to plsli.16, change sync's operand format.
122
d04aee0f
CQ		 1232020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
124
125 * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
126
ccf61261
NC		 1272020-08-21 Nick Clifton <nickc@redhat.com>
128
129 * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
130 symbols.
131
d285ba8d
CQ		 1322020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
133
134 * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
135
18a8a00e
AM		 1362020-08-19 Alan Modra <amodra@gmail.com>
137
138 * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
139 vcmpuq and xvtlsbb.
140
587a4371
PB		 1412020-08-18 Peter Bergner <bergner@linux.ibm.com>
142
143 * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
144 <xvcvbf16spn>: ...to this.
145
2e49fd1e
AC		 1462020-08-12 Alex Coplan <alex.coplan@arm.com>
147
148 * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
149
79ddc884
NC		 1502020-08-12 Nick Clifton <nickc@redhat.com>
151
152 * po/sr.po: Updated Serbian translation.
153
08770ec2
AM		 1542020-08-11 Alan Modra <amodra@gmail.com>
155
156 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
157
f7cb161e
PW		 1582020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
159
160 * aarch64-opc.c (aarch64_print_operand):
161 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
162 (aarch64_sys_reg_supported_p): Function removed.
163 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
164 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
165 into this function.
166
3eb65174
AM		 1672020-08-10 Alan Modra <amodra@gmail.com>
168
169 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
170 instructions.
171
8b2742a1
AM		 1722020-08-10 Alan Modra <amodra@gmail.com>
173
174 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
175 Enable icbt for power5, miso for power8.
176
5fbec329
AM		 1772020-08-10 Alan Modra <amodra@gmail.com>
178
179 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
180 mtvsrd, and similarly for mfvsrd.
181
563a3225
CG		 1822020-08-04 Christian Groessler <chris@groessler.org>
183 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
184
185 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
186 opcodes (special "out" to absolute address).
187 * z8k-opc.h: Regenerate.
188
41eb8e88
L		 1892020-07-30 H.J. Lu <hongjiu.lu@intel.com>
190
191 PR gas/26305
192 * i386-opc.h (Prefix_Disp8): New.
193 (Prefix_Disp16): Likewise.
194 (Prefix_Disp32): Likewise.
195 (Prefix_Load): Likewise.
196 (Prefix_Store): Likewise.
197 (Prefix_VEX): Likewise.
198 (Prefix_VEX3): Likewise.
199 (Prefix_EVEX): Likewise.
200 (Prefix_REX): Likewise.
201 (Prefix_NoOptimize): Likewise.
202 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
203 * i386-tbl.h: Regenerated.
204
98116973
AA		 2052020-07-29 Andreas Arnez <arnez@linux.ibm.com>
206
207 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
208 default case with abort() instead of printing an error message and
209 continuing, to avoid a maybe-uninitialized warning.
210
2dddfa20
NC		 2112020-07-24 Nick Clifton <nickc@redhat.com>
212
213 * po/de.po: Updated German translation.
214
bf4ba07c
JB		 2152020-07-21 Jan Beulich <jbeulich@suse.com>
216
217 * i386-dis.c (OP_E_memory): Revert previous change.
218
04c662e2
L		 2192020-07-15 H.J. Lu <hongjiu.lu@intel.com>
220
221 PR gas/26237
222 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
223 without base nor index registers.
224
f0e8d0ba
JB		 2252020-07-15 Jan Beulich <jbeulich@suse.com>
226
227 * i386-dis.c (putop): Move 'V' and 'W' handling.
228
c3f5525f
JB		 2292020-07-15 Jan Beulich <jbeulich@suse.com>
230
231 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
232 construct for push/pop of register.
233 (putop): Honor cond when handling 'P'. Drop handling of plain
234 'V'.
235
36938cab
JB		 2362020-07-15 Jan Beulich <jbeulich@suse.com>
237
238 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
239 description. Drop '&' description. Use P for push of immediate,
240 pushf/popf, enter, and leave. Use %LP for lret/retf.
241 (dis386_twobyte): Use P for push/pop of fs/gs.
242 (reg_table): Use P for push/pop. Use @ for near call/jmp.
243 (x86_64_table): Use P for far call/jmp.
244 (putop): Drop handling of 'U' and '&'. Move and adjust handling
245 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
246 labels.
247 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
248 and dqw_mode (unconditional).
249
8e58ef80
L		 2502020-07-14 H.J. Lu <hongjiu.lu@intel.com>
251
252 PR gas/26237
253 * i386-dis.c (OP_E_memory): Without base nor index registers,
254 32-bit displacement to 64 bits.
255
570b0ed6
CZ		 2562020-07-14 Claudiu Zissulescu <claziss@gmail.com>
257
258 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
259 faulty double register pair is detected.
260
bfbd9438
JB		 2612020-07-14 Jan Beulich <jbeulich@suse.com>
262
263 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
264
78467458
JB		 2652020-07-14 Jan Beulich <jbeulich@suse.com>
266
267 * i386-dis.c (OP_R, Rm): Delete.
268 (MOD_0F24, MOD_0F26): Rename to ...
269 (X86_64_0F24, X86_64_0F26): ... respectively.
270 (dis386): Update 'L' and 'Z' comments.
271 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
272 table references.
273 (mod_table): Move opcode 0F24 and 0F26 entries ...
274 (x86_64_table): ... here.
275 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
276 'Z' case block.
277
464d2b65
JB		 2782020-07-14 Jan Beulich <jbeulich@suse.com>
279
280 * i386-dis.c (Rd, Rdq, MaskR): Delete.
281 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
282 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
283 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
284 MOD_EVEX_0F387C): New enumerators.
285 (reg_table): Use Edq for rdssp.
286 (prefix_table): Use Edq for incssp.
287 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
288 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
289 ktest*, and kshift*. Use Edq / MaskE for kmov*.
290 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
291 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
292 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
293 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
294 0F3828_P_1 and 0F3838_P_1.
295 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
296 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
297
035e7389
JB		 2982020-07-14 Jan Beulich <jbeulich@suse.com>
299
300 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
301 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
302 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
303 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
304 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
305 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
306 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
307 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
308 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
309 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
310 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
311 (reg_table, prefix_table, three_byte_table, vex_table,
312 vex_len_table, mod_table, rm_table): Replace / remove respective
313 entries.
314 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
315 of PREFIX_DATA in used_prefixes.
316
bb5b3501
JB		 3172020-07-14 Jan Beulich <jbeulich@suse.com>
318
319 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
320 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
321 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
322 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
323 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
324 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
325 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
326 VEX_W_0F3A33_L_0): Delete.
327 (dis386): Adjust "BW" description.
328 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
329 0F3A31, 0F3A32, and 0F3A33.
330 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
331 entries.
332 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
333 entries.
334
7531c613
JB		 3352020-07-14 Jan Beulich <jbeulich@suse.com>
336
337 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
338 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
339 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
340 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
341 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
342 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
343 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
344 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
345 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
346 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
347 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
348 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
349 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
350 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
351 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
352 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
353 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
354 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
355 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
356 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
357 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
358 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
359 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
360 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
361 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
362 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
363 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
364 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
365 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
366 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
367 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
368 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
369 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
370 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
371 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
372 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
373 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
374 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
375 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
376 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
377 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
378 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
379 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
380 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
381 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
382 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
383 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
384 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
385 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
386 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
387 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
388 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
389 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
390 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
391 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
392 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
393 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
394 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
395 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
396 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
397 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
398 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
399 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
400 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
401 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
402 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
403 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
404 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
405 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
406 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
407 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
408 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
409 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
410 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
411 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
412 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
413 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
414 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
415 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
416 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
417 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
418 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
419 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
420 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
421 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
422 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
423 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
424 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
425 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
426 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
427 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
428 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
429 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
430 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
431 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
432 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
433 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
434 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
435 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
436 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
437 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
438 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
439 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
440 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
441 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
442 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
443 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
444 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
445 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
446 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
447 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
448 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
449 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
450 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
451 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
452 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
453 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
454 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
455 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
456 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
457 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
458 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
459 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
460 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
461 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
462 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
463 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
464 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
465 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
466 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
467 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
468 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
469 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
470 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
471 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
472 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
473 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
474 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
475 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
476 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
477 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
478 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
479 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
480 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
481 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
482 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
483 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
484 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
485 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
486 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
487 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
488 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
489 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
490 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
491 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
492 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
493 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
494 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
495 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
496 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
497 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
498 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
499 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
500 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
501 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
502 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
503 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
504 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
505 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
506 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
507 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
508 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
509 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
510 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
511 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
512 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
513 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
514 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
515 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
516 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
517 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
518 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
519 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
520 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
521 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
522 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
523 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
524 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
525 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
526 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
527 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
528 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
529 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
530 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
531 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
532 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
533 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
534 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
535 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
536 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
537 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
538 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
539 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
540 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
541 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
542 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
543 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
544 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
545 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
546 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
547 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
548 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
549 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
550 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
551 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
552 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
553 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
554 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
555 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
556 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
557 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
558 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
559 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
560 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
561 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
562 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
563 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
564 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
565 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
566 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
567 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
568 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
569 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
570 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
571 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
572 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
573 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
574 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
575 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
576 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
577 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
578 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
579 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
580 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
581 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
582 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
583 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
584 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
585 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
586 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
587 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
588 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
589 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
590 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
591 EVEX_W_0F3A72_P_2): Rename to ...
592 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
593 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
594 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
595 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
596 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
597 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
598 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
599 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
600 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
601 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
602 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
603 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
604 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
605 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
606 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
607 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
608 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
609 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
610 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
611 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
612 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
613 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
614 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
615 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
616 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
617 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
618 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
619 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
620 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
621 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
622 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
623 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
624 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
625 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
626 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
627 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
628 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
629 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
630 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
631 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
632 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
633 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
634 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
635 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
636 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
637 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
638 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
639 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
640 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
641 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
642 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
643 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
644 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
645 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
646 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
647 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
648 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
649 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
650 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
651 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
652 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
653 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
654 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
655 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
656 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
657 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
658 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
659 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
660 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
661 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
662 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
663 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
664 respectively.
665 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
666 vex_w_table, mod_table): Replace / remove respective entries.
667 (print_insn): Move up dp->prefix_requirement handling. Handle
668 PREFIX_DATA.
669 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
670 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
671 Replace / remove respective entries.
672
17d3c7ec
JB		 6732020-07-14 Jan Beulich <jbeulich@suse.com>
674
675 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
676 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
677 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
678 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
679 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
680 the latter two.
681 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
682 0F2C, 0F2D, 0F2E, and 0F2F.
683 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
684 0F2F table entries.
685
41f5efc6
JB		 6862020-07-14 Jan Beulich <jbeulich@suse.com>
687
688 * i386-dis.c (OP_VexR, VexScalarR): New.
689 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
690 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
691 need_vex_reg): Delete.
692 (prefix_table): Replace VexScalar by VexScalarR and
693 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
694 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
695 (vex_len_table): Replace EXqVexScalarS by EXqS.
696 (get_valid_dis386): Don't set need_vex_reg.
697 (print_insn): Don't initialize need_vex_reg.
698 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
699 q_scalar_swap_mode cases.
700 (OP_EX): Don't check for d_scalar_swap_mode and
701 q_scalar_swap_mode.
702 (OP_VEX): Done check need_vex_reg.
703 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
704 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
705 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
706
89e65d17
JB		 7072020-07-14 Jan Beulich <jbeulich@suse.com>
708
709 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
710 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
711 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
712 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
713 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
714 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
715 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
716 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
717 (vex_table): Replace Vex128 by Vex.
718 (vex_len_table): Likewise. Adjust referenced enum names.
719 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
720 referenced enum names.
721 (OP_VEX): Drop vex128_mode and vex256_mode cases.
722 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
723
492a76aa
JB		 7242020-07-14 Jan Beulich <jbeulich@suse.com>
725
726 * i386-dis.c (dis386): "LW" description now applies to "DQ".
727 (putop): Handle "DQ". Don't handle "LW" anymore.
728 (prefix_table, mod_table): Replace %LW by %DQ.
729 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
730
059edf8b
JB		 7312020-07-14 Jan Beulich <jbeulich@suse.com>
732
733 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
734 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
735 d_scalar_swap_mode case handling. Move shift adjsutment into
736 the case its applicable to.
737
4726e9a4
JB		 7382020-07-14 Jan Beulich <jbeulich@suse.com>
739
740 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
741 (EXbScalar, EXwScalar): Fold to ...
742 (EXbwUnit): ... this.
743 (b_scalar_mode, w_scalar_mode): Fold to ...
744 (bw_unit_mode): ... this.
745 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
746 w_scalar_mode handling by bw_unit_mode one.
747 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
748 ...
749 * i386-dis-evex-prefix.h: ... here.
750
b24d668c
JB		 7512020-07-14 Jan Beulich <jbeulich@suse.com>
752
753 * i386-dis.c (PCMPESTR_Fixup): Delete.
754 (dis386): Adjust "LQ" description.
755 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
756 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
757 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
758 vpcmpestrm, and vpcmpestri.
759 (putop): Honor "cond" when handling LQ.
760 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
761 vcvtsi2ss and vcvtusi2ss.
762 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
763 vcvtsi2sd and vcvtusi2sd.
764
c4de7606
JB		 7652020-07-14 Jan Beulich <jbeulich@suse.com>
766
767 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
768 (simd_cmp_op): Add const.
769 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
770 (CMP_Fixup): Handle VEX case.
771 (prefix_table): Replace VCMP by CMP.
772 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
773
9ab00b61
JB		 7742020-07-14 Jan Beulich <jbeulich@suse.com>
775
776 * i386-dis.c (MOVBE_Fixup): Delete.
777 (Mv): Define.
778 (prefix_table): Use Mv for movbe entries.
779
2875b28a
JB		 7802020-07-14 Jan Beulich <jbeulich@suse.com>
781
782 * i386-dis.c (CRC32_Fixup): Delete.
783 (prefix_table): Use Eb/Ev for crc32 entries.
784
e184e611
JB		 7852020-07-14 Jan Beulich <jbeulich@suse.com>
786
787 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
788 Conditionalize invocations of "USED_REX (0)".
789
e8b5d5f9
JB		 7902020-07-14 Jan Beulich <jbeulich@suse.com>
791
792 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
793 CH, DH, BH, AX, DX): Delete.
794 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
795 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
796 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
797
260cd341
LC		 7982020-07-10 Lili Cui <lili.cui@intel.com>
799
800 * i386-dis.c (TMM): New.
801 (EXtmm): Likewise.
802 (VexTmm): Likewise.
803 (MVexSIBMEM): Likewise.
804 (tmm_mode): Likewise.
805 (vex_sibmem_mode): Likewise.
806 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
807 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
808 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
809 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
810 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
811 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
812 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
813 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
814 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
815 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
816 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
817 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
818 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
819 (PREFIX_VEX_0F3849_X86_64): Likewise.
820 (PREFIX_VEX_0F384B_X86_64): Likewise.
821 (PREFIX_VEX_0F385C_X86_64): Likewise.
822 (PREFIX_VEX_0F385E_X86_64): Likewise.
823 (X86_64_VEX_0F3849): Likewise.
824 (X86_64_VEX_0F384B): Likewise.
825 (X86_64_VEX_0F385C): Likewise.
826 (X86_64_VEX_0F385E): Likewise.
827 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
828 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
829 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
830 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
831 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
832 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
833 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
834 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
835 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
836 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
837 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
838 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
839 (VEX_W_0F3849_X86_64_P_0): Likewise.
840 (VEX_W_0F3849_X86_64_P_2): Likewise.
841 (VEX_W_0F3849_X86_64_P_3): Likewise.
842 (VEX_W_0F384B_X86_64_P_1): Likewise.
843 (VEX_W_0F384B_X86_64_P_2): Likewise.
844 (VEX_W_0F384B_X86_64_P_3): Likewise.
845 (VEX_W_0F385C_X86_64_P_1): Likewise.
846 (VEX_W_0F385E_X86_64_P_0): Likewise.
847 (VEX_W_0F385E_X86_64_P_1): Likewise.
848 (VEX_W_0F385E_X86_64_P_2): Likewise.
849 (VEX_W_0F385E_X86_64_P_3): Likewise.
850 (names_tmm): Likewise.
851 (att_names_tmm): Likewise.
852 (intel_operand_size): Handle void_mode.
853 (OP_XMM): Handle tmm_mode.
854 (OP_EX): Likewise.
855 (OP_VEX): Likewise.
856 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
857 CpuAMX_BF16 and CpuAMX_TILE.
858 (operand_type_shorthands): Add RegTMM.
859 (operand_type_init): Likewise.
860 (operand_types): Add Tmmword.
861 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
862 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
863 * i386-opc.h (CpuAMX_INT8): New.
864 (CpuAMX_BF16): Likewise.
865 (CpuAMX_TILE): Likewise.
866 (SIBMEM): Likewise.
867 (Tmmword): Likewise.
868 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
869 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
870 (i386_operand_type): Add tmmword.
871 * i386-opc.tbl: Add AMX instructions.
872 * i386-reg.tbl: Add AMX registers.
873 * i386-init.h: Regenerated.
874 * i386-tbl.h: Likewise.
875
467bbef0
JB		 8762020-07-08 Jan Beulich <jbeulich@suse.com>
877
878 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
879 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
880 Rename to ...
881 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
882 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
883 respectively.
884 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
885 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
886 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
887 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
888 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
889 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
890 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
891 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
892 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
893 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
894 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
895 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
896 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
897 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
898 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
899 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
900 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
901 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
902 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
903 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
904 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
905 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
906 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
907 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
908 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
909 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
910 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
911 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
912 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
913 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
914 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
915 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
916 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
917 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
918 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
919 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
920 (reg_table): Re-order XOP entries. Adjust their operands.
921 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
922 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
923 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
924 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
925 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
926 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
927 entries by references ...
928 (vex_len_table): ... to resepctive new entries here. For several
929 new and existing entries reference ...
930 (vex_w_table): ... new entries here.
931 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
932
6384fd9e
JB		 9332020-07-08 Jan Beulich <jbeulich@suse.com>
934
935 * i386-dis.c (XMVexScalarI4): Define.
936 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
937 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
938 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
939 (vex_len_table): Move scalar FMA4 entries ...
940 (prefix_table): ... here.
941 (OP_REG_VexI4): Handle scalar_mode.
942 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
943 * i386-tbl.h: Re-generate.
944
e6123d0c
JB		 9452020-07-08 Jan Beulich <jbeulich@suse.com>
946
947 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
948 Vex_2src_2): Delete.
949 (OP_VexW, VexW): New.
950 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
951 for shifts and rotates by register.
952
93abb146
JB		 9532020-07-08 Jan Beulich <jbeulich@suse.com>
954
955 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
956 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
957 OP_EX_VexReg): Delete.
958 (OP_VexI4, VexI4): New.
959 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
960 (prefix_table): ... here.
961 (print_insn): Drop setting of vex_w_done.
962
b13b1bc0
JB		 9632020-07-08 Jan Beulich <jbeulich@suse.com>
964
965 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
966 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
967 (xop_table): Replace operands of 4-operand insns.
968 (OP_REG_VexI4): Move VEX.W based operand swaping here.
969
f337259f
CZ		 9702020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
971
972 * arc-opc.c (insert_rbd): New function.
973 (RBD): Define.
974 (RBDdup): Likewise.
975 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
976 instructions.
977
931452b6
JB		 9782020-07-07 Jan Beulich <jbeulich@suse.com>
979
980 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
981 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
982 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
983 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
984 Delete.
985 (putop): Handle "BW".
986 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
987 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
988 and 0F3A3F ...
989 * i386-dis-evex-prefix.h: ... here.
990
b5b098c2
JB		 9912020-07-06 Jan Beulich <jbeulich@suse.com>
992
993 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
994 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
995 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
996 VEX_W_0FXOP_09_83): New enumerators.
997 (xop_table): Reference the above.
998 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
999 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
1000 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
1001 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
1002
21a3faeb
JB		 10032020-07-06 Jan Beulich <jbeulich@suse.com>
1004
1005 * i386-dis.c (EVEX_W_0F3838_P_1,
1006 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
1007 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
1008 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
1009 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
1010 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
1011 (putop): Centralize management of last[]. Delete SAVE_LAST.
1012 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
1013 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
1014 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
1015 * i386-dis-evex-prefix.h: here.
1016
bc152a17
JB		 10172020-07-06 Jan Beulich <jbeulich@suse.com>
1018
1019 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
1020 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
1021 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
1022 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
1023 enumerators.
1024 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
1025 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
1026 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
1027 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
1028 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
1029 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
1030 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
1031 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
1032 these, respectively.
1033 * i386-dis-evex-len.h: Adjust comments.
1034 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
1035 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
1036 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
1037 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
1038 MOD_EVEX_0F385B_P_2_W_1 table entries.
1039 * i386-dis-evex-w.h: Reference mod_table[] for
1040 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
1041 EVEX_W_0F385B_P_2.
1042
c82a99a0
JB		 10432020-07-06 Jan Beulich <jbeulich@suse.com>
1044
1045 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
1046 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
1047 EXymm.
1048 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
1049 Likewise. Mark 256-bit entries invalid.
1050
fedfb81e
JB		 10512020-07-06 Jan Beulich <jbeulich@suse.com>
1052
1053 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1054 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1055 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1056 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1057 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1058 PREFIX_EVEX_0F382B): Delete.
1059 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
1060 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
1061 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
1062 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
1063 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
1064 to ...
1065 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
1066 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
1067 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
1068 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
1069 respectively.
1070 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
1071 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
1072 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1073 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1074 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1075 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1076 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1077 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1078 PREFIX_EVEX_0F382B): Remove table entries.
1079 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
1080 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
1081 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1082
3a57774c
JB		 10832020-07-06 Jan Beulich <jbeulich@suse.com>
1084
1085 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
1086 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
1087 enumerators.
1088 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
1089 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
1090 EVEX_LEN_0F3A01_P_2_W_1 table entries.
1091 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1092 entries.
1093
e74d9fa9
JB		 10942020-07-06 Jan Beulich <jbeulich@suse.com>
1095
1096 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
1097 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1098 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1099 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
1100 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
1101 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
1102 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1103 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
1104 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1105 entries.
1106
6431c801
JB		 11072020-07-06 Jan Beulich <jbeulich@suse.com>
1108
1109 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
1110 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
1111 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
1112 respectively.
1113 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
1114 entries.
1115 * i386-dis-evex.h (evex_table): Reference VEX table entry for
1116 opcode 0F3A1D.
1117 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1118 entry.
1119 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1120
6df22cf6
JB		 11212020-07-06 Jan Beulich <jbeulich@suse.com>
1122
1123 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1124 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1125 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1126 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1127 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1128 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1129 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1130 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1131 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1132 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1133 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1134 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1135 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1136 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1137 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1138 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1139 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1140 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1141 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1142 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1143 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1144 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1145 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1146 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1147 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1148 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1149 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1150 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1151 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1152 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1153 (prefix_table): Add EXxEVexR to FMA table entries.
1154 (OP_Rounding): Move abort() invocation.
1155 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1156 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1157 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1158 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1159 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1160 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1161 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1162 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1163 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1164 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1165 0F3ACE, 0F3ACF.
1166 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1167 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1168 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1169 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1170 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1171 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1172 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1173 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1174 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1175 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1176 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1177 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1178 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1179 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1180 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1181 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1182 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1183 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1184 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1185 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1186 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1187 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1188 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1189 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1190 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1191 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1192 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1193 Delete table entries.
1194 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1195 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1196 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1197 Likewise.
1198
39e0f456
JB		 11992020-07-06 Jan Beulich <jbeulich@suse.com>
1200
1201 * i386-dis.c (EXqScalarS): Delete.
1202 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1203 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1204
5b872f7d
JB		 12052020-07-06 Jan Beulich <jbeulich@suse.com>
1206
1207 * i386-dis.c (safe-ctype.h): Include.
1208 (EXdScalar, EXqScalar): Delete.
1209 (d_scalar_mode, q_scalar_mode): Delete.
1210 (prefix_table, vex_len_table): Use EXxmm_md in place of
1211 EXdScalar and EXxmm_mq in place of EXqScalar.
1212 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1213 d_scalar_mode and q_scalar_mode.
1214 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1215 (vmovsd): Use EXxmm_mq.
1216
ddc73fa9
NC		 12172020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1218
1219 PR 26204
1220 * arc-dis.c: Fix spelling mistake.
1221 * po/opcodes.pot: Regenerate.
1222
17550be7
NC		 12232020-07-06 Nick Clifton <nickc@redhat.com>
1224
1225 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1226 * po/uk.po: Updated Ukranian translation.
1227
b19d852d
NC		 12282020-07-04 Nick Clifton <nickc@redhat.com>
1229
1230 * configure: Regenerate.
1231 * po/opcodes.pot: Regenerate.
1232
b115b9fd
NC		 12332020-07-04 Nick Clifton <nickc@redhat.com>
1234
1235 Binutils 2.35 branch created.
1236
c2ecccb3
L		 12372020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1238
1239 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1240 * i386-opc.h (VexSwapSources): New.
1241 (i386_opcode_modifier): Add vexswapsources.
1242 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1243 with two source operands swapped.
1244 * i386-tbl.h: Regenerated.
1245
08ccfccf
NC		 12462020-06-30 Nelson Chu <nelson.chu@sifive.com>
1247
1248 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1249 unprivileged CSR can also be initialized.
1250
279edac5
AM		 12512020-06-29 Alan Modra <amodra@gmail.com>
1252
1253 * arm-dis.c: Use C style comments.
1254 * cr16-opc.c: Likewise.
1255 * ft32-dis.c: Likewise.
1256 * moxie-opc.c: Likewise.
1257 * tic54x-dis.c: Likewise.
1258 * s12z-opc.c: Remove useless comment.
1259 * xgate-dis.c: Likewise.
1260
e978ad62
L		 12612020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1262
1263 * i386-opc.tbl: Add a blank line.
1264
63112cd6
L		 12652020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1266
1267 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1268 (VecSIB128): Renamed to ...
1269 (VECSIB128): This.
1270 (VecSIB256): Renamed to ...
1271 (VECSIB256): This.
1272 (VecSIB512): Renamed to ...
1273 (VECSIB512): This.
1274 (VecSIB): Renamed to ...
1275 (SIB): This.
1276 (i386_opcode_modifier): Replace vecsib with sib.
79b32e73 1277 * i386-opc.tbl (VecSIB128): New.
63112cd6
L		 1278 (VecSIB256): Likewise.
1279 (VecSIB512): Likewise.
79b32e73 1280 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
63112cd6
L		 1281 and VecSIB512, respectively.
1282
d1c36125
JB		 12832020-06-26 Jan Beulich <jbeulich@suse.com>
1284
1285 * i386-dis.c: Adjust description of I macro.
1286 (x86_64_table): Drop use of I.
1287 (float_mem): Replace use of I.
1288 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1289
2a1bb84c
JB		 12902020-06-26 Jan Beulich <jbeulich@suse.com>
1291
1292 * i386-dis.c: (print_insn): Avoid straight assignment to
1293 priv.orig_sizeflag when processing -M sub-options.
1294
8f570d62
JB		 12952020-06-25 Jan Beulich <jbeulich@suse.com>
1296
1297 * i386-dis.c: Adjust description of J macro.
1298 (dis386, x86_64_table, mod_table): Replace J.
1299 (putop): Remove handling of J.
1300
464dc4af
JB		 13012020-06-25 Jan Beulich <jbeulich@suse.com>
1302
1303 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1304
589958d6
JB		 13052020-06-25 Jan Beulich <jbeulich@suse.com>
1306
1307 * i386-dis.c: Adjust description of "LQ" macro.
1308 (dis386_twobyte): Use LQ for sysret.
1309 (putop): Adjust handling of LQ.
1310
39ff0b81
NC		 13112020-06-22 Nelson Chu <nelson.chu@sifive.com>
1312
1313 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1314 * riscv-dis.c: Include elfxx-riscv.h.
1315
d27c357a
JB		 13162020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1317
1318 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1319
6fde587f
CL		 13202020-06-17 Lili Cui <lili.cui@intel.com>
1321
1322 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1323
efe30057
L		 13242020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1325
1326 PR gas/26115
1327 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1328 * i386-opc.tbl: Likewise.
1329 * i386-tbl.h: Regenerated.
1330
d8af286f
NC		 13312020-06-12 Nelson Chu <nelson.chu@sifive.com>
1332
1333 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1334
14962256
AC		 13352020-06-11 Alex Coplan <alex.coplan@arm.com>
1336
1337 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1338 (SR_CORE): Likewise.
1339 (SR_FEAT): Likewise.
1340 (SR_RNG): Likewise.
1341 (SR_V8_1): Likewise.
1342 (SR_V8_2): Likewise.
1343 (SR_V8_3): Likewise.
1344 (SR_V8_4): Likewise.
1345 (SR_PAN): Likewise.
1346 (SR_RAS): Likewise.
1347 (SR_SSBS): Likewise.
1348 (SR_SVE): Likewise.
1349 (SR_ID_PFR2): Likewise.
1350 (SR_PROFILE): Likewise.
1351 (SR_MEMTAG): Likewise.
1352 (SR_SCXTNUM): Likewise.
1353 (aarch64_sys_regs): Refactor to store feature information in the table.
1354 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1355 that now describe their own features.
1356 (aarch64_pstatefield_supported_p): Likewise.
1357
f9630fa6
L		 13582020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1359
1360 * i386-dis.c (prefix_table): Fix a typo in comments.
1361
73239888
JB		 13622020-06-09 Jan Beulich <jbeulich@suse.com>
1363
1364 * i386-dis.c (rex_ignored): Delete.
1365 (ckprefix): Drop rex_ignored initialization.
1366 (get_valid_dis386): Drop setting of rex_ignored.
1367 (print_insn): Drop checking of rex_ignored. Don't record data
1368 size prefix as used with VEX-and-alike encodings.
1369
18897deb
JB		 13702020-06-09 Jan Beulich <jbeulich@suse.com>
1371
1372 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1373 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1374 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1375 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1376 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1377 VEX_0F12, and VEX_0F16.
1378 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1379 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1380 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1381 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1382 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1383 MOD_VEX_0F16_PREFIX_2 entries.
1384
97e6786a
JB		 13852020-06-09 Jan Beulich <jbeulich@suse.com>
1386
1387 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1388 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1389 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1390 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1391 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1392 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1393 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1394 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1395 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1396 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1397 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1398 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1399 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1400 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1401 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1402 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1403 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1404 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1405 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1406 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1407 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1408 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1409 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1410 EVEX_W_0FC6_P_2): Delete.
1411 (print_insn): Add EVEX.W vs embedded prefix consistency check
1412 to prefix validation.
1413 * i386-dis-evex.h (evex_table): Don't further descend for
1414 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1415 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1416 and 0F2B.
1417 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1418 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1419 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1420 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1421 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1422 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1423 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1424 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1425 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1426 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1427 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1428 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1429 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1430 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1431 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1432 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1433 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1434 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1435 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1436 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1437 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1438 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1439 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1440 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1441 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1442 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1443 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1444
bf926894
JB		 14452020-06-09 Jan Beulich <jbeulich@suse.com>
1446
1447 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1448 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1449 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1450 vmovmskpX.
1451 (print_insn): Drop pointless check against bad_opcode. Split
1452 prefix validation into legacy and VEX-and-alike parts.
1453 (putop): Re-work 'X' macro handling.
1454
a5aaedb9
JB		 14552020-06-09 Jan Beulich <jbeulich@suse.com>
1456
1457 * i386-dis.c (MOD_0F51): Rename to ...
1458 (MOD_0F50): ... this.
1459
26417f19
AC		 14602020-06-08 Alex Coplan <alex.coplan@arm.com>
1461
1462 * arm-dis.c (arm_opcodes): Add dfb.
1463 (thumb32_opcodes): Add dfb.
1464
8a6fb3f9
JB		 14652020-06-08 Jan Beulich <jbeulich@suse.com>
1466
1467 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1468
1424c35d
AM		 14692020-06-06 Alan Modra <amodra@gmail.com>
1470
1471 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1472
d3d1cc7b
AM		 14732020-06-05 Alan Modra <amodra@gmail.com>
1474
1475 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1476 size is large enough.
1477
d8740be1
JM		 14782020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1479
1480 * disassemble.c (disassemble_init_for_target): Set endian_code for
1481 bpf targets.
1482 * bpf-desc.c: Regenerate.
1483 * bpf-opc.c: Likewise.
1484 * bpf-dis.c: Likewise.
1485
e9bffec9
JM		 14862020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1487
1488 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1489 (cgen_put_insn_value): Likewise.
1490 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1491 * cgen-dis.in (print_insn): Likewise.
1492 * cgen-ibld.in (insert_1): Likewise.
1493 (insert_1): Likewise.
1494 (insert_insn_normal): Likewise.
1495 (extract_1): Likewise.
1496 * bpf-dis.c: Regenerate.
1497 * bpf-ibld.c: Likewise.
1498 * bpf-ibld.c: Likewise.
1499 * cgen-dis.in: Likewise.
1500 * cgen-ibld.in: Likewise.
1501 * cgen-opc.c: Likewise.
1502 * epiphany-dis.c: Likewise.
1503 * epiphany-ibld.c: Likewise.
1504 * fr30-dis.c: Likewise.
1505 * fr30-ibld.c: Likewise.
1506 * frv-dis.c: Likewise.
1507 * frv-ibld.c: Likewise.
1508 * ip2k-dis.c: Likewise.
1509 * ip2k-ibld.c: Likewise.
1510 * iq2000-dis.c: Likewise.
1511 * iq2000-ibld.c: Likewise.
1512 * lm32-dis.c: Likewise.
1513 * lm32-ibld.c: Likewise.
1514 * m32c-dis.c: Likewise.
1515 * m32c-ibld.c: Likewise.
1516 * m32r-dis.c: Likewise.
1517 * m32r-ibld.c: Likewise.
1518 * mep-dis.c: Likewise.
1519 * mep-ibld.c: Likewise.
1520 * mt-dis.c: Likewise.
1521 * mt-ibld.c: Likewise.
1522 * or1k-dis.c: Likewise.
1523 * or1k-ibld.c: Likewise.
1524 * xc16x-dis.c: Likewise.
1525 * xc16x-ibld.c: Likewise.
1526 * xstormy16-dis.c: Likewise.
1527 * xstormy16-ibld.c: Likewise.
1528
b3db6d07
JM		 15292020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1530
1531 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1532 (print_insn_): Handle instruction endian.
1533 * bpf-dis.c: Regenerate.
1534 * bpf-desc.c: Regenerate.
1535 * epiphany-dis.c: Likewise.
1536 * epiphany-desc.c: Likewise.
1537 * fr30-dis.c: Likewise.
1538 * fr30-desc.c: Likewise.
1539 * frv-dis.c: Likewise.
1540 * frv-desc.c: Likewise.
1541 * ip2k-dis.c: Likewise.
1542 * ip2k-desc.c: Likewise.
1543 * iq2000-dis.c: Likewise.
1544 * iq2000-desc.c: Likewise.
1545 * lm32-dis.c: Likewise.
1546 * lm32-desc.c: Likewise.
1547 * m32c-dis.c: Likewise.
1548 * m32c-desc.c: Likewise.
1549 * m32r-dis.c: Likewise.
1550 * m32r-desc.c: Likewise.
1551 * mep-dis.c: Likewise.
1552 * mep-desc.c: Likewise.
1553 * mt-dis.c: Likewise.
1554 * mt-desc.c: Likewise.
1555 * or1k-dis.c: Likewise.
1556 * or1k-desc.c: Likewise.
1557 * xc16x-dis.c: Likewise.
1558 * xc16x-desc.c: Likewise.
1559 * xstormy16-dis.c: Likewise.
1560 * xstormy16-desc.c: Likewise.
1561
4ee4189f
NC		 15622020-06-03 Nick Clifton <nickc@redhat.com>
1563
1564 * po/sr.po: Updated Serbian translation.
1565
44730156
NC		 15662020-06-03 Nelson Chu <nelson.chu@sifive.com>
1567
1568 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1569 (riscv_get_priv_spec_class): Likewise.
1570
3c3d0376
AM		 15712020-06-01 Alan Modra <amodra@gmail.com>
1572
1573 * bpf-desc.c: Regenerate.
1574
78c1c354
JM		 15752020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1576 David Faust <david.faust@oracle.com>
1577
1578 * bpf-desc.c: Regenerate.
1579 * bpf-opc.h: Likewise.
1580 * bpf-opc.c: Likewise.
1581 * bpf-dis.c: Likewise.
1582
efcf5fb5
AM		 15832020-05-28 Alan Modra <amodra@gmail.com>
1584
1585 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1586 values.
1587
ab382d64
AM		 15882020-05-28 Alan Modra <amodra@gmail.com>
1589
1590 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1591 immediates.
1592 (print_insn_ns32k): Revert last change.
1593
151f5de4
NC		 15942020-05-28 Nick Clifton <nickc@redhat.com>
1595
1596 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1597 static.
1598
25e1eca8
SL		 15992020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1600
1601 Fix extraction of signed constants in nios2 disassembler (again).
1602
1603 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1604 extractions of signed fields.
1605
57b17940
SSF		 16062020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1607
1608 * s390-opc.txt: Relocate vector load/store instructions with
1609 additional alignment parameter and change architecture level
1610 constraint from z14 to z13.
1611
d96bf37b
AM		 16122020-05-21 Alan Modra <amodra@gmail.com>
1613
1614 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1615 * sparc-dis.c: Likewise.
1616 * tic4x-dis.c: Likewise.
1617 * xtensa-dis.c: Likewise.
1618 * bpf-desc.c: Regenerate.
1619 * epiphany-desc.c: Regenerate.
1620 * fr30-desc.c: Regenerate.
1621 * frv-desc.c: Regenerate.
1622 * ip2k-desc.c: Regenerate.
1623 * iq2000-desc.c: Regenerate.
1624 * lm32-desc.c: Regenerate.
1625 * m32c-desc.c: Regenerate.
1626 * m32r-desc.c: Regenerate.
1627 * mep-asm.c: Regenerate.
1628 * mep-desc.c: Regenerate.
1629 * mt-desc.c: Regenerate.
1630 * or1k-desc.c: Regenerate.
1631 * xc16x-desc.c: Regenerate.
1632 * xstormy16-desc.c: Regenerate.
1633
8f595e9b
NC		 16342020-05-20 Nelson Chu <nelson.chu@sifive.com>
1635
1636 * riscv-opc.c (riscv_ext_version_table): The table used to store
1637 all information about the supported spec and the corresponding ISA
1638 versions. Currently, only Zicsr is supported to verify the
1639 correctness of Z sub extension settings. Others will be supported
1640 in the future patches.
1641 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1642 classes and the corresponding strings.
1643 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1644 spec class by giving a ISA spec string.
1645 * riscv-opc.c (struct priv_spec_t): New structure.
1646 (struct priv_spec_t priv_specs): List for all supported privilege spec
1647 classes and the corresponding strings.
1648 (riscv_get_priv_spec_class): New function. Get the corresponding
1649 privilege spec class by giving a spec string.
1650 (riscv_get_priv_spec_name): New function. Get the corresponding
1651 privilege spec string by giving a CSR version class.
1652 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1653 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1654 according to the chosen version. Build a hash table riscv_csr_hash to
1655 store the valid CSR for the chosen pirv verison. Dump the direct
1656 CSR address rather than it's name if it is invalid.
1657 (parse_riscv_dis_option_without_args): New function. Parse the options
1658 without arguments.
1659 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1660 parse the options without arguments first, and then handle the options
1661 with arguments. Add the new option -Mpriv-spec, which has argument.
1662 * riscv-dis.c (print_riscv_disassembler_options): Add description
1663 about the new OBJDUMP option.
1664
3d205eb4
PB		 16652020-05-19 Peter Bergner <bergner@linux.ibm.com>
1666
1667 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1668 WC values on POWER10 sync, dcbf and wait instructions.
1669 (insert_pl, extract_pl): New functions.
1670 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1671 (LS3): New , 3-bit L for sync.
1672 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1673 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1674 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1675 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1676 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1677 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1678 <wait>: Enable PL operand on POWER10.
1679 <dcbf>: Enable L3OPT operand on POWER10.
1680 <sync>: Enable SC2 operand on POWER10.
1681
a501eb44
SH		 16822020-05-19 Stafford Horne <shorne@gmail.com>
1683
1684 PR 25184
1685 * or1k-asm.c: Regenerate.
1686 * or1k-desc.c: Regenerate.
1687 * or1k-desc.h: Regenerate.
1688 * or1k-dis.c: Regenerate.
1689 * or1k-ibld.c: Regenerate.
1690 * or1k-opc.c: Regenerate.
1691 * or1k-opc.h: Regenerate.
1692 * or1k-opinst.c: Regenerate.
1693
3b646889
AM		 16942020-05-11 Alan Modra <amodra@gmail.com>
1695
1696 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1697 xsmaxcqp, xsmincqp.
1698
9cc4ce88
AM		 16992020-05-11 Alan Modra <amodra@gmail.com>
1700
1701 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1702 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1703
5d57bc3f
AM		 17042020-05-11 Alan Modra <amodra@gmail.com>
1705
1706 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1707
66ef5847
AM		 17082020-05-11 Alan Modra <amodra@gmail.com>
1709
1710 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1711 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1712
4f3e9537
PB		 17132020-05-11 Peter Bergner <bergner@linux.ibm.com>
1714
1715 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1716 mnemonics.
1717
ec40e91c
AM		 17182020-05-11 Alan Modra <amodra@gmail.com>
1719
1720 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1721 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1722 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1723 (prefix_opcodes): Add xxeval.
1724
d7e97a76
AM		 17252020-05-11 Alan Modra <amodra@gmail.com>
1726
1727 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1728 xxgenpcvwm, xxgenpcvdm.
1729
fdefed7c
AM		 17302020-05-11 Alan Modra <amodra@gmail.com>
1731
1732 * ppc-opc.c (MP, VXVAM_MASK): Define.
1733 (VXVAPS_MASK): Use VXVA_MASK.
1734 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1735 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1736 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1737 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1738
aa3c112f
AM		 17392020-05-11 Alan Modra <amodra@gmail.com>
1740 Peter Bergner <bergner@linux.ibm.com>
1741
1742 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1743 New functions.
1744 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1745 YMSK2, XA6a, XA6ap, XB6a entries.
1746 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1747 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1748 (PPCVSX4): Define.
1749 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1750 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1751 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1752 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1753 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1754 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1755 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1756 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1757 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1758 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1759 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1760 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1761 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1762 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1763
6edbfd3b
AM		 17642020-05-11 Alan Modra <amodra@gmail.com>
1765
1766 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1767 (insert_xts, extract_xts): New functions.
1768 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1769 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1770 (VXRC_MASK, VXSH_MASK): Define.
1771 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1772 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1773 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1774 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1775 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1776 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1777 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1778
c7d7aea2
AM		 17792020-05-11 Alan Modra <amodra@gmail.com>
1780
1781 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1782 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1783 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1784 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1785 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1786
94ba9882
AM		 17872020-05-11 Alan Modra <amodra@gmail.com>
1788
1789 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1790 (XTP, DQXP, DQXP_MASK): Define.
1791 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1792 (prefix_opcodes): Add plxvp and pstxvp.
1793
f4791f1a
AM		 17942020-05-11 Alan Modra <amodra@gmail.com>
1795
1796 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1797 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1798 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1799
3ff0a5ba
PB		 18002020-05-11 Peter Bergner <bergner@linux.ibm.com>
1801
1802 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1803
afef4fe9
PB		 18042020-05-11 Peter Bergner <bergner@linux.ibm.com>
1805
1806 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1807 (L1OPT): Define.
1808 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1809
1224c05d
PB		 18102020-05-11 Peter Bergner <bergner@linux.ibm.com>
1811
1812 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1813
6bbb0c05
AM		 18142020-05-11 Alan Modra <amodra@gmail.com>
1815
1816 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1817
7c1f4227
AM		 18182020-05-11 Alan Modra <amodra@gmail.com>
1819
1820 * ppc-dis.c (ppc_opts): Add "power10" entry.
1821 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1822 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1823
73199c2b
NC		 18242020-05-11 Nick Clifton <nickc@redhat.com>
1825
1826 * po/fr.po: Updated French translation.
1827
09c1e68a
AC		 18282020-04-30 Alex Coplan <alex.coplan@arm.com>
1829
1830 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1831 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1832 (operand_general_constraint_met_p): validate
1833 AARCH64_OPND_UNDEFINED.
1834 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1835 for FLD_imm16_2.
1836 * aarch64-asm-2.c: Regenerated.
1837 * aarch64-dis-2.c: Regenerated.
1838 * aarch64-opc-2.c: Regenerated.
1839
9654d51a
NC		 18402020-04-29 Nick Clifton <nickc@redhat.com>
1841
1842 PR 22699
1843 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1844 and SETRC insns.
1845
c2e71e57
NC		 18462020-04-29 Nick Clifton <nickc@redhat.com>
1847
1848 * po/sv.po: Updated Swedish translation.
1849
5c936ef5
NC		 18502020-04-29 Nick Clifton <nickc@redhat.com>
1851
1852 PR 22699
1853 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1854 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1855 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1856 IMM0_8U case.
1857
bb2a1453
AS		 18582020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1859
1860 PR 25848
1861 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1862 cmpi only on m68020up and cpu32.
1863
c2e5c986
SD		 18642020-04-20 Sudakshina Das <sudi.das@arm.com>
1865
1866 * aarch64-asm.c (aarch64_ins_none): New.
1867 * aarch64-asm.h (ins_none): New declaration.
1868 * aarch64-dis.c (aarch64_ext_none): New.
1869 * aarch64-dis.h (ext_none): New declaration.
1870 * aarch64-opc.c (aarch64_print_operand): Update case for
1871 AARCH64_OPND_BARRIER_PSB.
1872 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1873 (AARCH64_OPERANDS): Update inserter/extracter for
1874 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1875 * aarch64-asm-2.c: Regenerated.
1876 * aarch64-dis-2.c: Regenerated.
1877 * aarch64-opc-2.c: Regenerated.
1878
8a6e1d1d
SD		 18792020-04-20 Sudakshina Das <sudi.das@arm.com>
1880
1881 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1882 (aarch64_feature_ras, RAS): Likewise.
1883 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1884 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1885 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1886 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1887 * aarch64-asm-2.c: Regenerated.
1888 * aarch64-dis-2.c: Regenerated.
1889 * aarch64-opc-2.c: Regenerated.
1890
e409955d
FS		 18912020-04-17 Fredrik Strupe <fredrik@strupe.net>
1892
1893 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1894 (print_insn_neon): Support disassembly of conditional
1895 instructions.
1896
c54a9b56
DF		 18972020-02-16 David Faust <david.faust@oracle.com>
1898
1899 * bpf-desc.c: Regenerate.
1900 * bpf-desc.h: Likewise.
1901 * bpf-opc.c: Regenerate.
1902 * bpf-opc.h: Likewise.
1903
bb651e8b
CL		 19042020-04-07 Lili Cui <lili.cui@intel.com>
1905
1906 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1907 (prefix_table): New instructions (see prefixes above).
1908 (rm_table): Likewise
1909 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1910 CPU_ANY_TSXLDTRK_FLAGS.
1911 (cpu_flags): Add CpuTSXLDTRK.
1912 * i386-opc.h (enum): Add CpuTSXLDTRK.
1913 (i386_cpu_flags): Add cputsxldtrk.
1914 * i386-opc.tbl: Add XSUSPLDTRK insns.
1915 * i386-init.h: Regenerate.
1916 * i386-tbl.h: Likewise.
1917
4b27d27c
L		 19182020-04-02 Lili Cui <lili.cui@intel.com>
1919
1920 * i386-dis.c (prefix_table): New instructions serialize.
1921 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1922 CPU_ANY_SERIALIZE_FLAGS.
1923 (cpu_flags): Add CpuSERIALIZE.
1924 * i386-opc.h (enum): Add CpuSERIALIZE.
1925 (i386_cpu_flags): Add cpuserialize.
1926 * i386-opc.tbl: Add SERIALIZE insns.
1927 * i386-init.h: Regenerate.
1928 * i386-tbl.h: Likewise.
1929
832a5807
AM		 19302020-03-26 Alan Modra <amodra@gmail.com>
1931
1932 * disassemble.h (opcodes_assert): Declare.
1933 (OPCODES_ASSERT): Define.
1934 * disassemble.c: Don't include assert.h. Include opintl.h.
1935 (opcodes_assert): New function.
1936 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1937 (bfd_h8_disassemble): Reduce size of data array. Correctly
1938 calculate maxlen. Omit insn decoding when insn length exceeds
1939 maxlen. Exit from nibble loop when looking for E, before
1940 accessing next data byte. Move processing of E outside loop.
1941 Replace tests of maxlen in loop with assertions.
1942
4c4addbe
AM		 19432020-03-26 Alan Modra <amodra@gmail.com>
1944
1945 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1946
a18cd0ca
AM		 19472020-03-25 Alan Modra <amodra@gmail.com>
1948
1949 * z80-dis.c (suffix): Init mybuf.
1950
57cb32b3
AM		 19512020-03-22 Alan Modra <amodra@gmail.com>
1952
1953 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1954 successflly read from section.
1955
beea5cc1
AM		 19562020-03-22 Alan Modra <amodra@gmail.com>
1957
1958 * arc-dis.c (find_format): Use ISO C string concatenation rather
1959 than line continuation within a string. Don't access needs_limm
1960 before testing opcode != NULL.
1961
03704c77
AM		 19622020-03-22 Alan Modra <amodra@gmail.com>
1963
1964 * ns32k-dis.c (print_insn_arg): Update comment.
1965 (print_insn_ns32k): Reduce size of index_offset array, and
1966 initialize, passing -1 to print_insn_arg for args that are not
1967 an index. Don't exit arg loop early. Abort on bad arg number.
1968
d1023b5d
AM		 19692020-03-22 Alan Modra <amodra@gmail.com>
1970
1971 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1972 * s12z-opc.c: Formatting.
1973 (operands_f): Return an int.
1974 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1975 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1976 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1977 (exg_sex_discrim): Likewise.
1978 (create_immediate_operand, create_bitfield_operand),
1979 (create_register_operand_with_size, create_register_all_operand),
1980 (create_register_all16_operand, create_simple_memory_operand),
1981 (create_memory_operand, create_memory_auto_operand): Don't
1982 segfault on malloc failure.
1983 (z_ext24_decode): Return an int status, negative on fail, zero
1984 on success.
1985 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1986 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1987 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1988 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1989 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1990 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1991 (loop_primitive_decode, shift_decode, psh_pul_decode),
1992 (bit_field_decode): Similarly.
1993 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1994 to return value, update callers.
1995 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1996 Don't segfault on NULL operand.
1997 (decode_operation): Return OP_INVALID on first fail.
1998 (decode_s12z): Check all reads, returning -1 on fail.
1999
340f3ac8
AM		 20002020-03-20 Alan Modra <amodra@gmail.com>
2001
2002 * metag-dis.c (print_insn_metag): Don't ignore status from
2003 read_memory_func.
2004
fe90ae8a
AM		 20052020-03-20 Alan Modra <amodra@gmail.com>
2006
2007 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
2008 Initialize parts of buffer not written when handling a possible
2009 2-byte insn at end of section. Don't attempt decoding of such
2010 an insn by the 4-byte machinery.
2011
833d919c
AM		 20122020-03-20 Alan Modra <amodra@gmail.com>
2013
2014 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
2015 partially filled buffer. Prevent lookup of 4-byte insns when
2016 only VLE 2-byte insns are possible due to section size. Print
2017 ".word" rather than ".long" for 2-byte leftovers.
2018
327ef784
NC		 20192020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
2020
2021 PR 25641
2022 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
2023
1673df32
JB		 20242020-03-13 Jan Beulich <jbeulich@suse.com>
2025
2026 * i386-dis.c (X86_64_0D): Rename to ...
2027 (X86_64_0E): ... this.
2028
384f3689
L		 20292020-03-09 H.J. Lu <hongjiu.lu@intel.com>
2030
2031 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
2032 * Makefile.in: Regenerated.
2033
865e2027
JB		 20342020-03-09 Jan Beulich <jbeulich@suse.com>
2035
2036 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
2037 3-operand pseudos.
2038 * i386-tbl.h: Re-generate.
2039
2f13234b
JB		 20402020-03-09 Jan Beulich <jbeulich@suse.com>
2041
2042 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
2043 vprot*, vpsha*, and vpshl*.
2044 * i386-tbl.h: Re-generate.
2045
3fabc179
JB		 20462020-03-09 Jan Beulich <jbeulich@suse.com>
2047
2048 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
2049 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
2050 * i386-tbl.h: Re-generate.
2051
3677e4c1
JB		 20522020-03-09 Jan Beulich <jbeulich@suse.com>
2053
2054 * i386-gen.c (set_bitfield): Ignore zero-length field names.
2055 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
2056 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
2057 * i386-tbl.h: Re-generate.
2058
4c4898e8
JB		 20592020-03-09 Jan Beulich <jbeulich@suse.com>
2060
2061 * i386-gen.c (struct template_arg, struct template_instance,
2062 struct template_param, struct template, templates,
2063 parse_template, expand_templates): New.
2064 (process_i386_opcodes): Various local variables moved to
2065 expand_templates. Call parse_template and expand_templates.
2066 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
2067 * i386-tbl.h: Re-generate.
2068
bc49bfd8
JB		 20692020-03-06 Jan Beulich <jbeulich@suse.com>
2070
2071 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
2072 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
2073 register and memory source templates. Replace VexW= by VexW*
2074 where applicable.
2075 * i386-tbl.h: Re-generate.
2076
4873e243
JB		 20772020-03-06 Jan Beulich <jbeulich@suse.com>
2078
2079 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
2080 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
2081 * i386-tbl.h: Re-generate.
2082
672a349b
JB		 20832020-03-06 Jan Beulich <jbeulich@suse.com>
2084
2085 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
2086 * i386-tbl.h: Re-generate.
2087
4ed21b58
JB		 20882020-03-06 Jan Beulich <jbeulich@suse.com>
2089
2090 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
2091 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
2092 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
2093 VexW0 on SSE2AVX variants.
2094 (vmovq): Drop NoRex64 from XMM/XMM variants.
2095 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
2096 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
2097 applicable use VexW0.
2098 * i386-tbl.h: Re-generate.
2099
643bb870
JB		 21002020-03-06 Jan Beulich <jbeulich@suse.com>
2101
2102 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
2103 * i386-opc.h (Rex64): Delete.
2104 (struct i386_opcode_modifier): Remove rex64 field.
2105 * i386-opc.tbl (crc32): Drop Rex64.
2106 Replace Rex64 with Size64 everywhere else.
2107 * i386-tbl.h: Re-generate.
2108
a23b33b3
JB		 21092020-03-06 Jan Beulich <jbeulich@suse.com>
2110
2111 * i386-dis.c (OP_E_memory): Exclude recording of used address
2112 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
2113 addressed memory operands for MPX insns.
2114
a0497384
JB		 21152020-03-06 Jan Beulich <jbeulich@suse.com>
2116
2117 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2118 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2119 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2120 (ptwrite): Split into non-64-bit and 64-bit forms.
2121 * i386-tbl.h: Re-generate.
2122
b630c145
JB		 21232020-03-06 Jan Beulich <jbeulich@suse.com>
2124
2125 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2126 template.
2127 * i386-tbl.h: Re-generate.
2128
a847e322
JB		 21292020-03-04 Jan Beulich <jbeulich@suse.com>
2130
2131 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2132 (prefix_table): Move vmmcall here. Add vmgexit.
2133 (rm_table): Replace vmmcall entry by prefix_table[] escape.
2134 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2135 (cpu_flags): Add CpuSEV_ES entry.
2136 * i386-opc.h (CpuSEV_ES): New.
2137 (union i386_cpu_flags): Add cpusev_es field.
2138 * i386-opc.tbl (vmgexit): New.
2139 * i386-init.h, i386-tbl.h: Re-generate.
2140
3cd7f3e3
L		 21412020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2142
2143 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2144 with MnemonicSize.
2145 * i386-opc.h (IGNORESIZE): New.
2146 (DEFAULTSIZE): Likewise.
2147 (IgnoreSize): Removed.
2148 (DefaultSize): Likewise.
2149 (MnemonicSize): New.
2150 (i386_opcode_modifier): Replace ignoresize/defaultsize with
2151 mnemonicsize.
2152 * i386-opc.tbl (IgnoreSize): New.
2153 (DefaultSize): Likewise.
2154 * i386-tbl.h: Regenerated.
2155
b8ba1385
SB		 21562020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2157
2158 PR 25627
2159 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2160 instructions.
2161
10d97a0f
L		 21622020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2163
2164 PR gas/25622
2165 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2166 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2167 * i386-tbl.h: Regenerated.
2168
dc1e8a47
AM		 21692020-02-26 Alan Modra <amodra@gmail.com>
2170
2171 * aarch64-asm.c: Indent labels correctly.
2172 * aarch64-dis.c: Likewise.
2173 * aarch64-gen.c: Likewise.
2174 * aarch64-opc.c: Likewise.
2175 * alpha-dis.c: Likewise.
2176 * i386-dis.c: Likewise.
2177 * nds32-asm.c: Likewise.
2178 * nfp-dis.c: Likewise.
2179 * visium-dis.c: Likewise.
2180
265b4673
CZ		 21812020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2182
2183 * arc-regs.h (int_vector_base): Make it available for all ARC
2184 CPUs.
2185
bd0cf5a6
NC		 21862020-02-20 Nelson Chu <nelson.chu@sifive.com>
2187
2188 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2189 changed.
2190
fa164239
JW		 21912020-02-19 Nelson Chu <nelson.chu@sifive.com>
2192
2193 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2194 c.mv/c.li if rs1 is zero.
2195
272a84b1
L		 21962020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2197
2198 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2199 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2200 CPU_POPCNT_FLAGS.
2201 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2202 * i386-opc.h (CpuABM): Removed.
2203 (CpuPOPCNT): New.
2204 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2205 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2206 popcnt. Remove CpuABM from lzcnt.
2207 * i386-init.h: Regenerated.
2208 * i386-tbl.h: Likewise.
2209
1f730c46
JB		 22102020-02-17 Jan Beulich <jbeulich@suse.com>
2211
2212 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2213 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2214 VexW1 instead of open-coding them.
2215 * i386-tbl.h: Re-generate.
2216
c8f8eebc
JB		 22172020-02-17 Jan Beulich <jbeulich@suse.com>
2218
2219 * i386-opc.tbl (AddrPrefixOpReg): Define.
2220 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2221 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2222 templates. Drop NoRex64.
2223 * i386-tbl.h: Re-generate.
2224
b9915cbc
JB		 22252020-02-17 Jan Beulich <jbeulich@suse.com>
2226
2227 PR gas/6518
2228 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2229 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2230 into Intel syntax instance (with Unpsecified) and AT&T one
2231 (without).
2232 (vcvtneps2bf16): Likewise, along with folding the two so far
2233 separate ones.
2234 * i386-tbl.h: Re-generate.
2235
ce504911
L		 22362020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2237
2238 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2239 CPU_ANY_SSE4A_FLAGS.
2240
dabec65d
AM		 22412020-02-17 Alan Modra <amodra@gmail.com>
2242
2243 * i386-gen.c (cpu_flag_init): Correct last change.
2244
af5c13b0
L		 22452020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2246
2247 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2248 CPU_ANY_SSE4_FLAGS.
2249
6867aac0
L		 22502020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2251
2252 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2253 (movzx): Likewise.
2254
65fca059
JB		 22552020-02-14 Jan Beulich <jbeulich@suse.com>
2256
2257 PR gas/25438
2258 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2259 destination for Cpu64-only variant.
2260 (movzx): Fold patterns.
2261 * i386-tbl.h: Re-generate.
2262
7deea9aa
JB		 22632020-02-13 Jan Beulich <jbeulich@suse.com>
2264
2265 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2266 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2267 CPU_ANY_SSE4_FLAGS entry.
2268 * i386-init.h: Re-generate.
2269
6c0946d0
JB		 22702020-02-12 Jan Beulich <jbeulich@suse.com>
2271
2272 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2273 with Unspecified, making the present one AT&T syntax only.
2274 * i386-tbl.h: Re-generate.
2275
ddb56fe6
JB		 22762020-02-12 Jan Beulich <jbeulich@suse.com>
2277
2278 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2279 * i386-tbl.h: Re-generate.
2280
5990e377
JB		 22812020-02-12 Jan Beulich <jbeulich@suse.com>
2282
2283 PR gas/24546
2284 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2285 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2286 Amd64 and Intel64 templates.
2287 (call, jmp): Likewise for far indirect variants. Dro
2288 Unspecified.
2289 * i386-tbl.h: Re-generate.
2290
50128d0c
JB		 22912020-02-11 Jan Beulich <jbeulich@suse.com>
2292
2293 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2294 * i386-opc.h (ShortForm): Delete.
2295 (struct i386_opcode_modifier): Remove shortform field.
2296 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2297 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2298 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2299 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2300 Drop ShortForm.
2301 * i386-tbl.h: Re-generate.
2302
1e05b5c4
JB		 23032020-02-11 Jan Beulich <jbeulich@suse.com>
2304
2305 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2306 fucompi): Drop ShortForm from operand-less templates.
2307 * i386-tbl.h: Re-generate.
2308
2f5dd314
AM		 23092020-02-11 Alan Modra <amodra@gmail.com>
2310
2311 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2312 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2313 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2314 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2315 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2316
5aae9ae9
MM		 23172020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2318
2319 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2320 (cde_opcodes): Add VCX* instructions.
2321
4934a27c
MM		 23222020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2323 Matthew Malcomson <matthew.malcomson@arm.com>
2324
2325 * arm-dis.c (struct cdeopcode32): New.
2326 (CDE_OPCODE): New macro.
2327 (cde_opcodes): New disassembly table.
2328 (regnames): New option to table.
2329 (cde_coprocs): New global variable.
2330 (print_insn_cde): New
2331 (print_insn_thumb32): Use print_insn_cde.
2332 (parse_arm_disassembler_options): Parse coprocN args.
2333
4b5aaf5f
L		 23342020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2335
2336 PR gas/25516
2337 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2338 with ISA64.
2339 * i386-opc.h (AMD64): Removed.
2340 (Intel64): Likewose.
2341 (AMD64): New.
2342 (INTEL64): Likewise.
2343 (INTEL64ONLY): Likewise.
2344 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2345 * i386-opc.tbl (Amd64): New.
2346 (Intel64): Likewise.
2347 (Intel64Only): Likewise.
2348 Replace AMD64 with Amd64. Update sysenter/sysenter with
2349 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2350 * i386-tbl.h: Regenerated.
2351
9fc0b501
SB		 23522020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2353
2354 PR 25469
2355 * z80-dis.c: Add support for GBZ80 opcodes.
2356
c5d7be0c
AM		 23572020-02-04 Alan Modra <amodra@gmail.com>
2358
2359 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2360
44e4546f
AM		 23612020-02-03 Alan Modra <amodra@gmail.com>
2362
2363 * m32c-ibld.c: Regenerate.
2364
b2b1453a
AM		 23652020-02-01 Alan Modra <amodra@gmail.com>
2366
2367 * frv-ibld.c: Regenerate.
2368
4102be5c
JB		 23692020-01-31 Jan Beulich <jbeulich@suse.com>
2370
2371 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2372 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2373 (OP_E_memory): Replace xmm_mdq_mode case label by
2374 vex_scalar_w_dq_mode one.
2375 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2376
825bd36c
JB		 23772020-01-31 Jan Beulich <jbeulich@suse.com>
2378
2379 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2380 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2381 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2382 (intel_operand_size): Drop vex_w_dq_mode case label.
2383
c3036ed0
RS		 23842020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2385
2386 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2387 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2388
0c115f84
AM		 23892020-01-30 Alan Modra <amodra@gmail.com>
2390
2391 * m32c-ibld.c: Regenerate.
2392
bd434cc4
JM		 23932020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2394
2395 * bpf-opc.c: Regenerate.
2396
aeab2b26
JB		 23972020-01-30 Jan Beulich <jbeulich@suse.com>
2398
2399 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2400 (dis386): Use them to replace C2/C3 table entries.
2401 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2402 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2403 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2404 * i386-tbl.h: Re-generate.
2405
62b3f548
JB		 24062020-01-30 Jan Beulich <jbeulich@suse.com>
2407
2408 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2409 forms.
2410 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2411 DefaultSize.
2412 * i386-tbl.h: Re-generate.
2413
1bd8ae10
AM		 24142020-01-30 Alan Modra <amodra@gmail.com>
2415
2416 * tic4x-dis.c (tic4x_dp): Make unsigned.
2417
bc31405e
L		 24182020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2419 Jan Beulich <jbeulich@suse.com>
2420
2421 PR binutils/25445
2422 * i386-dis.c (MOVSXD_Fixup): New function.
2423 (movsxd_mode): New enum.
2424 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2425 (intel_operand_size): Handle movsxd_mode.
2426 (OP_E_register): Likewise.
2427 (OP_G): Likewise.
2428 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2429 register on movsxd. Add movsxd with 16-bit destination register
2430 for AMD64 and Intel64 ISAs.
2431 * i386-tbl.h: Regenerated.
2432
7568c93b
TC		 24332020-01-27 Tamar Christina <tamar.christina@arm.com>
2434
2435 PR 25403
2436 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2437 * aarch64-asm-2.c: Regenerate
2438 * aarch64-dis-2.c: Likewise.
2439 * aarch64-opc-2.c: Likewise.
2440
c006a730
JB		 24412020-01-21 Jan Beulich <jbeulich@suse.com>
2442
2443 * i386-opc.tbl (sysret): Drop DefaultSize.
2444 * i386-tbl.h: Re-generate.
2445
c906a69a
JB		 24462020-01-21 Jan Beulich <jbeulich@suse.com>
2447
2448 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2449 Dword.
2450 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2451 * i386-tbl.h: Re-generate.
2452
26916852
NC		 24532020-01-20 Nick Clifton <nickc@redhat.com>
2454
2455 * po/de.po: Updated German translation.
2456 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2457 * po/uk.po: Updated Ukranian translation.
2458
4d6cbb64
AM		 24592020-01-20 Alan Modra <amodra@gmail.com>
2460
2461 * hppa-dis.c (fput_const): Remove useless cast.
2462
2bddb71a
AM		 24632020-01-20 Alan Modra <amodra@gmail.com>
2464
2465 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2466
1b1bb2c6
NC		 24672020-01-18 Nick Clifton <nickc@redhat.com>
2468
2469 * configure: Regenerate.
2470 * po/opcodes.pot: Regenerate.
2471
ae774686
NC		 24722020-01-18 Nick Clifton <nickc@redhat.com>
2473
2474 Binutils 2.34 branch created.
2475
07f1f3aa
CB		 24762020-01-17 Christian Biesinger <cbiesinger@google.com>
2477
2478 * opintl.h: Fix spelling error (seperate).
2479
42e04b36
L		 24802020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2481
2482 * i386-opc.tbl: Add {vex} pseudo prefix.
2483 * i386-tbl.h: Regenerated.
2484
2da2eaf4
AV		 24852020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2486
2487 PR 25376
2488 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2489 (neon_opcodes): Likewise.
2490 (select_arm_features): Make sure we enable MVE bits when selecting
2491 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2492 any architecture.
2493
d0849eed
JB		 24942020-01-16 Jan Beulich <jbeulich@suse.com>
2495
2496 * i386-opc.tbl: Drop stale comment from XOP section.
2497
9cf70a44
JB		 24982020-01-16 Jan Beulich <jbeulich@suse.com>
2499
2500 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2501 (extractps): Add VexWIG to SSE2AVX forms.
2502 * i386-tbl.h: Re-generate.
2503
4814632e
JB		 25042020-01-16 Jan Beulich <jbeulich@suse.com>
2505
2506 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2507 Size64 from and use VexW1 on SSE2AVX forms.
2508 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2509 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2510 * i386-tbl.h: Re-generate.
2511
aad09917
AM		 25122020-01-15 Alan Modra <amodra@gmail.com>
2513
2514 * tic4x-dis.c (tic4x_version): Make unsigned long.
2515 (optab, optab_special, registernames): New file scope vars.
2516 (tic4x_print_register): Set up registernames rather than
2517 malloc'd registertable.
2518 (tic4x_disassemble): Delete optable and optable_special. Use
2519 optab and optab_special instead. Throw away old optab,
2520 optab_special and registernames when info->mach changes.
2521
7a6bf3be
SB		 25222020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2523
2524 PR 25377
2525 * z80-dis.c (suffix): Use .db instruction to generate double
2526 prefix.
2527
ca1eaac0
AM		 25282020-01-14 Alan Modra <amodra@gmail.com>
2529
2530 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2531 values to unsigned before shifting.
2532
1d67fe3b
TT		 25332020-01-13 Thomas Troeger <tstroege@gmx.de>
2534
2535 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2536 flow instructions.
2537 (print_insn_thumb16, print_insn_thumb32): Likewise.
2538 (print_insn): Initialize the insn info.
2539 * i386-dis.c (print_insn): Initialize the insn info fields, and
2540 detect jumps.
2541
5e4f7e05
CZ		 25422012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2543
2544 * arc-opc.c (C_NE): Make it required.
2545
b9fe6b8a
CZ		 25462012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2547
2548 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2549 reserved register name.
2550
90dee485
AM		 25512020-01-13 Alan Modra <amodra@gmail.com>
2552
2553 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2554 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2555
febda64f
AM		 25562020-01-13 Alan Modra <amodra@gmail.com>
2557
2558 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2559 result of wasm_read_leb128 in a uint64_t and check that bits
2560 are not lost when copying to other locals. Use uint32_t for
2561 most locals. Use PRId64 when printing int64_t.
2562
df08b588
AM		 25632020-01-13 Alan Modra <amodra@gmail.com>
2564
2565 * score-dis.c: Formatting.
2566 * score7-dis.c: Formatting.
2567
b2c759ce
AM		 25682020-01-13 Alan Modra <amodra@gmail.com>
2569
2570 * score-dis.c (print_insn_score48): Use unsigned variables for
2571 unsigned values. Don't left shift negative values.
2572 (print_insn_score32): Likewise.
2573 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2574
5496abe1
AM		 25752020-01-13 Alan Modra <amodra@gmail.com>
2576
2577 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2578
202e762b
AM		 25792020-01-13 Alan Modra <amodra@gmail.com>
2580
2581 * fr30-ibld.c: Regenerate.
2582
7ef412cf
AM		 25832020-01-13 Alan Modra <amodra@gmail.com>
2584
2585 * xgate-dis.c (print_insn): Don't left shift signed value.
2586 (ripBits): Formatting, use 1u.
2587
7f578b95
AM		 25882020-01-10 Alan Modra <amodra@gmail.com>
2589
2590 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2591 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2592
441af85b
AM		 25932020-01-10 Alan Modra <amodra@gmail.com>
2594
2595 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2596 and XRREG value earlier to avoid a shift with negative exponent.
2597 * m10200-dis.c (disassemble): Similarly.
2598
bce58db4
NC		 25992020-01-09 Nick Clifton <nickc@redhat.com>
2600
2601 PR 25224
2602 * z80-dis.c (ld_ii_ii): Use correct cast.
2603
40c75bc8
SB		 26042020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2605
2606 PR 25224
2607 * z80-dis.c (ld_ii_ii): Use character constant when checking
2608 opcode byte value.
2609
d835a58b
JB		 26102020-01-09 Jan Beulich <jbeulich@suse.com>
2611
2612 * i386-dis.c (SEP_Fixup): New.
2613 (SEP): Define.
2614 (dis386_twobyte): Use it for sysenter/sysexit.
2615 (enum x86_64_isa): Change amd64 enumerator to value 1.
2616 (OP_J): Compare isa64 against intel64 instead of amd64.
2617 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2618 forms.
2619 * i386-tbl.h: Re-generate.
2620
030a2e78
AM		 26212020-01-08 Alan Modra <amodra@gmail.com>
2622
2623 * z8k-dis.c: Include libiberty.h
2624 (instr_data_s): Make max_fetched unsigned.
2625 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2626 Don't exceed byte_info bounds.
2627 (output_instr): Make num_bytes unsigned.
2628 (unpack_instr): Likewise for nibl_count and loop.
2629 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2630 idx unsigned.
2631 * z8k-opc.h: Regenerate.
2632
bb82aefe
SV		 26332020-01-07 Shahab Vahedi <shahab@synopsys.com>
2634
2635 * arc-tbl.h (llock): Use 'LLOCK' as class.
2636 (llockd): Likewise.
2637 (scond): Use 'SCOND' as class.
2638 (scondd): Likewise.
2639 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2640 (scondd): Likewise.
2641
cc6aa1a6
AM		 26422020-01-06 Alan Modra <amodra@gmail.com>
2643
2644 * m32c-ibld.c: Regenerate.
2645
660e62b1
AM		 26462020-01-06 Alan Modra <amodra@gmail.com>
2647
2648 PR 25344
2649 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2650 Peek at next byte to prevent recursion on repeated prefix bytes.
2651 Ensure uninitialised "mybuf" is not accessed.
2652 (print_insn_z80): Don't zero n_fetch and n_used here,..
2653 (print_insn_z80_buf): ..do it here instead.
2654
c9ae58fe
AM		 26552020-01-04 Alan Modra <amodra@gmail.com>
2656
2657 * m32r-ibld.c: Regenerate.
2658
5f57d4ec
AM		 26592020-01-04 Alan Modra <amodra@gmail.com>
2660
2661 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2662
2c5c1196
AM		 26632020-01-04 Alan Modra <amodra@gmail.com>
2664
2665 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2666
2e98c6c5
AM		 26672020-01-04 Alan Modra <amodra@gmail.com>
2668
2669 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2670
567dfba2
JB		 26712020-01-03 Jan Beulich <jbeulich@suse.com>
2672
5437a02a
JB		 2673 * aarch64-tbl.h (aarch64_opcode_table): Use
2674 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2675
26762020-01-03 Jan Beulich <jbeulich@suse.com>
2677
2678 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2
JB		 2679 forms of SUDOT and USDOT.
2680
8c45011a
JB		 26812020-01-03 Jan Beulich <jbeulich@suse.com>
2682
5437a02a 2683 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a
JB		 2684 uzip{1,2}.
2685 * opcodes/aarch64-dis-2.c: Re-generate.
2686
f4950f76
JB		 26872020-01-03 Jan Beulich <jbeulich@suse.com>
2688
5437a02a 2689 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76
JB		 2690 FMMLA encoding.
2691 * opcodes/aarch64-dis-2.c: Re-generate.
2692
6655dba2
SB		 26932020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2694
2695 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2696
b14ce8bf
AM		 26972020-01-01 Alan Modra <amodra@gmail.com>
2698
2699 Update year range in copyright notice of all files.
2700
0b114740 2701For older changes see ChangeLog-2019
3499769a 2702\f
0b114740 2703Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM		 2704
2705Copying and distribution of this file, with or without modification,
2706are permitted in any medium without royalty provided the copyright
2707notice and this notice are preserved.
2708
2709Local Variables:
2710mode: change-log
2711left-margin: 8
2712fill-column: 74
2713version-control: never
2714End:
GDB Binutils - Deliverables
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