opcodes: blackfin: handle memory read errors
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
ba329817
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12014-08-13 Mike Frysinger <vapier@gentoo.org>
2
3 * bfin-dis.c (ifetch): New function.
4 (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
5 -1 when it errors.
6
43885403
MF
72014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
8
9 * micromips-opc.c (COD): Rename throughout to...
10 (CM): New define, update to use INSN_COPROC_MOVE.
11 (LCD): Rename throughout to...
12 (LC): New define, update to use INSN_LOAD_COPROC.
13 * mips-opc.c: Likewise.
14
351cdf24
MF
152014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
16
17 * micromips-opc.c (COD, LCD) New macros.
18 (cfc1, ctc1): Remove FP_S attribute.
19 (dmfc1, mfc1, mfhc1): Add LCD attribute.
20 (dmtc1, mtc1, mthc1): Add COD attribute.
21 * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
22
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232014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
24 Alexander Ivchenko <alexander.ivchenko@intel.com>
25 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
26 Sergey Lega <sergey.s.lega@intel.com>
27 Anna Tikhonova <anna.tikhonova@intel.com>
28 Ilya Tocar <ilya.tocar@intel.com>
29 Andrey Turetskiy <andrey.turetskiy@intel.com>
30 Ilya Verbin <ilya.verbin@intel.com>
31 Kirill Yukhin <kirill.yukhin@intel.com>
32 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
33
34 * i386-dis-evex.h: Updated.
35 * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
36 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
37 PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
38 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
39 PREFIX_EVEX_0F3A67.
40 (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
41 VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
42 (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
43 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
44 EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
45 EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
46 EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
47 EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
48 EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
49 (prefix_table): Add entries for new instructions.
50 (vex_len_table): Ditto.
51 (vex_w_table): Ditto.
52 (OP_E_memory): Update xmmq_mode handling.
53 * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
54 (cpu_flags): Add CpuAVX512DQ.
55 * i386-init.h: Regenerared.
56 * i386-opc.h (CpuAVX512DQ): New.
57 (i386_cpu_flags): Add cpuavx512dq.
58 * i386-opc.tbl: Add AVX512DQ instructions.
59 * i386-tbl.h: Regenerate.
60
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612014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
62 Alexander Ivchenko <alexander.ivchenko@intel.com>
63 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
64 Sergey Lega <sergey.s.lega@intel.com>
65 Anna Tikhonova <anna.tikhonova@intel.com>
66 Ilya Tocar <ilya.tocar@intel.com>
67 Andrey Turetskiy <andrey.turetskiy@intel.com>
68 Ilya Verbin <ilya.verbin@intel.com>
69 Kirill Yukhin <kirill.yukhin@intel.com>
70 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
71
72 * i386-dis-evex.h: Add new instructions (prefixes bellow).
73 * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
74 (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
75 (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
76 PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
77 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
78 PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
79 PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
80 PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
81 PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
82 PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
83 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
84 PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
85 PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
86 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
87 PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
88 PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
89 PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
90 PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
91 PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
92 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
93 PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
94 PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
95 (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
96 VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
97 VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
98 VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
99 VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
100 VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
101 VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
102 VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
103 VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
104 VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
105 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
106 (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
107 EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
108 EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
109 EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
110 EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
111 EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
112 EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
113 (prefix_table): Add entries for new instructions.
114 (vex_table) : Ditto.
115 (vex_len_table): Ditto.
116 (vex_w_table): Ditto.
117 (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
118 mask_bd_mode handling.
119 (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
120 handling.
121 (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
122 handling.
123 (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
124 (OP_EX): Add dqw_swap_mode handling.
125 (OP_VEX): Add mask_bd_mode handling.
126 (OP_Mask): Add mask_bd_mode handling.
127 * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
128 (cpu_flags): Add CpuAVX512BW.
129 * i386-init.h: Regenerated.
130 * i386-opc.h (CpuAVX512BW): New.
131 (i386_cpu_flags): Add cpuavx512bw.
132 * i386-opc.tbl: Add AVX512BW instructions.
133 * i386-tbl.h: Regenerate.
134
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1352014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
136 Alexander Ivchenko <alexander.ivchenko@intel.com>
137 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
138 Sergey Lega <sergey.s.lega@intel.com>
139 Anna Tikhonova <anna.tikhonova@intel.com>
140 Ilya Tocar <ilya.tocar@intel.com>
141 Andrey Turetskiy <andrey.turetskiy@intel.com>
142 Ilya Verbin <ilya.verbin@intel.com>
143 Kirill Yukhin <kirill.yukhin@intel.com>
144 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
145
146 * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
147 * i386-tbl.h: Regenerate.
148
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1492014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
150 Alexander Ivchenko <alexander.ivchenko@intel.com>
151 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
152 Sergey Lega <sergey.s.lega@intel.com>
153 Anna Tikhonova <anna.tikhonova@intel.com>
154 Ilya Tocar <ilya.tocar@intel.com>
155 Andrey Turetskiy <andrey.turetskiy@intel.com>
156 Ilya Verbin <ilya.verbin@intel.com>
157 Kirill Yukhin <kirill.yukhin@intel.com>
158 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
159
160 * i386-dis.c (intel_operand_size): Support 128/256 length in
161 vex_vsib_q_w_dq_mode.
162 (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
163 * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
164 (cpu_flags): Add CpuAVX512VL.
165 * i386-init.h: Regenerated.
166 * i386-opc.h (CpuAVX512VL): New.
167 (i386_cpu_flags): Add cpuavx512vl.
168 (BROADCAST_1TO4, BROADCAST_1TO2): Define.
169 * i386-opc.tbl: Add AVX512VL instructions.
170 * i386-tbl.h: Regenerate.
171
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1722014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
173
174 * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
175 * or1k-opinst.c: Regenerate.
176
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1772014-07-08 Ilya Tocar <ilya.tocar@intel.com>
178
179 * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
180 (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
181
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1822014-07-04 Alan Modra <amodra@gmail.com>
183
184 * configure.ac: Rename from configure.in.
185 * Makefile.in: Regenerate.
186 * config.in: Regenerate.
187
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1882014-07-04 Alan Modra <amodra@gmail.com>
189
190 * configure.in: Include bfd/version.m4.
191 (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
192 (BFD_VERSION): Delete.
193 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
194 * configure: Regenerate.
195 * Makefile.in: Regenerate.
196
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1972014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
198 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
199 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
200 Soundararajan <Sounderarajan.D@atmel.com>
201
202 * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
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AM
203 (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
204 machine is not avrtiny.
f36e8886 205
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2062014-06-26 Philippe De Muyter <phdm@macqel.be>
207
208 * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
209 constants.
210
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2112014-06-12 Alan Modra <amodra@gmail.com>
212
213 * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
214 * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
215
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2162014-06-10 H.J. Lu <hongjiu.lu@intel.com>
217
218 * i386-dis.c (fwait_prefix): New.
219 (ckprefix): Set fwait_prefix.
220 (print_insn): Properly print prefixes before fwait.
221
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2222014-06-07 Alan Modra <amodra@gmail.com>
223
224 * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
225
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2262014-06-05 Joel Brobecker <brobecker@adacore.com>
227
228 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
229 bfd's development.sh.
230 * Makefile.in, configure: Regenerate.
231
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2322014-06-03 Nick Clifton <nickc@redhat.com>
233
234 * msp430-dis.c (msp430_doubleoperand): Use extension_word to
235 decide when extended addressing is being used.
236
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2372014-06-02 Eric Botcazou <ebotcazou@adacore.com>
238
239 * sparc-opc.c (cas): Disable for LEON.
240 (casl): Likewise.
241
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2422014-05-20 Alan Modra <amodra@gmail.com>
243
244 * m68k-dis.c: Don't include setjmp.h.
245
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2462014-05-09 H.J. Lu <hongjiu.lu@intel.com>
247
248 * i386-dis.c (ADDR16_PREFIX): Removed.
249 (ADDR32_PREFIX): Likewise.
250 (DATA16_PREFIX): Likewise.
251 (DATA32_PREFIX): Likewise.
252 (prefix_name): Updated.
253 (print_insn): Simplify data and address size prefixes processing.
254
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2552014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
256
257 * or1k-desc.c: Regenerated.
258 * or1k-desc.h: Likewise.
259 * or1k-opc.c: Likewise.
260 * or1k-opc.h: Likewise.
261 * or1k-opinst.c: Likewise.
262
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2632014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
264
265 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
266 (I34): New define.
267 (I36): New define.
268 (I66): New define.
269 (I68): New define.
270 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
271 mips64r5.
272 (parse_mips_dis_option): Update MSA and virtualization support to
9f445129 273 allow mips64r3 and mips64r5.
ae52f483 274
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2752014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
276
277 * mips-opc.c (G3): Remove I4.
278
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2792014-05-05 H.J. Lu <hongjiu.lu@intel.com>
280
281 PR binutils/16893
282 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
283 (end_codep): Likewise.
284 (mandatory_prefix): Likewise.
285 (active_seg_prefix): Likewise.
286 (ckprefix): Set active_seg_prefix to the active segment register
287 prefix.
288 (seg_prefix): Removed.
289 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
290 for prefix index. Ignore the index if it is invalid and the
291 mandatory prefix isn't required.
292 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
293 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
294 in used_prefixes here. Don't print unused prefixes. Check
295 active_seg_prefix for the active segment register prefix.
296 Restore the DFLAG bit in sizeflag if the data size prefix is
297 unused. Check the unused mandatory PREFIX_XXX prefixes
298 (append_seg): Only print the segment register which gets used.
299 (OP_E_memory): Check active_seg_prefix for the segment register
300 prefix.
301 (OP_OFF): Likewise.
302 (OP_OFF64): Likewise.
303 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
304
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3052014-05-02 H.J. Lu <hongjiu.lu@intel.com>
306
307 PR binutils/16886
308 * config.in: Regenerated.
309 * configure: Likewise.
310 * configure.in: Check if sigsetjmp is available.
311 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
312 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
313 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
314 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
315 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
316 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
317 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
318 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
319 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
320 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
321 (OPCODES_SIGSETJMP): Likewise.
322 (OPCODES_SIGLONGJMP): Likewise.
323 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
324 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
325 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
326 * xtensa-dis.c (dis_private): Replace jmp_buf with
327 OPCODES_SIGJMP_BUF.
328 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
329 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
330 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
331 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
332 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
333
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3342014-05-01 H.J. Lu <hongjiu.lu@intel.com>
335
336 PR binutils/16891
337 * i386-dis.c (print_insn): Handle prefixes before fwait.
338
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3392014-04-26 Alan Modra <amodra@gmail.com>
340
341 * po/POTFILES.in: Regenerate.
342
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3432014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
344
345 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
346 to allow the MIPS XPA ASE.
347 (parse_mips_dis_option): Process the -Mxpa option.
348 * mips-opc.c (XPA): New define.
349 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
350 locations of the ctc0 and cfc0 instructions.
351
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3522014-04-22 Christian Svensson <blue@cmd.nu>
353
354 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
355 * configure.in: Likewise.
356 * disassemble.c: Likewise.
357 * or1k-asm.c: New file.
358 * or1k-desc.c: New file.
359 * or1k-desc.h: New file.
360 * or1k-dis.c: New file.
361 * or1k-ibld.c: New file.
362 * or1k-opc.c: New file.
363 * or1k-opc.h: New file.
364 * or1k-opinst.c: New file.
365 * Makefile.in: Regenerate.
366 * configure: Regenerate.
367 * openrisc-asm.c: Delete.
368 * openrisc-desc.c: Delete.
369 * openrisc-desc.h: Delete.
370 * openrisc-dis.c: Delete.
371 * openrisc-ibld.c: Delete.
372 * openrisc-opc.c: Delete.
373 * openrisc-opc.h: Delete.
374 * or32-dis.c: Delete.
375 * or32-opc.c: Delete.
376
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3772014-04-04 Ilya Tocar <ilya.tocar@intel.com>
378
379 * i386-dis.c (rm_table): Add encls, enclu.
380 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
381 (cpu_flags): Add CpuSE1.
382 * i386-opc.h (enum): Add CpuSE1.
383 (i386_cpu_flags): Add cpuse1.
384 * i386-opc.tbl: Add encls, enclu.
385 * i386-init.h: Regenerated.
386 * i386-tbl.h: Likewise.
387
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3882014-04-02 Anthony Green <green@moxielogic.com>
389
390 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
391 instructions, sex.b and sex.s.
392
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3932014-03-26 Jiong Wang <jiong.wang@arm.com>
394
395 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
396 instructions.
397
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3982014-03-20 Ilya Tocar <ilya.tocar@intel.com>
399
400 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
401 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
402 vscatterqps.
403 * i386-tbl.h: Regenerate.
404
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4052014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
406
407 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
408 %hstick_enable added.
409
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4102014-03-19 Nick Clifton <nickc@redhat.com>
411
412 * rx-decode.opc (bwl): Allow for bogus instructions with a size
413 field of 3.
b41c812c 414 (sbwl, ubwl, SCALE): Likewise.
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415 * rx-decode.c: Regenerate.
416
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4172014-03-12 Alan Modra <amodra@gmail.com>
418
419 * Makefile.in: Regenerate.
420
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4212014-03-05 Alan Modra <amodra@gmail.com>
422
423 Update copyright years.
424
cd0c81e9 4252014-03-04 Heiher <r@hev.cc>
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RS
426
427 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
428
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4292014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
430
431 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
432 so that they come after the Loongson extensions.
433
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4342014-03-03 Alan Modra <amodra@gmail.com>
435
436 * i386-gen.c (process_copyright): Emit copyright notice on one line.
437
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4382014-02-28 Alan Modra <amodra@gmail.com>
439
440 * msp430-decode.c: Regenerate.
441
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4422014-02-27 Jiong Wang <jiong.wang@arm.com>
443
444 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
445 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
446
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4472014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
448
449 * aarch64-opc.c (print_register_offset_address): Call
450 get_int_reg_name to prepare the register name.
451
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4522014-02-25 Ilya Tocar <ilya.tocar@intel.com>
453
454 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
455 * i386-tbl.h: Regenerate.
456
4572014-02-20 Ilya Tocar <ilya.tocar@intel.com>
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IT
458
459 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
460 (cpu_flags): Add CpuPREFETCHWT1.
461 * i386-init.h: Regenerate.
462 * i386-opc.h (CpuPREFETCHWT1): New.
463 (i386_cpu_flags): Add cpuprefetchwt1.
464 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
465 * i386-tbl.h: Regenerate.
466
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IT
4672014-02-20 Ilya Tocar <ilya.tocar@intel.com>
468
469 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
470 to CpuAVX512F.
471 * i386-tbl.h: Regenerate.
472
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4732014-02-19 H.J. Lu <hongjiu.lu@intel.com>
474
475 * i386-gen.c (output_cpu_flags): Don't output trailing space.
476 (output_opcode_modifier): Likewise.
477 (output_operand_type): Likewise.
478 * i386-init.h: Regenerated.
479 * i386-tbl.h: Likewise.
480
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4812014-02-12 Ilya Tocar <ilya.tocar@intel.com>
482
483 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
484 MOD_0FC7_REG_5.
485 (PREFIX enum): Add PREFIX_0FAE_REG_7.
486 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
487 (prefix_table): Add clflusopt.
488 (mod_table): Add xrstors, xsavec, xsaves.
489 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
490 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
491 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
492 * i386-init.h: Regenerate.
493 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
494 xsaves64, xsavec, xsavec64.
495 * i386-tbl.h: Regenerate.
496
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4972014-02-10 Alan Modra <amodra@gmail.com>
498
499 * po/POTFILES.in: Regenerate.
500 * po/opcodes.pot: Regenerate.
501
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5022014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
503 Jan Beulich <jbeulich@suse.com>
504
505 PR binutils/16490
506 * i386-dis.c (OP_E_memory): Fix shift computation for
507 vex_vsib_q_w_dq_mode.
508
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RM
5092014-01-09 Bradley Nelson <bradnelson@google.com>
510 Roland McGrath <mcgrathr@google.com>
511
512 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
513 last_rex_prefix is -1.
514
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L
5152014-01-08 H.J. Lu <hongjiu.lu@intel.com>
516
517 * i386-gen.c (process_copyright): Update copyright year to 2014.
518
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5192014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
520
521 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
522
5fb776a6 523For older changes see ChangeLog-2013
252b5132 524\f
5fb776a6 525Copyright (C) 2014 Free Software Foundation, Inc.
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526
527Copying and distribution of this file, with or without modification,
528are permitted in any medium without royalty provided the copyright
529notice and this notice are preserved.
530
252b5132 531Local Variables:
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532mode: change-log
533left-margin: 8
534fill-column: 74
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535version-control: never
536End:
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