Check destination operand for lockable instructions.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
2a70cca4
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12009-11-13 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-dis.c (print_insn): Check rex_ignored.
4
f16cd0d5
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52009-11-13 H.J. Lu <hongjiu.lu@intel.com>
6
7 * i386-dis.c (ckprefix): Updated to return 0 if number of
8 prefixes > 14 and record the last position for each prefix.
9 (lock_prefix): Removed.
10 (data_prefix): Likewise.
11 (addr_prefix): Likewise.
12 (repz_prefix): Likewise.
13 (repnz_prefix): Likewise.
14 (last_lock_prefix): New.
15 (last_repz_prefix): Likewise.
16 (last_repnz_prefix): Likewise.
17 (last_data_prefix): Likewise.
18 (last_addr_prefix): Likewise.
19 (last_rex_prefix): Likewise.
20 (last_seg_prefix): Likewise.
21 (MAX_CODE_LENGTH): Likewise.
22 (ADDR16_PREFIX): Likewise.
23 (ADDR32_PREFIX): Likewise.
24 (DATA16_PREFIX): Likewise.
25 (DATA32_PREFIX): Likewise.
26 (REP_PREFIX): Likewise.
27 (seg_prefix): Likewise.
28 (all_prefixes): Change size to MAX_CODE_LENGTH - 1.
29 (prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
30 DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
31 (get_valid_dis386): Updated.
32 (OP_C): Likewise.
33 (OP_Monitor): Likewise.
34 (REP_Fixup): Likewise.
35 (print_insn): Display all prefixes.
36 (putop): Set PREFIX_DATA on used_prefixes only if it is used.
37 (intel_operand_size): Likewise.
38 (OP_E_register): Likewise.
39 (OP_G): Likewise.
40 (OP_REG): Likewise.
41 (OP_IMREG): Likewise.
42 (OP_I): Likewise.
43 (OP_I64): Likewise.
44 (OP_sI): Likewise.
45 (CRC32_Fixup): Likewise.
46 (MOVBE_Fixup): Likewise.
47 (OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
48 in 16bit mode.
49 (OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
50 used_prefixes only if it is used.
51
20efc689
L
522009-11-12 H.J. Lu <hongjiu.lu@intel.com>
53
54 * i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
55 or, sbb, sub, xor and xchg with register only operands.
56 * i386-tbl.h: Regenerated.
57
c32fa91d
L
582009-11-12 H.J. Lu <hongjiu.lu@intel.com>
59
60 * i386-gen.c (opcode_modifiers): Add IsLockable.
61
62 * i386-opc.h (IsLockable): New.
63 (i386_opcode_modifier): Add islockable.
64
65 * i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
66 bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
67 xor, xadd and xchg.
68 * i386-tbl.h: Regenerated.
69
79862e45
DJ
702009-11-12 Daniel Jacobowitz <dan@codesourcery.com>
71
72 * arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove
73 generic coprocessor instructions for FPA loads and stores.
74 (print_insn_coprocessor): Remove %C support. Display address for
75 PC-relative offsets in %A.
76
f310f33d
L
772009-11-11 H.J. Lu <hongjiu.lu@intel.com>
78
79 * i386-dis.c (all_prefixes): New.
80 (ckprefix): Set all_prefixes.
81 (print_insn): Print all_prefixes instead of lock_prefix,
82 repz_prefix, repnz_prefix, addr_prefix and data_prefix.
83
c1e26897
NC
842009-11-11 Nick Clifton <nickc@redhat.com>
85
86 PR binutils/10924
87 * arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
88 (print_insn_arm): Extend %s format control code to check for
89 unpredictable addressing modes. Add support for %S format control
90 code which suppresses this check.
91 (W_BIT, I_BIT, U_BIT, P_BIT): New macros.
92 (WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
93 PRE_BIT_SET): New macros.
94 (print_insn_coprocessor): Use the new macros instead of magic
95 constants.
96 (print_arm_address): Likewise.
97 (pirnt_insn_arm): Likewise.
98 (print_insn_thumb32): Likewise.
99
41327c9d
NC
1002009-11-11 Nick Clifton <nickc@redhat.com>
101
102 * po/id.po: Updated Indonesian translation.
103
0d999f33
MK
1042009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com>
105
106 * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
107
c48244a5
SP
1082009-11-06 Sebastian Pop <sebastian.pop@amd.com>
109
110 * i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
111 reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
112 B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
113 the xop_table.
114 (get_valid_dis386): Removed unused condition (from cut/n/paste) for
115 XOP instructions.
116
f88c9eb0
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1172009-11-05 Sebastian Pop <sebastian.pop@amd.com>
118 Quentin Neill <quentin.neill@amd.com>
119
120 * opcodes/i386-dis.c (OP_LWPCB_E): New.
121 (OP_LWP_E): New.
122 (OP_LWP_I): New.
123 (USE_XOP_8F_TABLE): New.
124 (XOP_8F_TABLE): New.
125 (REG_XOP_LWPCB): New.
126 (REG_XOP_LWP): New.
127 (XOP_09): New.
128 (XOP_0A): New.
129 (reg_table): Redirect REG_8F to XOP_8F_TABLE.
130 Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
131 (xop_table): New.
132 (get_valid_dis386): Handle USE_XOP_8F_TABLE.
133 Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
134 to access to the vex_table.
135 (OP_LWPCB_E): New.
136 (OP_LWP_E): New.
137 (OP_LWP_I): New.
138 * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
139 (cpu_flags): Add CpuLWP.
140 (opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
141 * opcodes/i386-opc.h (CpuLWP): New.
142 (i386_cpu_flags): Add bit cpulwp.
143 (VexLWP): New.
144 (XOP09): New.
145 (XOP0A): New.
146 (i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
147 * opcodes/i386-opc.tbl (llwpcb): Added.
148 (lwpval): Added.
149 (lwpins): Added.
150
0d734b5d
DD
1512009-11-04 DJ Delorie <dj@redhat.com>
152
153 * rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
154 (mvtcp, mvfcp, opecp): Remove.
155 * rx-decode.c: Regenerate.
156 * rx-dis.c (cpen): Remove.
157
d51b88d3
DE
1582009-11-03 Doug Evans <dje@sebabeach.org>
159
160 * m32c-desc.c: Regenerate.
161 * mep-desc.c: Regenerate.
162
62f3b8c8
PB
1632009-11-02 Paul Brook <paul@codesourcery.com>
164
165 * arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
166 Add VFPv4 instructions.
167
206c2556
L
1682009-10-29 Sebastian Pop <sebastian.pop@amd.com>
169
170 * i386-dis.c (OP_VEX_FMA): Removed.
171 (VexFMA): Removed.
172 (Vex128FMA): Removed.
173 (prefix_table): First source operand of FMA4 insns is decoded
174 with Vex not with VexFMA.
175 (OP_EX_VexW): Second source operand is decoded with get_vex_imm8
176 when vex.w is set. Third source operand is decoded with
177
a2b2318d
AM
1782009-10-27 Alan Modra <amodra@bigpond.net.au>
179
180 * Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.
181 * Makefile.in: Regenerate.
182 * po/POTFILES.in: Regenerate.
183
ac1e9eca
DE
1842009-10-23 Doug Evans <dje@sebabeach.org>
185
186 * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h.
187 * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h.
188 * cgen-bitset.c: Update.
189 * fr30-desc.h: Regenerate.
190 * frv-desc.h: Regenerate.
191 * ip2k-desc.h: Regenerate.
192 * iq2000-desc.h: Regenerate.
193 * lm32-desc.h: Regenerate.
194 * m32c-desc.h: Regenerate.
195 * m32c-opc.h: Regenerate.
196 * m32r-desc.h: Regenerate.
197 * mep-desc.h: Regenerate.
198 * mt-desc.h: Regenerate.
199 * openrisc-desc.h: Regenerate.
200 * xc16x-desc.h: Regenerate.
201 * xstormy16-desc.h: Regenerate.
202
f282425e
DD
2032009-10-22 DJ Delorie <dj@redhat.com>
204
205 * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
206 * rx-decode.c: Regenerated.
207
4b06377f
L
2082009-10-20 H.J. Lu <hongjiu.lu@intel.com>
209
210 PR gas/10775
211 * i386-dis.c: Document LB, LS and LV macros.
212 (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
213 with the 64-bit displacement or immediate operand.
214 (putop): Handle LB, LS and LV macros.
215
cedb97b6
DE
2162009-10-18 Doug Evans <dje@sebabeach.org>
217
218 * lm32-opinst.c: Regenerate.
219 * m32c-desc.c: Regenerate.
220 * m32r-opinst.c: Regenerate.
221 * openrisc-ibld.c: Regenerate.
222 * xc16x-desc.c: Regenerate.
223 * xc16x-desc.h: Regenerate.
224
d1119f7a
DE
2252009-10-17 Doug Evans <dje@sebabeach.org>
226
227 * Makefile.am (CGEN_CPUS): Add iq2000, lm32.
228 (FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are
229 sorted alphabetically.
230 (stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen
231 stamp-* rules are sorted alphabetically.
232 * Makefile.in: Regenerate.
233
52a6c1fe
L
2342009-10-16 H.J. Lu <hongjiu.lu@intel.com>
235
236 * i386-opc.h: Use enum instead of nested macros.
237
3873ba12
L
2382009-10-16 H.J. Lu <hongjiu.lu@intel.com>
239
240 * i386-dis.c: Simplify enums.
241
51e7da1b
L
2422009-10-15 H.J. Lu <hongjiu.lu@intel.com>
243 Ineiev <ineiev@gmail.com>
244
245 PR binutils/10767
246 * i386-dis.c: Use enum instead of nested macros.
247
c39846ed
L
2482009-10-15 H.J. Lu <hongjiu.lu@intel.com>
249
250 * i386-dis.c (MAX_BYTEMODE): Removed.
251
6a327e17
AM
2522009-10-14 Tomas Hurka <tom@hukatronic.cz>
253
254 PR 969
255 * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
256
55b126d4
L
2572009-10-13 H.J. Lu <hongjiu.lu@intel.com>
258
259 * i386-dis.c (print_insn): Always clear need_vex, need_vex_reg
260 and vex_w_done.
261
ef299415
ME
2622009-10-07 Michael Eager <eager@eagercon.com>
263
55b126d4 264 * microblaze-dis.c: Add include for microblaze-dis.h,
ef299415 265 eliminate local extern decls.
55b126d4 266 * microblaze-dis.h: New.
ef299415 267
245caaea
NC
2682009-10-06 Nick Clifton <nickc@redhat.com>
269
270 * po/fi.po: Updated Finnish translation.
271
49293ef7
NC
2722009-10-03 Andreas Schwab <schwab@linux-m68k.org>
273
274 * opc2c.c: Include "libiberty.h" and <errno.h>.
275 (orig_filename): Constify.
276 (dump_lines): Fix line number directive.
277 (main): Set orig_filename to basename of input file. Use
278 xstrerror.
279
280 * Makefile.am (rx-dis.lo): Remove explicit dependencies.
281 ($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD)
282 instead of $(EXEEXT).
283 (opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use
284 $(LINK_FOR_BUILD). Link with libiberty.
285 (MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD).
286 (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c.
287 * Makefile.in: Regenerated.
288 * rx-decode.c: Regenerated.
289
8977d4b2
AM
2902009-10-03 Paul Reed <paulreed@paddedcell.com>
291
292 * arm-dis.c (print_insn): Check symtab_size not *symtab.
293
f98fa534
L
2942009-10-02 H.J. Lu <hongjiu.lu@intel.com>
295
296 * i386-opc.tbl: Drop Disp64 on jump and loop instructions.
297 * i386-tbl.h: Regenerated.
298
9fe54b1c
PB
2992009-10-02 Peter Bergner <bergner@vnet.ibm.com>
300
301 * ppc-dis.c (ppc_opts): Add "476" entry.
302 * ppc-opc.c (PPC476): Define.
303 (powerpc_opcodes): Update mnemonics where required for 476.
304
634b50f2
PB
3052009-10-01 Peter Bergner <bergner@vnet.ibm.com>
306
307 * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
308 * ppc-dis.c (ppc_opts): Likewise.
309 Rename "ppca2" to "a2".
310
4ded9dda
SR
3112009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
312
313 * crx-dis.c (match_opcode): Truncate mcode to 32-bit.
314
c7927a3c
NC
3152009-09-29 DJ Delorie <dj@redhat.com>
316
317 * Makefile.am: Add RX files.
318 * configure.in: Add support for RX target.
319 * disassemble.c: Likewise.
320 * Makefile.in: Regenerate.
321 * configure: Regenerate.
322 * opc2c.c: New file.
323 * rx-decode.c: New file.
324 * rx-decode.opc: New file.
325 * rx-dis.c: New file.
326
8765b556
PB
3272009-09-29 Peter Bergner <bergner@vnet.ibm.com>
328
329 * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
330 "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
331
fe2d172c
ME
3322009-09-25 Michael Eager <eager@eagercon.com>
333
e0c483d6
AM
334 * microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address,
335 microblaze_decode_insn): Add declarations.
336 (get_delay_slots_microblaze): Remove.
fe2d172c 337
21d799b5
NC
3382009-09-25 Martin Thuresson <martint@google.com>
339
e0c483d6 340 Update sources to make arc and arm targets compile cleanly with
21d799b5
NC
341 -Wc++-compat:
342 * arc-dis.c Fix casts.
343 * arc-ext.c: Add casts.
344 * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
345 enum.
346
2bf05e57
L
3472009-09-24 H.J. Lu <hongjiu.lu@intel.com>
348
349 * i386-gen.c (opcode_modifiers): Remove Vex256.
350 (set_bitfield): Handle XXX=V.
351
352 * i386-opc.h (Vex): Update comments.
353 (Vex256): Removed.
354 (VexNDS): Updated.
e0c483d6 355 (i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
2bf05e57
L
356
357 * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
358 * i386-tbl.h: Regenerated.
359
8a00d392
NC
3602009-09-23 Nick Clifton <nickc@redhat.com>
361
362 * po/fr.po: Updated French translation.
363
e0d602ec
BE
3642009-09-21 Ben Elliston <bje@au.ibm.com>
365 Peter Bergner <bergner@vnet.ibm.com>
366
367 * ppc-dis.c (ppc_opts): Add "ppca2" entry.
368 * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
369 eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
370 icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
371 ici mnemonics.
372 (ERAT_T): New operand.
373 (XWC_MASK): New mask.
374 (XOPL2): New macro.
375 (PPCA2): Define.
376
ca58b19f
NC
3772009-09-18 Nick Clifton <nickc@redhat.com>
378
379 * po/es.po: Updated Spanish translation.
380 * po/vi.po: Updated Vietnamese translation.
381
05203043
L
3822009-09-15 H.J. Lu <hongjiu.lu@intel.com>
383
384 * i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
385 disp == -disp.
386
df58f7b0
NC
3872009-09-14 Nick Clifton <nickc@redhat.com>
388
389 * po/nl.po: Updated Dutch translation.
390
1e9cc1c2
NC
3912009-09-11 Nick Clifton <nickc@redhat.com>
392
393 * po/opcodes.pot: Updated by the Translation project.
394
3952009-09-11 Martin Thuresson <martint@google.com>
396
397 Updated sources to compile cleanly with -Wc++-compat:
398 * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
399 * ldcref.c: Add casts.
400 * ldctor.c: Add casts.
401 * ldexp.c
402 * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
403 * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
404 * ldlang.h (enum statement_enum): Move to top level.
405 * ldmain.c: Add casts.
406 * ldwrite.c: Add casts.
407 * lexsup.c: Add casts. (enum control_enum): Move to top level.
408 * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
409
c8676ae4 4102009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 411
c8676ae4
AK
412 * s390-dis.c (print_insn_s390): Avoid 'long long'.
413
7330f9c3 4142009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 415
7330f9c3
AK
416 * s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
417 (print_insn_s390): Signextend and shift pcrel operands before printing.
418
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L
4192009-09-09 H.J. Lu <hongjiu.lu@intel.com>
420
421 * i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
422 VEX_LEN_AE_R_X_M_0 in comments.
423
495c5f87
DD
4242009-09-08 DJ Delorie <dj@redhat.com>
425
426 * mep-opc.c: Regenerate.
427
84c71969
AS
4282009-09-08 Andreas Schwab <schwab@linux-m68k.org>
429
430 * z8kgen.c (struct op): Replace unused flavor with id.
431 (opt): Remove extra xorb entry.
432 (func): Use id field as fallback.
433 (sub): Return new string, caller changed.
434 (internal): Allocate end marker. Assign unique id before sorting.
435 (gas): Likewise. Fix loop end condition.
436 * z8k-opc.h: Regenerate.
437
bdc7fcfe
AM
4382009-09-08 Alan Modra <amodra@bigpond.net.au>
439
440 * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
441
815c0482
AM
4422009-09-07 Alan Modra <amodra@bigpond.net.au>
443
444 * z8kgen.c (func): Fix thinko last patch.
445
eae14d64
AM
4462009-09-07 Alan Modra <amodra@bigpond.net.au>
447
448 * z8kgen.c (func): Stabilize qsort of identically named entries.
449 * z8k-opc.h: Regenerate.
450
23f938f1
TG
4512009-09-07 Tristan Gingold <gingold@adacore.com>
452
453 * po/opcodes.pot: Regenerate.
454
2eee5593
AM
4552009-09-07 Alan Modra <amodra@bigpond.net.au>
456
457 * configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
458 * configure: Regenerate.
459 * Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
460 (BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
461 (i386-gen, ia64-gen, z8kgen): ..here.
462 * Makefile.in: Regenerate.
463
ae794f60
TG
4642009-09-07 Tristan Gingold <gingold@adacore.com>
465
466 * z8k-opc.h: Regenerate.
467
96d56e9f
NC
4682009-09-05 Martin Thuresson <martin@mtme.org>
469
470 * ia64-dis.c (print_insn_ia64): Update code to use renamed member.
471 * m88k-dis.c (m88kdis): Rename variable class to in_class.
472 * tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol):
473 Rename argument class to symbol_class.
474
66a6900a
JZ
4752009-09-04 Jie Zhang <jie.zhang@analog.com>
476
477 * bfin-dis.c (decode_pseudodbg_assert_0): Change according
478 to the new encoding of DBGA, DBGAH, and DBGAL.
479 (_print_insn_bfin): Likewise.
480
ad15c38e
JZ
4812009-09-03 Jie Zhang <jie.zhang@analog.com>
482
483 * bfin-dis.c (_print_insn_bfin): Don't declare.
484 (print_insn_bfin): Don't declare.
485 (dregs_pair): Remove.
486 (ignore_bits): Remove.
487 (ccstat): Remove.
488
c958a8a8
JZ
4892009-09-03 Jie Zhang <jie.zhang@analog.com>
490
491 * bfin-dis.c (IS_DREG): Define.
492 (IS_PREG): Define.
493 (IS_AREG): Define.
494 (IS_GENREG): Define.
495 (IS_DAGREG): Define.
496 (IS_SYSREG): Define.
497 (decode_REGMV_0): Check illegal register move instructions.
498
3df5879c
DK
4992009-09-03 Dave Korn <dave.korn.cygwin@gmail.com>
500
501 * Makefile.am (BUILD_LIBINTL): New variable.
502 (i386-gen$(EXEEXT_FOR_BUILD)): Use it.
503 (ia64-gen$(EXEEXT_FOR_BUILD)): And here.
504 (z8kgen$(EXEEXT_FOR_BUILD)): And here.
505 * Makefile.in: Regenerate.
506
05316052
DD
5072009-09-01 DJ Delorie <dj@redhat.com>
508
509 * mep-asm.c: Regenerate.
510 * mep-desc.c: Regenerate.
511 * mep-opc.c: Regenerate.
512
e06ae0d4
TG
5132009-09-01 Tristan Gingold <gingold@adacore.com>
514
515 * makefile.vms: Ported to Itanium VMS. Remove useless targets and
516 dependencies. Remove unused FORMAT variable.
517 * configure.com: New file to create build.com DCL script for
518 Itanium VMS or Alpha VMS.
519
d3ce72d0
NC
5202009-08-29 Martin Thuresson <martin@mtme.org>
521
522 * cris-dis.c (bytes_to_skip): Update code to use new name.
523 * i386-dis.c (putop): Update code to use new name.
524 * i386-gen.c (process_i386_opcodes): Update code to use
525 new name.
526 * i386-opc.h (struct template): Rename struct template to
527 insn_template. Update code accordingly.
528 * i386-tbl.h (i386_optab): Update type to use new name.
529 * ia64-dis.c (print_insn_ia64): Rename variable template
530 to template_val.
531 * tic30-dis.c (struct instruction, get_tic30_instruction):
532 Update code to use new name.
533 * tic54x-dis.c (has_lkaddr, get_insn_size)
534 (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
535 Update code to use new name.
536 * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
537 Update type to new name.
538 * z8kgen.c (internal, gas): Rename variable new to new_op.
539
791f3971
L
5402009-08-28 H.J. Lu <hongjiu.lu@intel.com>
541
542 * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
543 Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
544 (LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
545 CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
546 * Makefile.in: Regenerated.
547
573e8a1c
RW
5482009-08-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
549
550 * Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
551 [INSTALL_LIBBFD]: ... here, ...
552 [INSTALL_LIBBFD]: ... and empty overrides here.
553 [!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
554 [!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
555 * Makefile.in: Regenerate.
556 * configure: Regenerate.
557
f7922329
NC
5582009-08-26 Philippe De Muyter <phdm@macqel.be>
559
560 * m68k-dis.c (print_insn_arg): Add movecr register names for
561 coldfire v4e families.
562
ff13a42d
RW
5632009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
564
565 * Makefile.am (SUBDIRS): Build '.' before 'po'.
566 (COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
567 (MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
568 (i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
569 using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
570 (i386-gen.o): New rule.
571 ($(srcdir)/i386-init.h): Adjust.
572 (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
573 (ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
574 (ia64-gen.o): New rule.
575 (ia64_asmtab_deps): New variable.
576 ($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
577 (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
578 (s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
579 likewise.
580 (s390-opc.tab): Adjust.
581 (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
582 rules.
583 (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
584 * Makefile.in: Regenerate.
585 * z8kgen.c (gas): Avoid '/*' in comment.
586 * z8k-opc.h (func): Regenerate.
587
6f01793d
RW
5882009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
589
590 * Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
591 from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
592 i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
593 ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
594 msp430-dis.c added.
595 (LIBOPCODES_CFILES): New variable, adding to
596 TARGET_LIBOPCODES_CFILES also non-target library sources.
597 (CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
598 files.
599 (ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
600 (EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
601 * Makefile.in: Regenerate.
602 * po/POTFILES.in: Regenerate.
603
81ecdfbb
RW
6042009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
605
14ec8efd
RW
606 * Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
607 [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
608 [INSTALL_LIBBFD] (bfdinclude_DATA): New.
609 [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
610 [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
611 is built shared even if it is not to be installed.
612 (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
613 (install_libopcodes, uninstall_libopcodes): Remove.
614 (AM_CPPFLAGS): Renamed from ...
615 (INCLUDES): ... this.
616 * Makefile.in: Regenerate.
617
758227f0
RW
618 * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
619 1.11, foreign, no-dist.
620 (MKDEP, m32c_opc_h): Remove variables.
621 (disassemble.lo): Rewrite using automake-style dependency
622 tracking rules; only list the dependency upon the primary source
623 file, but no included headers.
624 (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
625 (i386-gen.o, ia64-gen.o): Remove dependency statements.
626 (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
627 ensure all dependency fragments are included in the Makefile.
628 (s390-opc.lo): Depend on s390-opc.tab.
629 (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
630 (mkdep section): Remove.
631 * Makefile.in: Regenerate.
632 * po/POTFILES.in: Regenerate.
633
af542c2e
RW
634 * Makefile.am (install-pdf, install-html): Remove.
635 * Makefile.in: Regenerate.
636
81ecdfbb
RW
637 * Makefile.in: Regenerate.
638 * aclocal.m4: Likewise.
639 * config.in: Likewise.
640 * configure: Likewise.
641
7ba29e2a
NC
6422009-08-06 Michael Eager <eager@eagercon.com>
643
644 * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
645 CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
646 * Makefile.in: Regenerate.
647 * configure.in: Add bfd_microblaze_arch target.
648 * configure: Regenerate.
e0c483d6 649 * disassemble.c: Define ARCH_microblaze, return
7ba29e2a
NC
650 print_insn_microblaze().
651 * microblaze-dis.c: New MicroBlaze disassembler.
652 * microblaze-opc.h: New MicroBlaze opcode definitions.
653 * microblaze-opcm.h: New MicroBlaze opcode types.
654
8a9036a4
L
6552009-07-25 H.J. Lu <hongjiu.lu@intel.com>
656
657 * configure.in: Handle bfd_l1om_arch.
658 * disassemble.c (disassembler): Likewise.
659
660 * configure: Regenerated.
661
662 * i386-dis.c (print_insn): Handle bfd_mach_l1om and
663 bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
664
665 * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
666 Add CPU_L1OM_FLAGS.
667 (cpu_flags): Add CpuL1OM.
668 (set_bitfield): Take an argument to set the value field.
669 (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
670 (process_i386_opcode_modifier): Updated.
671 (process_i386_operand_type): Likewise.
672 * i386-init.h: Regenerated.
673 * i386-tbl.h: Likewise.
674
675 * i386-opc.h (CpuL1OM): New.
676 (CpuXsave): Updated.
677 (i386_cpu_flags): Add cpul1om.
678
309d3373
JB
6792009-07-24 Jan Beulich <jbeulich@novell.com>
680
681 * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
682 frstpm.
683 * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
684 (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
685 (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
686 * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
687 Define.
688 (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
689 and cpufisttp.
690 * i386-opc.tbl: Qualify floating point instructions by their
691 respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
692 and fsincos to be avilable only on 387. Fix fstsw ax to be
693 available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
694 and frstpm.
695 * i386-init.h, i386-tbl.h: Regenerate.
696
7769efb2
NC
6972009-07-20 Nick Clifton <nickc@redhat.com>
698
699 PR 10288
700 * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
701 offset or indexed based addressing mode 3.
702
74bdfecf
NC
7032009-07-14 Nick Clifton <nickc@redhat.com>
704
705 PR 10288
706 * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
707 patterns.
708 (arm_decode_shift): Catch illegal register based shifts.
709 (print_insn_arm): Properly handle negative register r0
710 post-indexed addressing.
711
d1aaab3c
DK
7122009-07-10 Doug Kwan <dougkwan@google.com>
713
714 * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
715 lower 32 bits of long types to make hexadecimal output consistent
716 on both 32-bit and 64-bit hosts.
717
87337981
AM
7182009-07-10 Alan Modra <amodra@bigpond.net.au>
719
720 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
721 * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
722 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
723 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
724 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
725 * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
726 * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
727 * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
728 * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
729 * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
e0c483d6 730 * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
87337981
AM
731 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
732
1103f72c
NC
7332009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
734
735 * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
736
78c66db8
NC
7372009-07-07 Nick Clifton <nickc@redhat.com>
738
739 PR 10288
740 * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
741 addressing modes.
742
22102fb0
DD
7432009-07-06 DJ Delorie <dj@redhat.com>
744
745 * mep-desc.c: Regenerate.
746 * mep-desc.h: Regenerate.
747 * mep-opc.c: Regenerate.
748 * mep-opc.h: Regenerate.
749
922d8de8
DR
7502009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
751
752 * i386-opc.h (CpuFMA4): Add CpuFMA4.
753 (i386_cpu_flags): New.
754 * i386-gen.c: Add CPU_FMA4_FLAGS.
755 * i386-opc.tbl: Add FMA4 instructions.
756 * i386-tbl.h: Regenerate.
757 * i386-init.h: Regenerate.
758 * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
759 (OP_XMM_VexW): Ditto.
760 (OP_EX_VexW): Ditto.
761 (VEXI4_Fixup): Ditto.
762 (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
763 (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
764 (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
765 (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
766 (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
767 (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
768 (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
769 (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
770 (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
771 (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
772 (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
773 (get_vex_imm8): New. handle FMA4.
774 (OP_EX_VexReg): Ditto.
e0c483d6 775
fe56b6ce
NC
7762009-06-30 Nick Clifton <nickc@redhat.com>
777
778 PR 10288
779 * arm-dis.c (coprocessor): Print the LDC and STC versions of the
780 LFM and SFM instructions as comments,.
781 Improve consistency of formatting for instructions displayed as
782 comments and decimal values displayed with their hexadecimal
783 equivalents.
784 Formatting tidy ups.
785
05413229
NC
7862009-06-29 Nick Clifton <nickc@redhat.com>
787
788 PR 10288
789 * arm-dis.c (enum opcode_sentinels): New: Used to mark the
790 boundary between variaant and generic coprocessor instuctions.
791 (coprocessor): Use it.
792 Fix architecture version of MCRR and MRRC instructions.
793 (arm_opcdes): Fix patterns for STRB and STRH instructions.
794 (print_insn_coprocessor): Check architecture and extension masks.
795 Print a hexadecimal version of any decimal constant that is
796 outside of the range of -16 to +32.
797 (print_arm_address): Add a return value of the offset used in the
798 adress, if it is worth printing a hexadecimal version of it.
799 (print_insn_neon): Print a hexadecimal version of any decimal
800 constant that is outside of the range of -16 to +32.
801 (print_insn_arm): Likewise.
802 (print_insn_thumb16): Likewise.
803 (print_insn_thumb32): Likewise.
e0c483d6 804
05413229
NC
805 PR 10297
806 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
807 of an undefined instruction.
808 (arm_opcodes): Use it.
809 (thumb_opcod): Use it.
810 (thumb32_opc): Use it.
811
378a0c07
DD
8122009-06-23 DJ Delorie <dj@redhat.com>
813
dab97f24
DD
814 * mep-desc.c: Regenerate.
815 * mep-desc.h: Regenerate.
816 * mep-dis.c: Regenerate.
817 * mep-ibld.c: Regenerate.
818 * mep-opc.c: Regenerate.
819
378a0c07
DD
820 * mep-asm.c: Regenerate.
821 * mep-opc.c: Regenerate.
822 * mep-opc.h: Regenerate.
823
aece7d2e
NC
8242009-06-22 Nick Clifton <nickc@redhat.com>
825
826 * po/fi.po: Updated Finish translation.
827
1998a8e0
AM
8282009-06-22 Alan Modra <amodra@bigpond.net.au>
829
830 * m32c-asm.c: Regenerate.
831
b33bafa0
AM
8322009-06-22 Alan Modra <amodra@bigpond.net.au>
833
834 * score-dis.c (print_insn_score48, print_insn_score32): Move default
835 case label to proper lexical block.
836 * score7-dis.c (print_insn_score32): Likewise.
837
ce21feb4
MS
8382009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
839
840 * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
841 MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
842 * s390-opc.txt (nopr, nop): Use new instruction format.
843
0313a2b8
NC
8442009-06-18 Nick Clifton <nickc@redhat.com>
845
846 PR 10288
847 * arm-dis.c (print_insn_coprocessor): Check that a user specified
848 ARM architecture supports the matched instruction.
849 (print_insn_arm): Likewise.
850 (select_arm_features): New function. Fills in the fields of an
851 arm_feature_set structure based on a given arm machine number.
852 (print_insn): Initialise an arm_feature_set structure.
853
6db7e006
MR
8542009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
855
856 * vax-dis.c (is_function_entry): Return success for synthetic
857 symbols too.
858 (is_plt_tail): New function.
859 (print_insn_vax): Decode PLT entry offset longword.
860
522fe561
NC
8612009-06-15 Nick Clifton <nickc@redhat.com>
862
fe2ceba1
NC
863 PR 10186
864 * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
865 instruction.
866
522fe561
NC
867 PR 10173
868 * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
869
1316c8b3
NC
8702009-06-15 Nick Clifton <nickc@redhat.com>
871
872 PR 10263
873 * arm-dis.c (print_insn): Ignore is_data if the user has requested
874 the disassembly of data as well as instructions.
875
f6475b48
DE
8762009-06-11 Doug Evans <dje@sebabeach.org>
877
878 * cgen.sh: Handle multiple simultaneous runs for parallel makes.
879
f865a31d
AG
8802009-06-11 Anthony Green <green@moxielogic.com>
881
882 * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
883 (moxie_form3_opc_info): Add branch instructions.
884 * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
885 encoded instructions.
886
0e7c7f11
AG
8872009-06-06 Anthony Green <green@moxielogic.com>
888
889 * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
890 * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
891
67a648f1
AM
8922009-06-04 Alan Modra <amodra@bigpond.net.au>
893
894 * dep-in.sed: Don't use \n in replacement part of s command.
895 * Makefile.am (DEP1): LC_ALL for uniq.
896 * Makefile.in: Regenerate.
897
06c582ac
NC
8982009-06-02 Nick Clifton <nickc@redhat.com>
899
900 * po/nl.po: Updated Dutch translation.
901
3164099e
TG
9022009-06-02 Tristan Gingold <gingold@adacore.com>
903
904 * ia64-gen.c (parse_resource_users, print_dependency_table,
905 add_dis_table_ent, finish_distable, insert_bit_table_ent,
906 add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
907 get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
908 insert_completer_entry, print_completer_entry, print_completer_table,
909 opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
910
d285268e
DD
9112009-05-28 DJ Delorie <dj@redhat.com>
912
913 * mep-asm.c: Regenerate.
914 * mep-desc.c: Regenerate.
915
2f3565a3
DD
9162009-05-26 DJ Delorie <dj@redhat.com>
917
918 * mep-asm.c: Regenerate.
919 * mep-desc.c: Regenerate.
920 * mep-desc.h: Regenerate.
921 * mep-dis.c: Regenerate.
922 * mep-ibld.c: Regenerate.
923 * mep-opc.c: Regenerate.
924 * mep-opc.h: Regenerate.
925
f12e7348
NC
9262009-05-26 Nick Clifton <nickc@redhat.com>
927
928 * po/id.po: Updated Indonesian translation.
929 * po/opcodes.pot: Updated template file.
930
9e097a72
AM
9312009-05-26 Alan Modra <amodra@bigpond.net.au>
932
933 * dep-in.sed: Don't modify .o to .lo here. Output one filename
934 per line with all lines having continuation backslash. Prefix
935 first line with "A", following lines with "B".
936 * Makefile.am (DEP): Don't use dep.sed here.
937 (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
938 dep.sed here on dependencies, sort and uniq.
939 * Makefile.in: Regenerate.
940
4f8318f8
TG
9412009-05-25 Tristan Gingold <gingold@adacore.com>
942
943 * makefile.vms (OPT): New variable.
944 (CFLAGS): Update compilation flags.
945
1d74713b
DD
9462009-05-22 DJ Delorie <dj@redhat.com>
947
948 * mep-asm.c: Regenerate.
949 * mep-desc.c: Regenerate.
950 * mep-desc.h: Regenerate.
951 * mep-dis.c: Regenerate.
952 * mep-ibld.c: Regenerate.
953 * mep-opc.c: Regenerate.
954 * mep-opc.h: Regenerate.
955
c1e679ec
DR
9562009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
957
958 * i386-opc.h (Cpusse5): Delete.
959 (i386_cpu_flags): Delete.
960 * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
961 * i386-opc.tbl: Remove SSE5 instructions.
962 * i386-tbl.h: Regenerate.
963 * i386-init.h: Regenerate.
964 * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
965 (print_drex_arg): Delete.
966 (OP_DREX4): Delete.
967 (OP_DREX3): Delete.
968 (OP_DREX_ICMP): Delete.
969 (OP_DREX_FCMP): Delete.
970 (DREX_*): Delete.
971 (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
e0c483d6 972
2b3decb5
AM
9732009-05-22 Alan Modra <amodra@bigpond.net.au>
974
975 * Makefile.am: Run "make dep-am".
976 * Makefile.in: Regenerate.
977 * po/POTFILES.in: Regenerate.
978
eb956800
DD
9792009-05-19 DJ Delorie <dj@redhat.com>
980
981 * mep-asm.c: Regenerate.
982 * mep-opc.c: Regenerate.
983
3526b680
DD
9842009-04-30 DJ Delorie <dj@redhat.com>
985
986 * mep-asm.c: Regenerate.
987 * mep-desc.c: Regenerate.
988 * mep-desc.h: Regenerate.
989 * mep-dis.c: Regenerate.
990 * mep-ibld.c: Regenerate.
991 * mep-opc.c: Regenerate.
992 * mep-opc.h: Regenerate.
993
45be3704
DD
9942009-04-17 DJ Delorie <dj@redhat.com
995
996 * mep-desc.c: Regenerate.
997 * mep-ibld.c: Regenerate.
998 * mep-opc.c: Regenerate.
999 * mep-opc.h: Regenerate.
1000
20135e4c
NC
10012009-04-15 Anthony Green <green@moxielogic.com>
1002
1003 * moxie-opc.c, moxie-dis.c: Created.
1004 * Makefile.am: Build the moxie source files.
1005 * configure.in: Add moxie support.
1006 * Makefile.in, configure: Rebuilt.
1007 * disassemble.c (disassembler): Add moxie support.
1008 (ARCH_moxie): Define.
1009
ac5c19e6
JB
10102009-04-15 Jan Beulich <jbeulich@novell.com>
1011
1012 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
1013 extension to None.
1014 (pshab, pshaw, pshad, pshaq): Likewise.
1015 * i386-tbl.h: Re-generate.
1016
52de720d
DD
10172009-04-08 DJ Delorie <dj@redhat.com
1018
1019 * mep-asm.c: Regenerate.
1020 * mep-desc.c: Regenerate.
1021 * mep-desc.h: Regenerate.
1022 * mep-dis.c: Regenerate.
1023 * mep-ibld.c: Regenerate.
1024 * mep-opc.c: Regenerate.
1025 * mep-opc.h: Regenerate.
1026
858d7a6d
PB
10272009-04-07 Peter Bergner <bergner@vnet.ibm.com>
1028
1029 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
1030 "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
1031 Reorder entries so the extended mnemonics are listed before tlbilx.
1032
70dc4e32
PB
10332009-04-02 Peter Bergner <bergner@vnet.ibm.com>
1034
1035 * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
1036 due to -many/-Many.
1037 (print_insn_powerpc): Make sure we only deprecate instructions using
1038 the original dialect and not a modified dialect due to -Many handling.
1039 Move the handling of the condition register and default operands to
1040 the end of the if/else if/else chain.
1041 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1042 instructions from newer processors are listed before older ones.
1043 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
1044 that have instructions with conflicting opcodes.
1045
e401b04c
PB
10462009-04-01 Peter Bergner <bergner@vnet.ibm.com>
1047
1048 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
1049 E500MC entries.
1050
b8f9ee44
CL
10512009-04-01 Christophe Lyon <christophe.lyon@st.com>
1052
1053 * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
1054
d460e92e
JM
10552009-03-30 Joseph Myers <joseph@codesourcery.com>
1056
1057 * arm-dis.c (print_insn): Also check section matches in backwards
1058 search for mapping symbol.
1059
d34b5006
L
10602009-03-26 H.J. Lu <hongjiu.lu@intel.com>
1061
1062 * i386-dis.c (get_valid_dis386): Abort on unhandled table.
1063
8d25cc3d
AM
10642009-03-18 Alan Modra <amodra@bigpond.net.au>
1065
3889c459 1066 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
8d25cc3d
AM
1067 * Makefile.am: Run "make dep-am".
1068 * Makefile.in: Regenerate.
1069 * openrisc-opc.c: Regenerate.
1070
34dd024a
NC
10712009-03-10 Nick Clifton <nickc@redhat.com>
1072
1073 * po/id.po: Updated Indonesian translation.
1074
69fe9ce5
AM
10752009-03-10 Alan Modra <amodra@bigpond.net.au>
1076
1077 * ppc-dis.c: Include "opintl.h".
1078 (struct ppc_mopt, ppc_opts): New.
1079 (ppc_parse_cpu): New function.
1080 (powerpc_init_dialect): Use it.
1081 (print_ppc_disassembler_options): Dump options from ppc_opts.
1082 Internationalize message.
1083
d11fd249
NC
10842009-03-06 Nick Clifton <nickc@redhat.com>
1085
1086 * po/es.po: Updated Spanish translation.
1087
51dec227
AM
10882009-03-04 Alan Modra <amodra@bigpond.net.au>
1089
1090 PR 6768
1091 * configure.in: Test for ld --as-needed support. Link shared
1092 libopcodes against libm.
1093 * configure: Regenerate.
1094
c72ab5f2
PB
10952009-03-03 Peter Bergner <bergner@vnet.ibm.com>
1096
1097 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1098 instructions from newer processors are listed before older ones.
1099
a1f7ca36
AM
11002009-03-03 Alan Modra <amodra@bigpond.net.au>
1101
1102 * Makefile.am: Run "make dep-am".
1103 (HFILES): Move lm32-desc.h and lm32-opc.h from..
1104 (CFILES): ..here.
1105 * Makefile.in: Regenerate.
1106
c3b7224a
NC
11072009-03-02 Qinwei <qinwei@sunnorth.com.cn>
1108
1109 * score7-dis.c: New file.
1110 * Makefile.am: Add dependencies for score7-dis.c.
1111 * Makefile.in: Regenerate.
1112 * configure.in: Add score7-dis to score files.
1113 * configure: Regenerate.
1114 * score-dis.c: Add support for score7 architecture.
1115 * score-opc.h: Likewise.
1116
58e24671
RW
11172009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
1118
1119 * configure: Regenerate.
1120
d6f574e0
L
11212009-02-27 H.J. Lu <hongjiu.lu@intel.com>
1122
1123 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
1124
066be9f7
PB
11252009-02-26 Peter Bergner <bergner@vnet.ibm.com>
1126
1127 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
1128 the power7 and the isel instructions.
1129 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
1130 (insert_dm, extract_dm): Likewise.
1131 (XB6): Update comment to include XX2 form.
1132 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
1133 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
1134 (RemoveXX3DM): Delete.
1135 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
1136 "mftgpr">: Deprecate for POWER7.
1137 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
1138 "frsqrte.">: Deprecate the three operand form and enable the two
1139 operand form for POWER7 and later.
1140 <"wait">: Extend to accept optional parameter. Enable for POWER7.
1141 <"waitsrv", "waitimpl">: Add extended opcodes.
1142 <"ldbrx", "stdbrx">: Enable for POWER7.
1143 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
1144 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
1145 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
1146 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
1147 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
1148 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
1149 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
1150 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
1151 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
1152 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
1153 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
1154 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
1155 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
1156 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
1157 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
1158 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
1159 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
1160 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
1161 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
1162 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
1163 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
1164 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
1165 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
1166 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
1167 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
1168 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
1169 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
1170 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
1171 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
1172 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
1173 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
1174 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
1175 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
1176 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
1177 "xxspltw", "xxswapd">: Add VSX opcodes.
1178
4c664d7b
L
11792009-02-23 H.J. Lu <hongjiu.lu@intel.com>
1180
1181 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
1182 (operand_types): Remove Vex_Imm4.
1183
1184 * i386-opc.h (Vex_Imm4): Removed.
1185 (OTMax): Updated.
1186 (i386_operand_type): Remove vex_imm4.
1187
1188 * i386-opc.tbl: Remove Vex_Imm4 comments.
1189 * i386-init.h: Regenerated.
1190 * i386-tbl.h: Likewise.
1191
4ce8808b
RE
11922009-02-23 Richard Earnshaw <rearnsha@arm.com>
1193
1194 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
1195 vq{r}shr{u}n.s64 insnstructions.
1196
0e55be16
PB
11972009-02-19 Peter Bergner <bergner@vnet.ibm.com>
1198
1199 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
1200 operand to be a float point register (FRT/FRS).
1201
b1c9882d
AN
12022009-02-18 Adam Nemet <anemet@caviumnetworks.com>
1203
1204 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
1205 dmfc2 and dmtc2 before the architecture-level variants.
1206
137f2437
NC
12072009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
1208
1209 * fr30-opc.c: Regenerate.
1210 * frv-opc.c: Regenerate.
1211 * ip2k-opc.c: Regenerate.
1212 * iq2000-opc.c: Regenerate.
1213 * lm32-opc.c: Regenerate.
1214 * m32c-opc.c: Regenerate.
1215 * m32r-opc.c: Regenerate.
1216 * mep-opc.c: Regenerate.
1217 * mt-opc.c: Regenerate.
1218 * xc16x-opc.c: Regenerate.
1219 * xstormy16-opc.c: Regenerate.
1220 * tic54x-dis.c (print_instruction): Avoid compiler warning on
1221 sprintf call.
1222
87298967
NS
12232009-02-12 Nathan Sidwell <nathan@codesourcery.com>
1224
1225 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
1226
80890a61
PB
12272009-02-05 Peter Bergner <bergner@vnet.ibm.com>
1228
1229 * ppc-opc.c: Update copyright year.
1230 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
1231 ordering for POWER4 and later and use the correct Server ordering.
1232
ce2f5b3c
L
12332009-02-04 H.J. Lu <hongjiu.lu@intel.com>
1234
1235 AVX Programming Reference (January, 2009)
1236 * i386-dis.c (PREFIX_VEX_3A44): New.
1237 (VEX_LEN_3A44_P_2): Likewise.
1238 (PREFIX_VEX_3A48): Updated.
1239 (VEX_LEN_3A4C_P_2): Likewise.
1240 (prefix_table): Add PREFIX_VEX_3A44.
1241 (vex_table): Likewise.
1242 (vex_len_table): Add VEX_LEN_3A44_P_2.
1243
1244 * i386-opc.tbl: Add PCLMUL + AVX instructions.
1245 * i386-tbl.h: Regenerated.
1246
52b6b6b9
JM
12472009-02-03 Sandip Matte <sandip@rmicorp.com>
1248
1249 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
1250 (mips_arch_choices): Add XLR entry.
1251 * mips-opc.c (XLR): Define.
1252 (mips_builtin_opcodes): Add XLR instructions.
1253
31dd3154
JM
12542009-02-03 Carlos O'Donell <carlos@codesourcery.com>
1255
1256 * Makefile.am: Add install-pdf target.
1257 * po/Make-in: Add install-pdf target.
1258 * Makefile.in: Regenerate.
1259
c1a0a41f
DD
12602009-02-02 DJ Delorie <dj@redhat.com>
1261
1262 * mep-asm.c: Regenerate.
1263 * mep-desc.c: Regenerate.
1264 * mep-desc.h: Regenerate.
1265 * mep-dis.c: Regenerate.
1266 * mep-ibld.c: Regenerate.
1267 * mep-opc.c: Regenerate.
1268 * mep-opc.h: Regenerate.
1269
087b80de
JM
12702009-01-29 Mark Mitchell <mark@codesourcery.com>
1271
1272 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
1273 qsub, and qdsub.
1274
159073e6
NC
12752009-01-28 Chao-ying Fu <fu@mips.com>
1276
e0c483d6 1277 * mips-opc.c (suxc1): Add the flag of FP_D.
159073e6 1278
6f3b91a6
AM
12792009-01-20 Alan Modra <amodra@bigpond.net.au>
1280
1281 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
1282 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
1283 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
1284 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
1285 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
1286 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
1287 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
1288 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
1289
29670fb9
AM
12902009-01-16 Alan Modra <amodra@bigpond.net.au>
1291
1292 * configure.in (commonbfdlib): Delete.
1293 (SHARED_LIBADD): Add pic libiberty if such is available.
1294 * configure: Regenerate.
1295 * po/POTFILES.in: Regenerate.
1296
21169fcf
PB
12972009-01-14 Peter Bergner <bergner@vnet.ibm.com>
1298
1299 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
1300 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
1301 operand form and enable the four operand form for POWER6 and later.
1302 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
1303 three operand form for POWER6 and later.
1304
4ca47a51
MF
13052009-01-14 Mike Frysinger <vapier@gentoo.org>
1306
1307 * bfin-dis.c (OUTS): Use "%s" as format string.
1308
8acd5377
L
13092009-01-13 H.J. Lu <hongjiu.lu@intel.com>
1310
1311 * i386-gen.c (cpu_flag_init): Remove a white space.
1312 (operand_type_init): Likewise.
1313
c1ec1875
L
13142009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1315
1316 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
1317 * i386-tbl.h: Regenerated.
1318
c7532693
L
13192009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1320
1321 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
1322 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
1323 subS, xorS and cmpS.
1324
bd5295b2
L
13252009-01-10 H.J. Lu <hongjiu.lu@intel.com>
1326
1327 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
1328 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
1329 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
1330 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
1331 and CpuSYSCALL.
1332 (lineno): Removed.
1333 (set_bitfield): Take an argument, lineno. Don't report lineno
1334 on error if it is -1.
1335 (process_i386_cpu_flag): Take an argument, lineno.
1336 (process_i386_opcode_modifier): Likewise.
1337 (process_i386_operand_type): Likewise.
1338 (output_i386_opcode): Likewise.
1339 (opcode_hash_entry): Add lineno.
1340 (process_i386_opcodes): Updated.
1341 (process_i386_registers): Likewise.
1342 (process_i386_initializers): Likewise.
1343
1344 * i386-opc.h (CpuP4): Removed.
1345 (CpuK6): Likewise.
1346 (CpuK8): Likewise.
1347 (CpuClflush): New.
1348 (CpuSYSCALL): Likewise.
1349 (CpuMMX): Updated.
1350 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
1351 cpuclflush and cpusyscall.
1352
1353 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
1354 syscall and sysret.
1355 * i386-init.h: Regenerated.
1356 * i386-tbl.h: Likewise.
1357
1b7f3fb0
L
13582009-01-09 H.J. Lu <hongjiu.lu@intel.com>
1359
1360 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
1361 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
1362 (cpu_flags): Add CpuRdtscp.
1363 (set_bitfield): Remove CpuSledgehammer check.
1364
1365 * i386-opc.h (CpuRdtscp): New.
1366 (CpuLM): Updated.
1367 (i386_cpu_flags): Add cpurdtscp.
1368
1369 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
1370 * i386-init.h: Regenerated.
1371 * i386-tbl.h: Likewise.
1372
1cb0a767
PB
13732009-01-09 Peter Bergner <bergner@vnet.ibm.com>
1374
1375 * ppc-opc.c (PPCNONE): Define.
1376 (NOPOWER4): Delete.
1377 (powerpc_opcodes): Initialize the new "deprecated" field.
1378
168e3097
L
13792009-01-06 H.J. Lu <hongjiu.lu@intel.com>
1380
1381 AVX Programming Reference (December, 2008)
1382 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
1383 (VEX_LEN_E7_P_2_M_0): Likewise.
1384 (VEX_LEN_2C_P_1): Updated.
1385 (VEX_LEN_E8_P_2): Likewise.
1386 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
1387 (mod_table): Likewise.
1388
1389 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
1390 * i386-tbl.h: Regenerated.
1391
22da050b
L
13922009-01-05 H.J. Lu <hongjiu.lu@intel.com>
1393
1394 * i386-gen.c (process_copyright): Update for 2009.
1395
1396 * i386-init.h: Regenerated.
1397 * i386-tbl.h: Likewise.
1398
0bfee649 13992009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 1400
0bfee649
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1401 AVX Programming Reference (December, 2008)
1402 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 1403 (OP_EX_VexW): Likewise.
0bfee649 1404 (OP_EX_VexImmW): Likewise.
c0f3af97 1405 (OP_XMM_VexW): Likewise.
c0f3af97 1406 (VEXI4_Fixup): Likewise.
c0f3af97 1407 (VPERMIL2_Fixup): Likewise.
c0f3af97 1408 (VexI4): Likewise.
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1409 (VexFMA): Likewise.
1410 (Vex128FMA): Likewise.
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1411 (EXVexW): Likewise.
1412 (EXdVexW): Likewise.
1413 (EXqVexW): Likewise.
0bfee649 1414 (EXVexImmW): Likewise.
c0f3af97 1415 (XMVexW): Likewise.
c0f3af97 1416 (VPERMIL2): Likewise.
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1417 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
1418 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
1419 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
1420 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
1421 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
1422 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
1423 (get_vex_imm8): Likewise.
1424 (OP_EX_VexReg): Likewise.
1425 vpermil2_op): Likewise.
1426 (EXVexWdq): New.
1427 (vex_w_dq_mode): Likewise.
1428 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
1429 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
1430 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
1431 (es_reg): Updated.
1432 (PREFIX_VEX_38DB): Likewise.
1433 (PREFIX_VEX_3A4A): Likewise.
1434 (PREFIX_VEX_3A60): Likewise.
1435 (PREFIX_VEX_3ADF): Likewise.
1436 (VEX_LEN_3ADF_P_2): Likewise.
1437 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
e0c483d6 1438 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
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1439 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
1440 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
1441 PREFIX_VEX_3896...PREFIX_VEX_389F,
1442 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
1443 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 1444 (vex_table): Likewise.
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1445 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
1446 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
1447 (putop): Support "%XW".
1448 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 1449
0bfee649 1450 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 1451
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1452 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
1453 instructions. Add new FMA instructions.
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1454 * i386-tbl.h: Regenerated.
1455
e0c483d6 14562009-01-02 Matthias Klose <doko@ubuntu.com>
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1458 * or32-opc.c (or32_print_register, or32_print_immediate,
1459 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 1460
0bfee649 1461For older changes see ChangeLog-2008
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1462\f
1463Local Variables:
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1464mode: change-log
1465left-margin: 8
1466fill-column: 74
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1467version-control: never
1468End:
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