Enable Intel CLDEMOTE instruction.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
c48935d7
IT
12018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
2
3 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
4 PREFIX_0F1C.
5 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
6 (cpu_flags): Add CpuCLDEMOTE.
7 * i386-init.h: Regenerate.
8 * i386-opc.h (enum): Add CpuCLDEMOTE,
9 (i386_cpu_flags): Add cpucldemote.
10 * i386-opc.tbl: Add cldemote.
11 * i386-tbl.h: Regenerate.
12
211dc24b
AM
132018-04-16 Alan Modra <amodra@gmail.com>
14
15 * Makefile.am: Remove sh5 and sh64 support.
16 * configure.ac: Likewise.
17 * disassemble.c: Likewise.
18 * disassemble.h: Likewise.
19 * sh-dis.c: Likewise.
20 * sh64-dis.c: Delete.
21 * sh64-opc.c: Delete.
22 * sh64-opc.h: Delete.
23 * Makefile.in: Regenerate.
24 * configure: Regenerate.
25 * po/POTFILES.in: Regenerate.
26
a9a4b302
AM
272018-04-16 Alan Modra <amodra@gmail.com>
28
29 * Makefile.am: Remove w65 support.
30 * configure.ac: Likewise.
31 * disassemble.c: Likewise.
32 * disassemble.h: Likewise.
33 * w65-dis.c: Delete.
34 * w65-opc.h: Delete.
35 * Makefile.in: Regenerate.
36 * configure: Regenerate.
37 * po/POTFILES.in: Regenerate.
38
04cb01fd
AM
392018-04-16 Alan Modra <amodra@gmail.com>
40
41 * configure.ac: Remove we32k support.
42 * configure: Regenerate.
43
c2bf1eec
AM
442018-04-16 Alan Modra <amodra@gmail.com>
45
46 * Makefile.am: Remove m88k support.
47 * configure.ac: Likewise.
48 * disassemble.c: Likewise.
49 * disassemble.h: Likewise.
50 * m88k-dis.c: Delete.
51 * Makefile.in: Regenerate.
52 * configure: Regenerate.
53 * po/POTFILES.in: Regenerate.
54
6793974d
AM
552018-04-16 Alan Modra <amodra@gmail.com>
56
57 * Makefile.am: Remove i370 support.
58 * configure.ac: Likewise.
59 * disassemble.c: Likewise.
60 * disassemble.h: Likewise.
61 * i370-dis.c: Delete.
62 * i370-opc.c: Delete.
63 * Makefile.in: Regenerate.
64 * configure: Regenerate.
65 * po/POTFILES.in: Regenerate.
66
e82aa794
AM
672018-04-16 Alan Modra <amodra@gmail.com>
68
69 * Makefile.am: Remove h8500 support.
70 * configure.ac: Likewise.
71 * disassemble.c: Likewise.
72 * disassemble.h: Likewise.
73 * h8500-dis.c: Delete.
74 * h8500-opc.h: Delete.
75 * Makefile.in: Regenerate.
76 * configure: Regenerate.
77 * po/POTFILES.in: Regenerate.
78
fceadf09
AM
792018-04-16 Alan Modra <amodra@gmail.com>
80
81 * configure.ac: Remove tahoe support.
82 * configure: Regenerate.
83
ae1d3843
L
842018-04-15 H.J. Lu <hongjiu.lu@intel.com>
85
86 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
87 umwait.
88 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
89 64-bit mode.
90 * i386-tbl.h: Regenerated.
91
de89d0a3
IT
922018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
93
94 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
95 PREFIX_MOD_1_0FAE_REG_6.
96 (va_mode): New.
97 (OP_E_register): Use va_mode.
98 * i386-dis-evex.h (prefix_table):
99 New instructions (see prefixes above).
100 * i386-gen.c (cpu_flag_init): Add WAITPKG.
101 (cpu_flags): Likewise.
102 * i386-opc.h (enum): Likewise.
103 (i386_cpu_flags): Likewise.
104 * i386-opc.tbl: Add umonitor, umwait, tpause.
105 * i386-init.h: Regenerate.
106 * i386-tbl.h: Likewise.
107
a8eb42a8
AM
1082018-04-11 Alan Modra <amodra@gmail.com>
109
110 * opcodes/i860-dis.c: Delete.
111 * opcodes/i960-dis.c: Delete.
112 * Makefile.am: Remove i860 and i960 support.
113 * configure.ac: Likewise.
114 * disassemble.c: Likewise.
115 * disassemble.h: Likewise.
116 * Makefile.in: Regenerate.
117 * configure: Regenerate.
118 * po/POTFILES.in: Regenerate.
119
caf0678c
L
1202018-04-04 H.J. Lu <hongjiu.lu@intel.com>
121
122 PR binutils/23025
123 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
124 to 0.
125 (print_insn): Clear vex instead of vex.evex.
126
4fb0d2b9
NC
1272018-04-04 Nick Clifton <nickc@redhat.com>
128
129 * po/es.po: Updated Spanish translation.
130
c39e5b26
JB
1312018-03-28 Jan Beulich <jbeulich@suse.com>
132
133 * i386-gen.c (opcode_modifiers): Delete VecESize.
134 * i386-opc.h (VecESize): Delete.
135 (struct i386_opcode_modifier): Delete vecesize.
136 * i386-opc.tbl: Drop VecESize.
137 * i386-tlb.h: Re-generate.
138
8e6e0792
JB
1392018-03-28 Jan Beulich <jbeulich@suse.com>
140
141 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
142 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
143 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
144 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
145 * i386-tlb.h: Re-generate.
146
9f123b91
JB
1472018-03-28 Jan Beulich <jbeulich@suse.com>
148
149 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
150 Fold AVX512 forms
151 * i386-tlb.h: Re-generate.
152
9646c87b
JB
1532018-03-28 Jan Beulich <jbeulich@suse.com>
154
155 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
156 (vex_len_table): Drop Y for vcvt*2si.
157 (putop): Replace plain 'Y' handling by abort().
158
c8d59609
NC
1592018-03-28 Nick Clifton <nickc@redhat.com>
160
161 PR 22988
162 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
163 instructions with only a base address register.
164 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
165 handle AARHC64_OPND_SVE_ADDR_R.
166 (aarch64_print_operand): Likewise.
167 * aarch64-asm-2.c: Regenerate.
168 * aarch64_dis-2.c: Regenerate.
169 * aarch64-opc-2.c: Regenerate.
170
b8c169f3
JB
1712018-03-22 Jan Beulich <jbeulich@suse.com>
172
173 * i386-opc.tbl: Drop VecESize from register only insn forms and
174 memory forms not allowing broadcast.
175 * i386-tlb.h: Re-generate.
176
96bc132a
JB
1772018-03-22 Jan Beulich <jbeulich@suse.com>
178
179 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
180 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
181 sha256*): Drop Disp<N>.
182
9f79e886
JB
1832018-03-22 Jan Beulich <jbeulich@suse.com>
184
185 * i386-dis.c (EbndS, bnd_swap_mode): New.
186 (prefix_table): Use EbndS.
187 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
188 * i386-opc.tbl (bndmov): Move misplaced Load.
189 * i386-tlb.h: Re-generate.
190
d6793fa1
JB
1912018-03-22 Jan Beulich <jbeulich@suse.com>
192
193 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
194 templates allowing memory operands and folded ones for register
195 only flavors.
196 * i386-tlb.h: Re-generate.
197
f7768225
JB
1982018-03-22 Jan Beulich <jbeulich@suse.com>
199
200 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
201 256-bit templates. Drop redundant leftover Disp<N>.
202 * i386-tlb.h: Re-generate.
203
0e35537d
JW
2042018-03-14 Kito Cheng <kito.cheng@gmail.com>
205
206 * riscv-opc.c (riscv_insn_types): New.
207
b4a3689a
NC
2082018-03-13 Nick Clifton <nickc@redhat.com>
209
210 * po/pt_BR.po: Updated Brazilian Portuguese translation.
211
d3d50934
L
2122018-03-08 H.J. Lu <hongjiu.lu@intel.com>
213
214 * i386-opc.tbl: Add Optimize to clr.
215 * i386-tbl.h: Regenerated.
216
bd5dea88
L
2172018-03-08 H.J. Lu <hongjiu.lu@intel.com>
218
219 * i386-gen.c (opcode_modifiers): Remove OldGcc.
220 * i386-opc.h (OldGcc): Removed.
221 (i386_opcode_modifier): Remove oldgcc.
222 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
223 instructions for old (<= 2.8.1) versions of gcc.
224 * i386-tbl.h: Regenerated.
225
e771e7c9
JB
2262018-03-08 Jan Beulich <jbeulich@suse.com>
227
228 * i386-opc.h (EVEXDYN): New.
229 * i386-opc.tbl: Fold various AVX512VL templates.
230 * i386-tlb.h: Re-generate.
231
ed438a93
JB
2322018-03-08 Jan Beulich <jbeulich@suse.com>
233
234 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
235 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
236 vpexpandd, vpexpandq): Fold AFX512VF templates.
237 * i386-tlb.h: Re-generate.
238
454172a9
JB
2392018-03-08 Jan Beulich <jbeulich@suse.com>
240
241 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
242 Fold 128- and 256-bit VEX-encoded templates.
243 * i386-tlb.h: Re-generate.
244
36824150
JB
2452018-03-08 Jan Beulich <jbeulich@suse.com>
246
247 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
248 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
249 vpexpandd, vpexpandq): Fold AVX512F templates.
250 * i386-tlb.h: Re-generate.
251
e7f5c0a9
JB
2522018-03-08 Jan Beulich <jbeulich@suse.com>
253
254 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
255 64-bit templates. Drop Disp<N>.
256 * i386-tlb.h: Re-generate.
257
25a4277f
JB
2582018-03-08 Jan Beulich <jbeulich@suse.com>
259
260 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
261 and 256-bit templates.
262 * i386-tlb.h: Re-generate.
263
d2224064
JB
2642018-03-08 Jan Beulich <jbeulich@suse.com>
265
266 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
267 * i386-tlb.h: Re-generate.
268
1b193f0b
JB
2692018-03-08 Jan Beulich <jbeulich@suse.com>
270
271 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
272 Drop NoAVX.
273 * i386-tlb.h: Re-generate.
274
f2f6a710
JB
2752018-03-08 Jan Beulich <jbeulich@suse.com>
276
277 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
278 * i386-tlb.h: Re-generate.
279
38e314eb
JB
2802018-03-08 Jan Beulich <jbeulich@suse.com>
281
282 * i386-gen.c (opcode_modifiers): Delete FloatD.
283 * i386-opc.h (FloatD): Delete.
284 (struct i386_opcode_modifier): Delete floatd.
285 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
286 FloatD by D.
287 * i386-tlb.h: Re-generate.
288
d53e6b98
JB
2892018-03-08 Jan Beulich <jbeulich@suse.com>
290
291 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
292
2907c2f5
JB
2932018-03-08 Jan Beulich <jbeulich@suse.com>
294
295 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
296 * i386-tlb.h: Re-generate.
297
73053c1f
JB
2982018-03-08 Jan Beulich <jbeulich@suse.com>
299
300 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
301 forms.
302 * i386-tlb.h: Re-generate.
303
52fe4420
AM
3042018-03-07 Alan Modra <amodra@gmail.com>
305
306 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
307 bfd_arch_rs6000.
308 * disassemble.h (print_insn_rs6000): Delete.
309 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
310 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
311 (print_insn_rs6000): Delete.
312
a6743a54
AM
3132018-03-03 Alan Modra <amodra@gmail.com>
314
315 * sysdep.h (opcodes_error_handler): Define.
316 (_bfd_error_handler): Declare.
317 * Makefile.am: Remove stray #.
318 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
319 EDIT" comment.
320 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
321 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
322 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
323 opcodes_error_handler to print errors. Standardize error messages.
324 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
325 and include opintl.h.
326 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
327 * i386-gen.c: Standardize error messages.
328 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
329 * Makefile.in: Regenerate.
330 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
331 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
332 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
333 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
334 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
335 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
336 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
337 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
338 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
339 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
340 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
341 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
342 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
343
8305403a
L
3442018-03-01 H.J. Lu <hongjiu.lu@intel.com>
345
346 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
347 vpsub[bwdq] instructions.
348 * i386-tbl.h: Regenerated.
349
e184813f
AM
3502018-03-01 Alan Modra <amodra@gmail.com>
351
352 * configure.ac (ALL_LINGUAS): Sort.
353 * configure: Regenerate.
354
5b616bef
TP
3552018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
356
357 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
358 macro by assignements.
359
b6f8c7c4
L
3602018-02-27 H.J. Lu <hongjiu.lu@intel.com>
361
362 PR gas/22871
363 * i386-gen.c (opcode_modifiers): Add Optimize.
364 * i386-opc.h (Optimize): New enum.
365 (i386_opcode_modifier): Add optimize.
366 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
367 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
368 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
369 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
370 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
371 vpxord and vpxorq.
372 * i386-tbl.h: Regenerated.
373
e95b887f
AM
3742018-02-26 Alan Modra <amodra@gmail.com>
375
376 * crx-dis.c (getregliststring): Allocate a large enough buffer
377 to silence false positive gcc8 warning.
378
0bccfb29
JW
3792018-02-22 Shea Levy <shea@shealevy.com>
380
381 * disassemble.c (ARCH_riscv): Define if ARCH_all.
382
6b6b6807
L
3832018-02-22 H.J. Lu <hongjiu.lu@intel.com>
384
385 * i386-opc.tbl: Add {rex},
386 * i386-tbl.h: Regenerated.
387
75f31665
MR
3882018-02-20 Maciej W. Rozycki <macro@mips.com>
389
390 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
391 (mips16_opcodes): Replace `M' with `m' for "restore".
392
e207bc53
TP
3932018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
394
395 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
396
87993319
MR
3972018-02-13 Maciej W. Rozycki <macro@mips.com>
398
399 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
400 variable to `function_index'.
401
68d20676
NC
4022018-02-13 Nick Clifton <nickc@redhat.com>
403
404 PR 22823
405 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
406 about truncation of printing.
407
d2159fdc
HW
4082018-02-12 Henry Wong <henry@stuffedcow.net>
409
410 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
411
f174ef9f
NC
4122018-02-05 Nick Clifton <nickc@redhat.com>
413
414 * po/pt_BR.po: Updated Brazilian Portuguese translation.
415
be3a8dca
IT
4162018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
417
418 * i386-dis.c (enum): Add pconfig.
419 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
420 (cpu_flags): Add CpuPCONFIG.
421 * i386-opc.h (enum): Add CpuPCONFIG.
422 (i386_cpu_flags): Add cpupconfig.
423 * i386-opc.tbl: Add PCONFIG instruction.
424 * i386-init.h: Regenerate.
425 * i386-tbl.h: Likewise.
426
3233d7d0
IT
4272018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
428
429 * i386-dis.c (enum): Add PREFIX_0F09.
430 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
431 (cpu_flags): Add CpuWBNOINVD.
432 * i386-opc.h (enum): Add CpuWBNOINVD.
433 (i386_cpu_flags): Add cpuwbnoinvd.
434 * i386-opc.tbl: Add WBNOINVD instruction.
435 * i386-init.h: Regenerate.
436 * i386-tbl.h: Likewise.
437
e925c834
JW
4382018-01-17 Jim Wilson <jimw@sifive.com>
439
440 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
441
d777820b
IT
4422018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
443
444 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
445 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
446 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
447 (cpu_flags): Add CpuIBT, CpuSHSTK.
448 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
449 (i386_cpu_flags): Add cpuibt, cpushstk.
450 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
451 * i386-init.h: Regenerate.
452 * i386-tbl.h: Likewise.
453
f6efed01
NC
4542018-01-16 Nick Clifton <nickc@redhat.com>
455
456 * po/pt_BR.po: Updated Brazilian Portugese translation.
457 * po/de.po: Updated German translation.
458
2721d702
JW
4592018-01-15 Jim Wilson <jimw@sifive.com>
460
461 * riscv-opc.c (match_c_nop): New.
462 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
463
616dcb87
NC
4642018-01-15 Nick Clifton <nickc@redhat.com>
465
466 * po/uk.po: Updated Ukranian translation.
467
3957a496
NC
4682018-01-13 Nick Clifton <nickc@redhat.com>
469
470 * po/opcodes.pot: Regenerated.
471
769c7ea5
NC
4722018-01-13 Nick Clifton <nickc@redhat.com>
473
474 * configure: Regenerate.
475
faf766e3
NC
4762018-01-13 Nick Clifton <nickc@redhat.com>
477
478 2.30 branch created.
479
888a89da
IT
4802018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
481
482 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
483 * i386-tbl.h: Regenerate.
484
cbda583a
JB
4852018-01-10 Jan Beulich <jbeulich@suse.com>
486
487 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
488 * i386-tbl.h: Re-generate.
489
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4902018-01-10 Jan Beulich <jbeulich@suse.com>
491
492 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
493 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
494 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
495 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
496 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
497 Disp8MemShift of AVX512VL forms.
498 * i386-tbl.h: Re-generate.
499
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5002018-01-09 Jim Wilson <jimw@sifive.com>
501
502 * riscv-dis.c (maybe_print_address): If base_reg is zero,
503 then the hi_addr value is zero.
504
91d8b670
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5052018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
506
507 * arm-dis.c (arm_opcodes): Add csdb.
508 (thumb32_opcodes): Add csdb.
509
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5102018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
511
512 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
513 * aarch64-asm-2.c: Regenerate.
514 * aarch64-dis-2.c: Regenerate.
515 * aarch64-opc-2.c: Regenerate.
516
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5172018-01-08 H.J. Lu <hongjiu.lu@intel.com>
518
519 PR gas/22681
520 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
521 Remove AVX512 vmovd with 64-bit operands.
522 * i386-tbl.h: Regenerated.
523
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JW
5242018-01-05 Jim Wilson <jimw@sifive.com>
525
526 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
527 jalr.
528
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5292018-01-03 Alan Modra <amodra@gmail.com>
530
531 Update year range in copyright notice of all files.
532
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5332018-01-02 Jan Beulich <jbeulich@suse.com>
534
535 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
536 and OPERAND_TYPE_REGZMM entries.
537
1e563868 538For older changes see ChangeLog-2017
3499769a 539\f
1e563868 540Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
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541
542Copying and distribution of this file, with or without modification,
543are permitted in any medium without royalty provided the copyright
544notice and this notice are preserved.
545
546Local Variables:
547mode: change-log
548left-margin: 8
549fill-column: 74
550version-control: never
551End:
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