[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stevens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

	* mips-dis.c (print_insn_args): Add mips_opcode argument.
	(print_insn_mips):  Adjust print_insn_args call.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stevens  <nigel@mips.com>

	* mips-dis.c (print_insn_args): Print $fcc only for FP
	instructions, use $cc elsewise.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stevens  <nigel@mips.com>

	* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
	Map MIPS16 registers to O32 names.
	(print_mips16_insn_arg): Use mips16_reg_names.

2006-04-26  Julian Brown  <julian@codesourcery.com>

	* arm-dis.c (print_insn_neon): Disassemble floating-point constant
	VMOV.

2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
	    Julian Brown  <julian@codesourcery.com>

	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
	%<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
	Add unified load/store instruction names.
	(neon_opcode_table): New.
	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	(arm_decode_bitfield): New.
	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	(print_insn_neon): New.
	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	(print_insn_thumb32): Likewise.

2006-04-19  Alan Modra  <amodra@bigpond.net.au>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.

2006-04-19  Alan Modra  <amodra@bigpond.net.au>

	* avr-dis.c (avr_operand): Warning fix.

	* configure: Regenerate.

2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>

	* po/POTFILES.in: Regenerated.

2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>

	PR binutils/2454
	* avr-dis.c (avr_operand): Arrange for a comment to appear before
	the symolic form of an address, so that the output of objdump -d
	can be reassembled.

2006-04-10  DJ Delorie  <dj@redhat.com>

	* m32c-asm.c: Regenerate.

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.am: Add install-html target.
	* Makefile.in: Regenerate.

2006-04-06  Nick Clifton  <nickc@redhat.com>

	* po/vi/po: Updated Vietnamese translation.

2006-03-31  Paul Koning  <ni1d@arrl.net>

	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.

2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>

	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	logic to identify halfword shifts.

2006-03-16  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.

2006-03-13  DJ Delorie  <dj@redhat.com>

	* m32c-asm.c: Regenerate.
	* m32c-desc.c: Likewise.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-ibld.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.

2006-03-10  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.


2006-03-09  Nick Clifton  <nickc@redhat.com>

	* po/sv.po: Updated Swedish translation.

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* i386-dis.c (REP_Fixup): New function.
	(AL): Remove duplicate.
	(Xbr): New.
	(Xvr): Likewise.
	(Ybr): Likewise.
	(Yvr): Likewise.
	(indirDXr): Likewise.
	(ALr): Likewise.
	(eAXr): Likewise.
	(dis386): Updated entries of ins, outs, movs, lods and stos.

2006-03-05  Nick Clifton  <nickc@redhat.com>

	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	signed 32-bit value into an unsigned 32-bit field when the host is
	a 64-bit machine.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-asm.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* openrisc-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)

	* xc16x-asm.c: Regenerate.
	* xc16x-dis.c: Regenerate.

2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add html target.

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.

2006-02-24  David S. Miller  <davem@sunset.davemloft.net>

	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	(v9_hpriv_reg_names): New table.
	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	New cases '$' and '%' for read/write hyperprivileged register.
	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	window handling and rdhpr/wrhpr instructions.
	
2006-02-24  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with linker relaxation attributes.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-opc.c: Likewise.

2006-02-24  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c: Update copyright years.
	* ia64-opc-b.c: Likewise.

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c (lookup_regindex): Handle ".vm".
	(print_dependency_table): Handle '\"'.

	* ia64-ic.tbl: Updated from SDM 2.2.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.

2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
            Anil Paranjape   <anilp1@kpitcummins.com>
            Shilin Shakti    <shilins@kpitcummins.com>

	* xc16x-desc.h: New file
	* xc16x-desc.c: New file
	* xc16x-opc.h: New file	
	* xc16x-opc.c: New file
	* xc16x-ibld.c: New file
	* xc16x-asm.c: New file
	* xc16x-dis.c: New file
	* Makefile.am: Entries for xc16x 
	* Makefile.in: Regenerate 
	* cofigure.in: Add xc16x target information.
	* configure: Regenerate.
	* disassemble.c: Add xc16x target information.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	moves.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c ('Z'): Add a new macro.
	(dis386_twobyte): Use "movZ" for control register moves.

2006-02-10  Nick Clifton  <nickc@redhat.com>

	* iq2000-asm.c: Regenerate.

2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>

	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.

2006-01-26  David Ung  <davidu@mips.com>

	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.

2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	disassembled.	
	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	buffer overflows when disassembling instructions like
	ld (ix+123),0x23
	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	operand, if the offset is negative.

2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	unsigned char to hold data to be disassembled.

2006-01-17  Andreas Schwab  <schwab@suse.de>

	PR binutils/1486
	* disassemble.c (disassemble_init_for_target): Set
	disassembler_needs_relocs for bfd_arch_arm.

2006-01-16  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
	f?add?, and f?sub? instructions.

2006-01-16  Nick Clifton  <nickc@redhat.com>

	* po/zh_CN.po: New Chinese (simplified) translation.
	* configure.in (ALL_LINGUAS): Add "zh_CH".
	* configure: Regenerate.

2006-01-05  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.

2006-01-06  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate.
	* m32c-opc.c: Regenerate.
	* m32c-opc.h: Regenerate.

2006-01-03  DJ Delorie  <dj@redhat.com>

	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	* m32c-ibld.c: Regenerated.

For older changes see ChangeLog-2005
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
cc0ca239 TS	1	2006-04-28 Thiemo Seufer <ths@mips.com>
	2	Nigel Stevens <nigel@mips.com>
	3	David Ung <davidu@mips.com>
	4
	5	* mips-dis.c (print_insn_args): Add mips_opcode argument.
	6	(print_insn_mips): Adjust print_insn_args call.
	7
0d09bfe6 TS	8	2006-04-28 Thiemo Seufer <ths@mips.com>
	9	Nigel Stevens <nigel@mips.com>
	10
	11	* mips-dis.c (print_insn_args): Print $fcc only for FP
	12	instructions, use $cc elsewise.
	13
654c225a TS	14	2006-04-28 Thiemo Seufer <ths@mips.com>
	15	Nigel Stevens <nigel@mips.com>
	16
	17	* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
	18	Map MIPS16 registers to O32 names.
	19	(print_mips16_insn_arg): Use mips16_reg_names.
	20
0dbde4cf JB	21	2006-04-26 Julian Brown <julian@codesourcery.com>
	22
	23	* arm-dis.c (print_insn_neon): Disassemble floating-point constant
	24	VMOV.
	25
16980d0b JB	26	2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
	27	Julian Brown <julian@codesourcery.com>
	28
	29	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
	30	%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
	31	Add unified load/store instruction names.
	32	(neon_opcode_table): New.
	33	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	34	(arm_decode_bitfield): New.
	35	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	36	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	37	(print_insn_neon): New.
	38	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	39	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	40	(print_insn_thumb32): Likewise.
	41
ec3fcc56 AM	42	2006-04-19 Alan Modra <amodra@bigpond.net.au>
	43
	44	* Makefile.am: Run "make dep-am".
	45	* Makefile.in: Regenerate.
	46
241a6c40 AM	47	2006-04-19 Alan Modra <amodra@bigpond.net.au>
241a6c40 AM	48
7c6646cd AM	49	* avr-dis.c (avr_operand): Warning fix.
7c6646cd AM	50
241a6c40 AM	51	* configure: Regenerate.
241a6c40 AM	52
e7403566 DJ	53	2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
	54
	55	* po/POTFILES.in: Regenerated.
	56
52f16a0e NC	57	2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
	58
	59	PR binutils/2454
	60	* avr-dis.c (avr_operand): Arrange for a comment to appear before
	61	the symolic form of an address, so that the output of objdump -d
	62	can be reassembled.
	63
e78efa90 DD	64	2006-04-10 DJ Delorie <dj@redhat.com>
	65
	66	* m32c-asm.c: Regenerate.
	67
108a6f8e CD	68	2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
	69
	70	* Makefile.am: Add install-html target.
	71	* Makefile.in: Regenerate.
	72
a135cb2c NC	73	2006-04-06 Nick Clifton <nickc@redhat.com>
	74
	75	* po/vi/po: Updated Vietnamese translation.
	76
47426b41 AM	77	2006-03-31 Paul Koning <ni1d@arrl.net>
	78
	79	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
	80
331f1cbe BS	81	2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
	82
	83	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	84	logic to identify halfword shifts.
	85
c16d2bf0 PB	86	2006-03-16 Paul Brook <paul@codesourcery.com>
	87
	88	* arm-dis.c (arm_opcodes): Rename swi to svc.
	89	(thumb_opcodes): Ditto.
	90
5348b81e DD	91	2006-03-13 DJ Delorie <dj@redhat.com>
5348b81e DD	92
5398310a DD	93	* m32c-asm.c: Regenerate.
	94	* m32c-desc.c: Likewise.
	95	* m32c-desc.h: Likewise.
	96	* m32c-dis.c: Likewise.
	97	* m32c-ibld.c: Likewise.
5348b81e DD	98	* m32c-opc.c: Likewise.
	99	* m32c-opc.h: Likewise.
	100
253d272c DD	101	2006-03-10 DJ Delorie <dj@redhat.com>
	102
	103	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	104	* m32c-opc.c: Likewise.
	105	* m32c-opc.h: Likewise.
	106
	107
f530741d NC	108	2006-03-09 Nick Clifton <nickc@redhat.com>
	109
	110	* po/sv.po: Updated Swedish translation.
	111
35c52694 L	112	2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
	113
	114	PR binutils/2428
	115	* i386-dis.c (REP_Fixup): New function.
	116	(AL): Remove duplicate.
	117	(Xbr): New.
	118	(Xvr): Likewise.
	119	(Ybr): Likewise.
	120	(Yvr): Likewise.
	121	(indirDXr): Likewise.
	122	(ALr): Likewise.
	123	(eAXr): Likewise.
	124	(dis386): Updated entries of ins, outs, movs, lods and stos.
	125
ed963e2d NC	126	2006-03-05 Nick Clifton <nickc@redhat.com>
	127
	128	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	129	signed 32-bit value into an unsigned 32-bit field when the host is
	130	a 64-bit machine.
	131	* fr30-ibld.c: Regenerate.
	132	* frv-ibld.c: Regenerate.
	133	* ip2k-ibld.c: Regenerate.
	134	* iq2000-asm.c: Regenerate.
	135	* iq2000-ibld.c: Regenerate.
	136	* m32c-ibld.c: Regenerate.
	137	* m32r-ibld.c: Regenerate.
	138	* openrisc-ibld.c: Regenerate.
	139	* xc16x-ibld.c: Regenerate.
	140	* xstormy16-ibld.c: Regenerate.
	141
c7d41dc5 NC	142	2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
	143
	144	* xc16x-asm.c: Regenerate.
	145	* xc16x-dis.c: Regenerate.
c7d41dc5	146
f7d9e5c3 CD	147	2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
	148
	149	* po/Make-in: Add html target.
	150
331d2d0d L	151	2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
	152
	153	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	154	Intel Merom New Instructions.
	155	(THREE_BYTE_0): Likewise.
	156	(THREE_BYTE_1): Likewise.
	157	(three_byte_table): Likewise.
	158	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	159	THREE_BYTE_1 for entry 0x3a.
	160	(twobyte_has_modrm): Updated.
	161	(twobyte_uses_SSE_prefix): Likewise.
	162	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	163	Instructions.
	164
ff3f9d5b DM	165	2006-02-24 David S. Miller <davem@sunset.davemloft.net>
	166
	167	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	168	(v9_hpriv_reg_names): New table.
	169	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	170	New cases '$' and '%' for read/write hyperprivileged register.
	171	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	172	window handling and rdhpr/wrhpr instructions.
	173
6772dd07 DD	174	2006-02-24 DJ Delorie <dj@redhat.com>
	175
	176	* m32c-desc.c: Regenerate with linker relaxation attributes.
	177	* m32c-desc.h: Likewise.
	178	* m32c-dis.c: Likewise.
	179	* m32c-opc.c: Likewise.
	180
62b3e311 PB	181	2006-02-24 Paul Brook <paul@codesourcery.com>
	182
	183	* arm-dis.c (arm_opcodes): Add V7 instructions.
	184	(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
	185	(print_arm_address): New function.
	186	(print_insn_arm): Use it. Add 'P' and 'U' cases.
	187	(psr_name): New function.
	188	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
	189
59cf82fe L	190	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	191
	192	* ia64-opc-i.c (bXc): New.
	193	(mXc): Likewise.
	194	(OpX2TaTbYaXcC): Likewise.
	195	(TF). Likewise.
	196	(TFCM). Likewise.
	197	(ia64_opcodes_i): Add instructions for tf.
	198
	199	* ia64-opc.h (IMMU5b): New.
	200
	201	* ia64-asmtab.c: Regenerated.
	202
19a7219f L	203	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	204
	205	* ia64-gen.c: Update copyright years.
	206	* ia64-opc-b.c: Likewise.
	207
7f3dfb9c L	208	2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
	209
	210	* ia64-gen.c (lookup_regindex): Handle ".vm".
	211	(print_dependency_table): Handle '\"'.
	212
	213	* ia64-ic.tbl: Updated from SDM 2.2.
	214	* ia64-raw.tbl: Likewise.
	215	* ia64-waw.tbl: Likewise.
	216	* ia64-asmtab.c: Regenerated.
	217
	218	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
	219
d70c5fc7 NC	220	2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
	221	Anil Paranjape <anilp1@kpitcummins.com>
	222	Shilin Shakti <shilins@kpitcummins.com>
	223
	224	* xc16x-desc.h: New file
	225	* xc16x-desc.c: New file
	226	* xc16x-opc.h: New file
	227	* xc16x-opc.c: New file
	228	* xc16x-ibld.c: New file
	229	* xc16x-asm.c: New file
	230	* xc16x-dis.c: New file
	231	* Makefile.am: Entries for xc16x
	232	* Makefile.in: Regenerate
	233	* cofigure.in: Add xc16x target information.
	234	* configure: Regenerate.
	235	* disassemble.c: Add xc16x target information.
	236
a1cfb73e L	237	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	238
	239	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	240	moves.
	241
6dd5059a L	242	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	243
	244	* i386-dis.c ('Z'): Add a new macro.
	245	(dis386_twobyte): Use "movZ" for control register moves.
	246
8536c657 NC	247	2006-02-10 Nick Clifton <nickc@redhat.com>
	248
	249	* iq2000-asm.c: Regenerate.
	250
266abb8f NS	251	2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
	252
	253	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
	254
f1a64f49 DU	255	2006-01-26 David Ung <davidu@mips.com>
	256
	257	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	258	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	259	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	260	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	261	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
	262
9e919b5f AM	263	2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
	264
	265	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	266	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	267	disassembled.
	268	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	269	buffer overflows when disassembling instructions like
	270	ld (ix+123),0x23
	271	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	272	operand, if the offset is negative.
	273
c9021189 AM	274	2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
	275
	276	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	277	unsigned char to hold data to be disassembled.
	278
d99b6465 AS	279	2006-01-17 Andreas Schwab <schwab@suse.de>
	280
	281	PR binutils/1486
	282	* disassemble.c (disassemble_init_for_target): Set
	283	disassembler_needs_relocs for bfd_arch_arm.
	284
c2fe9327 PB	285	2006-01-16 Paul Brook <paul@codesourcery.com>
c2fe9327 PB	286
e88d958a	287	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327 PB	288	f?add?, and f?sub? instructions.
c2fe9327 PB	289
32fba81d NC	290	2006-01-16 Nick Clifton <nickc@redhat.com>
	291
	292	* po/zh_CN.po: New Chinese (simplified) translation.
	293	* configure.in (ALL_LINGUAS): Add "zh_CH".
	294	* configure: Regenerate.
	295
1b3a26b5 PB	296	2006-01-05 Paul Brook <paul@codesourcery.com>
	297
	298	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
	299
db313fa6 DD	300	2006-01-06 DJ Delorie <dj@redhat.com>
	301
	302	* m32c-desc.c: Regenerate.
	303	* m32c-opc.c: Regenerate.
	304	* m32c-opc.h: Regenerate.
	305
54d46aca DD	306	2006-01-03 DJ Delorie <dj@redhat.com>
	307
	308	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	309	* m32c-ibld.c: Regenerated.
	310
e88d958a	311	For older changes see ChangeLog-2005
252b5132 RH	312	\f
252b5132 RH	313	Local Variables:
2f6d2f85 NC	314	mode: change-log
	315	left-margin: 8
	316	fill-column: 74
252b5132 RH	317	version-control: never
252b5132 RH	318	End: