projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
2009-11-17 Quentin Neill <quentin.neill@amd.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
ccc5981b
SP		 12009-11-17 Quentin Neill <quentin.neill@amd.com>
2 Sebastian Pop <sebastian.pop@amd.com>
3
4 * i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
5 decoding the second source operand from the immediate byte.
6 (OP_EX_VexW): Pass an extra integer to identify the second
7 and third source arguments.
8
18d0c96e
L		 92009-11-19 H.J. Lu <hongjiu.lu@intel.com>
10
11 * i386-opc.tbl: Add IsLockable to cmpxch16b.
12 * i386-tbl.h: Regenerated.
13
945ee430
NC		 142009-11-19 Nick Clifton <nickc@redhat.com>
15
16 PR binutils/10924
17 * arm-dis.c (print_insn_arm): Do not print an offset of zero when
18 decoding Immediaate Offset addressing.
19
41effecb
SP		 202009-11-18 Sebastian Pop <sebastian.pop@amd.com>
21
22 PR binutils/10973
23 * i386-dis.c (get_vex_imm8): Do not increment codep.
24 Avoid incrementing bytes_before_imm when OP_E_memory
25 has already forwarded the codep pointer.
26 (OP_EX_VexW): Increment codep to skip mod/rm byte.
27
f0ae4a24
SP		 282009-11-18 Sebastian Pop <sebastian.pop@amd.com>
29
30 * i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
31 (VEX_LEN_XOP_08_A1): Removed.
32 (xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
33 VEX_LEN_XOP_08_A1.
34 (vex_len_table): Same.
35 * i386-gen.c (CPU_CVT16_FLAGS): Removed.
36 (cpu_flags): Remove field for CpuCVT16.
37 * i386-opc.h (CpuCVT16): Removed.
38 (i386_cpu_flags): Remove bitfield cpucvt16.
39 (i386-opc.tbl): Remove CVT16 instructions.
40 * i386-init.h: Regenerated.
41 * i386-tbl.h: Regenerated.
42
5dd85c99
SP		 432009-11-17 Sebastian Pop <sebastian.pop@amd.com>
44 Quentin Neill <quentin.neill@amd.com>
45
46 * i386-dis.c (OP_Vex_2src_1): New.
47 (OP_Vex_2src_2): New.
48 (Vex_2src_1): New.
49 (Vex_2src_2): New.
50 (XOP_08): Added.
51 (VEX_LEN_XOP_08_A0): Added.
52 (VEX_LEN_XOP_08_A1): Added.
53 (VEX_LEN_XOP_09_80): Added.
54 (VEX_LEN_XOP_09_81): Added.
55 (xop_table): Added an entry for XOP_08. Handle xop instructions.
56 (vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
57 VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
58 (get_valid_dis386): Handle XOP_08.
59 (OP_Vex_2src): New.
60 * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
61 (cpu_flags): Add CpuXOP and CpuCVT16.
62 (opcode_modifiers): Add XOP08, Vex2Sources.
63 * i386-opc.h (CpuXOP): Added.
64 (CpuCVT16): Added.
65 (i386_cpu_flags): Add cpuxop and cpucvt16.
66 (XOP08): Added.
67 (Vex2Sources): Added.
68 (i386_opcode_modifier): Add xop08, vex2sources.
69 * i386-opc.tbl: Add entries for XOP and CVT16 instructions.
70 * i386-init.h: Regenerated.
71 * i386-tbl.h: Regenerated.
72
aefd8a40
NC		 732009-11-17 Nick Clifton <nickc@redhat.com>
74
75 PR binutils/10924
76 * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
77 instruction variants. Add pattern for MRS variant that was being
78 confused with CMP.
79 (arm_decode_shift): Place error message in a comment.
80 (print_insn_arm): Note that writing back to the PC is
81 unpredictable.
82 Only print 'p' variants of cmp/cmn/teq/tst instructions if
83 decoding for pre-V6 architectures.
84
0bb027fd
RR		 852009-11-17 Edward Nevill <edward.nevill@arm.com>
86
87 * arm-dis.c (print_insn_thumb32): Handle undefined instruction.
88
c7e770a0
DE		 892009-11-14 Doug Evans <dje@sebabeach.org>
90
91 * Makefile.am (stamp-xc16x): Use ../cpu/xc16x.cpu instead of
92 ../cgen/cpu.
93 * Makefile.in: Regenerate.
94
8b3f93e7
L		 952009-11-13 H.J. Lu <hongjiu.lu@intel.com>
96
97 * i386-dis.c (OP_E_extended): Removed.
98
2a70cca4
L		 992009-11-13 H.J. Lu <hongjiu.lu@intel.com>
100
101 * i386-dis.c (print_insn): Check rex_ignored.
102
f16cd0d5
L		 1032009-11-13 H.J. Lu <hongjiu.lu@intel.com>
104
105 * i386-dis.c (ckprefix): Updated to return 0 if number of
106 prefixes > 14 and record the last position for each prefix.
107 (lock_prefix): Removed.
108 (data_prefix): Likewise.
109 (addr_prefix): Likewise.
110 (repz_prefix): Likewise.
111 (repnz_prefix): Likewise.
112 (last_lock_prefix): New.
113 (last_repz_prefix): Likewise.
114 (last_repnz_prefix): Likewise.
115 (last_data_prefix): Likewise.
116 (last_addr_prefix): Likewise.
117 (last_rex_prefix): Likewise.
118 (last_seg_prefix): Likewise.
119 (MAX_CODE_LENGTH): Likewise.
120 (ADDR16_PREFIX): Likewise.
121 (ADDR32_PREFIX): Likewise.
122 (DATA16_PREFIX): Likewise.
123 (DATA32_PREFIX): Likewise.
124 (REP_PREFIX): Likewise.
125 (seg_prefix): Likewise.
126 (all_prefixes): Change size to MAX_CODE_LENGTH - 1.
127 (prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
128 DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
129 (get_valid_dis386): Updated.
130 (OP_C): Likewise.
131 (OP_Monitor): Likewise.
132 (REP_Fixup): Likewise.
133 (print_insn): Display all prefixes.
134 (putop): Set PREFIX_DATA on used_prefixes only if it is used.
135 (intel_operand_size): Likewise.
136 (OP_E_register): Likewise.
137 (OP_G): Likewise.
138 (OP_REG): Likewise.
139 (OP_IMREG): Likewise.
140 (OP_I): Likewise.
141 (OP_I64): Likewise.
142 (OP_sI): Likewise.
143 (CRC32_Fixup): Likewise.
144 (MOVBE_Fixup): Likewise.
145 (OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
146 in 16bit mode.
147 (OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
148 used_prefixes only if it is used.
149
20efc689
L		 1502009-11-12 H.J. Lu <hongjiu.lu@intel.com>
151
152 * i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
153 or, sbb, sub, xor and xchg with register only operands.
154 * i386-tbl.h: Regenerated.
155
c32fa91d
L		 1562009-11-12 H.J. Lu <hongjiu.lu@intel.com>
157
158 * i386-gen.c (opcode_modifiers): Add IsLockable.
159
160 * i386-opc.h (IsLockable): New.
161 (i386_opcode_modifier): Add islockable.
162
163 * i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
164 bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
165 xor, xadd and xchg.
166 * i386-tbl.h: Regenerated.
167
79862e45
DJ		 1682009-11-12 Daniel Jacobowitz <dan@codesourcery.com>
169
170 * arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove
171 generic coprocessor instructions for FPA loads and stores.
172 (print_insn_coprocessor): Remove %C support. Display address for
173 PC-relative offsets in %A.
174
f310f33d
L		 1752009-11-11 H.J. Lu <hongjiu.lu@intel.com>
176
177 * i386-dis.c (all_prefixes): New.
178 (ckprefix): Set all_prefixes.
179 (print_insn): Print all_prefixes instead of lock_prefix,
180 repz_prefix, repnz_prefix, addr_prefix and data_prefix.
181
c1e26897
NC		 1822009-11-11 Nick Clifton <nickc@redhat.com>
183
184 PR binutils/10924
185 * arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
186 (print_insn_arm): Extend %s format control code to check for
187 unpredictable addressing modes. Add support for %S format control
188 code which suppresses this check.
189 (W_BIT, I_BIT, U_BIT, P_BIT): New macros.
190 (WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
191 PRE_BIT_SET): New macros.
192 (print_insn_coprocessor): Use the new macros instead of magic
193 constants.
194 (print_arm_address): Likewise.
195 (pirnt_insn_arm): Likewise.
196 (print_insn_thumb32): Likewise.
197
41327c9d
NC		 1982009-11-11 Nick Clifton <nickc@redhat.com>
199
200 * po/id.po: Updated Indonesian translation.
201
0d999f33
MK		 2022009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com>
203
204 * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
205
c48244a5
SP		 2062009-11-06 Sebastian Pop <sebastian.pop@amd.com>
207
208 * i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
209 reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
210 B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
211 the xop_table.
212 (get_valid_dis386): Removed unused condition (from cut/n/paste) for
213 XOP instructions.
214
f88c9eb0
SP		 2152009-11-05 Sebastian Pop <sebastian.pop@amd.com>
216 Quentin Neill <quentin.neill@amd.com>
217
218 * opcodes/i386-dis.c (OP_LWPCB_E): New.
219 (OP_LWP_E): New.
220 (OP_LWP_I): New.
221 (USE_XOP_8F_TABLE): New.
222 (XOP_8F_TABLE): New.
223 (REG_XOP_LWPCB): New.
224 (REG_XOP_LWP): New.
225 (XOP_09): New.
226 (XOP_0A): New.
227 (reg_table): Redirect REG_8F to XOP_8F_TABLE.
228 Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
229 (xop_table): New.
230 (get_valid_dis386): Handle USE_XOP_8F_TABLE.
231 Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
232 to access to the vex_table.
233 (OP_LWPCB_E): New.
234 (OP_LWP_E): New.
235 (OP_LWP_I): New.
236 * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
237 (cpu_flags): Add CpuLWP.
238 (opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
239 * opcodes/i386-opc.h (CpuLWP): New.
240 (i386_cpu_flags): Add bit cpulwp.
241 (VexLWP): New.
242 (XOP09): New.
243 (XOP0A): New.
244 (i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
245 * opcodes/i386-opc.tbl (llwpcb): Added.
246 (lwpval): Added.
247 (lwpins): Added.
248
0d734b5d
DD		 2492009-11-04 DJ Delorie <dj@redhat.com>
250
251 * rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
252 (mvtcp, mvfcp, opecp): Remove.
253 * rx-decode.c: Regenerate.
254 * rx-dis.c (cpen): Remove.
255
d51b88d3
DE		 2562009-11-03 Doug Evans <dje@sebabeach.org>
257
258 * m32c-desc.c: Regenerate.
259 * mep-desc.c: Regenerate.
260
62f3b8c8
PB		 2612009-11-02 Paul Brook <paul@codesourcery.com>
262
263 * arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
264 Add VFPv4 instructions.
265
206c2556
L		 2662009-10-29 Sebastian Pop <sebastian.pop@amd.com>
267
268 * i386-dis.c (OP_VEX_FMA): Removed.
269 (VexFMA): Removed.
270 (Vex128FMA): Removed.
271 (prefix_table): First source operand of FMA4 insns is decoded
272 with Vex not with VexFMA.
273 (OP_EX_VexW): Second source operand is decoded with get_vex_imm8
274 when vex.w is set. Third source operand is decoded with
275
a2b2318d
AM		 2762009-10-27 Alan Modra <amodra@bigpond.net.au>
277
278 * Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.
279 * Makefile.in: Regenerate.
280 * po/POTFILES.in: Regenerate.
281
ac1e9eca
DE		 2822009-10-23 Doug Evans <dje@sebabeach.org>
283
284 * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h.
285 * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h.
286 * cgen-bitset.c: Update.
287 * fr30-desc.h: Regenerate.
288 * frv-desc.h: Regenerate.
289 * ip2k-desc.h: Regenerate.
290 * iq2000-desc.h: Regenerate.
291 * lm32-desc.h: Regenerate.
292 * m32c-desc.h: Regenerate.
293 * m32c-opc.h: Regenerate.
294 * m32r-desc.h: Regenerate.
295 * mep-desc.h: Regenerate.
296 * mt-desc.h: Regenerate.
297 * openrisc-desc.h: Regenerate.
298 * xc16x-desc.h: Regenerate.
299 * xstormy16-desc.h: Regenerate.
300
f282425e
DD		 3012009-10-22 DJ Delorie <dj@redhat.com>
302
303 * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
304 * rx-decode.c: Regenerated.
305
4b06377f
L		 3062009-10-20 H.J. Lu <hongjiu.lu@intel.com>
307
308 PR gas/10775
309 * i386-dis.c: Document LB, LS and LV macros.
310 (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
311 with the 64-bit displacement or immediate operand.
312 (putop): Handle LB, LS and LV macros.
313
cedb97b6
DE		 3142009-10-18 Doug Evans <dje@sebabeach.org>
315
316 * lm32-opinst.c: Regenerate.
317 * m32c-desc.c: Regenerate.
318 * m32r-opinst.c: Regenerate.
319 * openrisc-ibld.c: Regenerate.
320 * xc16x-desc.c: Regenerate.
321 * xc16x-desc.h: Regenerate.
322
d1119f7a
DE		 3232009-10-17 Doug Evans <dje@sebabeach.org>
324
325 * Makefile.am (CGEN_CPUS): Add iq2000, lm32.
326 (FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are
327 sorted alphabetically.
328 (stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen
329 stamp-* rules are sorted alphabetically.
330 * Makefile.in: Regenerate.
331
52a6c1fe
L		 3322009-10-16 H.J. Lu <hongjiu.lu@intel.com>
333
334 * i386-opc.h: Use enum instead of nested macros.
335
3873ba12
L		 3362009-10-16 H.J. Lu <hongjiu.lu@intel.com>
337
338 * i386-dis.c: Simplify enums.
339
51e7da1b
L		 3402009-10-15 H.J. Lu <hongjiu.lu@intel.com>
341 Ineiev <ineiev@gmail.com>
342
343 PR binutils/10767
344 * i386-dis.c: Use enum instead of nested macros.
345
c39846ed
L		 3462009-10-15 H.J. Lu <hongjiu.lu@intel.com>
347
348 * i386-dis.c (MAX_BYTEMODE): Removed.
349
6a327e17
AM		 3502009-10-14 Tomas Hurka <tom@hukatronic.cz>
351
352 PR 969
353 * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
354
55b126d4
L		 3552009-10-13 H.J. Lu <hongjiu.lu@intel.com>
356
357 * i386-dis.c (print_insn): Always clear need_vex, need_vex_reg
358 and vex_w_done.
359
ef299415
ME		 3602009-10-07 Michael Eager <eager@eagercon.com>
361
55b126d4 362 * microblaze-dis.c: Add include for microblaze-dis.h,
ef299415 363 eliminate local extern decls.
55b126d4 364 * microblaze-dis.h: New.
ef299415 365
245caaea
NC		 3662009-10-06 Nick Clifton <nickc@redhat.com>
367
368 * po/fi.po: Updated Finnish translation.
369
49293ef7
NC		 3702009-10-03 Andreas Schwab <schwab@linux-m68k.org>
371
372 * opc2c.c: Include "libiberty.h" and <errno.h>.
373 (orig_filename): Constify.
374 (dump_lines): Fix line number directive.
375 (main): Set orig_filename to basename of input file. Use
376 xstrerror.
377
378 * Makefile.am (rx-dis.lo): Remove explicit dependencies.
379 ($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD)
380 instead of $(EXEEXT).
381 (opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use
382 $(LINK_FOR_BUILD). Link with libiberty.
383 (MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD).
384 (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c.
385 * Makefile.in: Regenerated.
386 * rx-decode.c: Regenerated.
387
8977d4b2
AM		 3882009-10-03 Paul Reed <paulreed@paddedcell.com>
389
390 * arm-dis.c (print_insn): Check symtab_size not *symtab.
391
f98fa534
L		 3922009-10-02 H.J. Lu <hongjiu.lu@intel.com>
393
394 * i386-opc.tbl: Drop Disp64 on jump and loop instructions.
395 * i386-tbl.h: Regenerated.
396
9fe54b1c
PB		 3972009-10-02 Peter Bergner <bergner@vnet.ibm.com>
398
399 * ppc-dis.c (ppc_opts): Add "476" entry.
400 * ppc-opc.c (PPC476): Define.
401 (powerpc_opcodes): Update mnemonics where required for 476.
402
634b50f2
PB		 4032009-10-01 Peter Bergner <bergner@vnet.ibm.com>
404
405 * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
406 * ppc-dis.c (ppc_opts): Likewise.
407 Rename "ppca2" to "a2".
408
4ded9dda
SR		 4092009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
410
411 * crx-dis.c (match_opcode): Truncate mcode to 32-bit.
412
c7927a3c
NC		 4132009-09-29 DJ Delorie <dj@redhat.com>
414
415 * Makefile.am: Add RX files.
416 * configure.in: Add support for RX target.
417 * disassemble.c: Likewise.
418 * Makefile.in: Regenerate.
419 * configure: Regenerate.
420 * opc2c.c: New file.
421 * rx-decode.c: New file.
422 * rx-decode.opc: New file.
423 * rx-dis.c: New file.
424
8765b556
PB		 4252009-09-29 Peter Bergner <bergner@vnet.ibm.com>
426
427 * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
428 "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
429
fe2d172c
ME		 4302009-09-25 Michael Eager <eager@eagercon.com>
431
e0c483d6
AM		 432 * microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address,
433 microblaze_decode_insn): Add declarations.
434 (get_delay_slots_microblaze): Remove.
fe2d172c 435
21d799b5
NC		 4362009-09-25 Martin Thuresson <martint@google.com>
437
e0c483d6 438 Update sources to make arc and arm targets compile cleanly with
21d799b5
NC		 439 -Wc++-compat:
440 * arc-dis.c Fix casts.
441 * arc-ext.c: Add casts.
442 * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
443 enum.
444
2bf05e57
L		 4452009-09-24 H.J. Lu <hongjiu.lu@intel.com>
446
447 * i386-gen.c (opcode_modifiers): Remove Vex256.
448 (set_bitfield): Handle XXX=V.
449
450 * i386-opc.h (Vex): Update comments.
451 (Vex256): Removed.
452 (VexNDS): Updated.
e0c483d6 453 (i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
2bf05e57
L		 454
455 * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
456 * i386-tbl.h: Regenerated.
457
8a00d392
NC		 4582009-09-23 Nick Clifton <nickc@redhat.com>
459
460 * po/fr.po: Updated French translation.
461
e0d602ec
BE		 4622009-09-21 Ben Elliston <bje@au.ibm.com>
463 Peter Bergner <bergner@vnet.ibm.com>
464
465 * ppc-dis.c (ppc_opts): Add "ppca2" entry.
466 * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
467 eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
468 icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
469 ici mnemonics.
470 (ERAT_T): New operand.
471 (XWC_MASK): New mask.
472 (XOPL2): New macro.
473 (PPCA2): Define.
474
ca58b19f
NC		 4752009-09-18 Nick Clifton <nickc@redhat.com>
476
477 * po/es.po: Updated Spanish translation.
478 * po/vi.po: Updated Vietnamese translation.
479
05203043
L		 4802009-09-15 H.J. Lu <hongjiu.lu@intel.com>
481
482 * i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
483 disp == -disp.
484
df58f7b0
NC		 4852009-09-14 Nick Clifton <nickc@redhat.com>
486
487 * po/nl.po: Updated Dutch translation.
488
1e9cc1c2
NC		 4892009-09-11 Nick Clifton <nickc@redhat.com>
490
491 * po/opcodes.pot: Updated by the Translation project.
492
4932009-09-11 Martin Thuresson <martint@google.com>
494
495 Updated sources to compile cleanly with -Wc++-compat:
496 * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
497 * ldcref.c: Add casts.
498 * ldctor.c: Add casts.
499 * ldexp.c
500 * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
501 * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
502 * ldlang.h (enum statement_enum): Move to top level.
503 * ldmain.c: Add casts.
504 * ldwrite.c: Add casts.
505 * lexsup.c: Add casts. (enum control_enum): Move to top level.
506 * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
507
c8676ae4 5082009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 509
c8676ae4
AK		 510 * s390-dis.c (print_insn_s390): Avoid 'long long'.
511
7330f9c3 5122009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 513
7330f9c3
AK		 514 * s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
515 (print_insn_s390): Signextend and shift pcrel operands before printing.
516
9daa0d29
L		 5172009-09-09 H.J. Lu <hongjiu.lu@intel.com>
518
519 * i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
520 VEX_LEN_AE_R_X_M_0 in comments.
521
495c5f87
DD		 5222009-09-08 DJ Delorie <dj@redhat.com>
523
524 * mep-opc.c: Regenerate.
525
84c71969
AS		 5262009-09-08 Andreas Schwab <schwab@linux-m68k.org>
527
528 * z8kgen.c (struct op): Replace unused flavor with id.
529 (opt): Remove extra xorb entry.
530 (func): Use id field as fallback.
531 (sub): Return new string, caller changed.
532 (internal): Allocate end marker. Assign unique id before sorting.
533 (gas): Likewise. Fix loop end condition.
534 * z8k-opc.h: Regenerate.
535
bdc7fcfe
AM		 5362009-09-08 Alan Modra <amodra@bigpond.net.au>
537
538 * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
539
815c0482
AM		 5402009-09-07 Alan Modra <amodra@bigpond.net.au>
541
542 * z8kgen.c (func): Fix thinko last patch.
543
eae14d64
AM		 5442009-09-07 Alan Modra <amodra@bigpond.net.au>
545
546 * z8kgen.c (func): Stabilize qsort of identically named entries.
547 * z8k-opc.h: Regenerate.
548
23f938f1
TG		 5492009-09-07 Tristan Gingold <gingold@adacore.com>
550
551 * po/opcodes.pot: Regenerate.
552
2eee5593
AM		 5532009-09-07 Alan Modra <amodra@bigpond.net.au>
554
555 * configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
556 * configure: Regenerate.
557 * Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
558 (BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
559 (i386-gen, ia64-gen, z8kgen): ..here.
560 * Makefile.in: Regenerate.
561
ae794f60
TG		 5622009-09-07 Tristan Gingold <gingold@adacore.com>
563
564 * z8k-opc.h: Regenerate.
565
96d56e9f
NC		 5662009-09-05 Martin Thuresson <martin@mtme.org>
567
568 * ia64-dis.c (print_insn_ia64): Update code to use renamed member.
569 * m88k-dis.c (m88kdis): Rename variable class to in_class.
570 * tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol):
571 Rename argument class to symbol_class.
572
66a6900a
JZ		 5732009-09-04 Jie Zhang <jie.zhang@analog.com>
574
575 * bfin-dis.c (decode_pseudodbg_assert_0): Change according
576 to the new encoding of DBGA, DBGAH, and DBGAL.
577 (_print_insn_bfin): Likewise.
578
ad15c38e
JZ		 5792009-09-03 Jie Zhang <jie.zhang@analog.com>
580
581 * bfin-dis.c (_print_insn_bfin): Don't declare.
582 (print_insn_bfin): Don't declare.
583 (dregs_pair): Remove.
584 (ignore_bits): Remove.
585 (ccstat): Remove.
586
c958a8a8
JZ		 5872009-09-03 Jie Zhang <jie.zhang@analog.com>
588
589 * bfin-dis.c (IS_DREG): Define.
590 (IS_PREG): Define.
591 (IS_AREG): Define.
592 (IS_GENREG): Define.
593 (IS_DAGREG): Define.
594 (IS_SYSREG): Define.
595 (decode_REGMV_0): Check illegal register move instructions.
596
3df5879c
DK		 5972009-09-03 Dave Korn <dave.korn.cygwin@gmail.com>
598
599 * Makefile.am (BUILD_LIBINTL): New variable.
600 (i386-gen$(EXEEXT_FOR_BUILD)): Use it.
601 (ia64-gen$(EXEEXT_FOR_BUILD)): And here.
602 (z8kgen$(EXEEXT_FOR_BUILD)): And here.
603 * Makefile.in: Regenerate.
604
05316052
DD		 6052009-09-01 DJ Delorie <dj@redhat.com>
606
607 * mep-asm.c: Regenerate.
608 * mep-desc.c: Regenerate.
609 * mep-opc.c: Regenerate.
610
e06ae0d4
TG		 6112009-09-01 Tristan Gingold <gingold@adacore.com>
612
613 * makefile.vms: Ported to Itanium VMS. Remove useless targets and
614 dependencies. Remove unused FORMAT variable.
615 * configure.com: New file to create build.com DCL script for
616 Itanium VMS or Alpha VMS.
617
d3ce72d0
NC		 6182009-08-29 Martin Thuresson <martin@mtme.org>
619
620 * cris-dis.c (bytes_to_skip): Update code to use new name.
621 * i386-dis.c (putop): Update code to use new name.
622 * i386-gen.c (process_i386_opcodes): Update code to use
623 new name.
624 * i386-opc.h (struct template): Rename struct template to
625 insn_template. Update code accordingly.
626 * i386-tbl.h (i386_optab): Update type to use new name.
627 * ia64-dis.c (print_insn_ia64): Rename variable template
628 to template_val.
629 * tic30-dis.c (struct instruction, get_tic30_instruction):
630 Update code to use new name.
631 * tic54x-dis.c (has_lkaddr, get_insn_size)
632 (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
633 Update code to use new name.
634 * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
635 Update type to new name.
636 * z8kgen.c (internal, gas): Rename variable new to new_op.
637
791f3971
L		 6382009-08-28 H.J. Lu <hongjiu.lu@intel.com>
639
640 * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
641 Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
642 (LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
643 CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
644 * Makefile.in: Regenerated.
645
573e8a1c
RW		 6462009-08-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
647
648 * Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
649 [INSTALL_LIBBFD]: ... here, ...
650 [INSTALL_LIBBFD]: ... and empty overrides here.
651 [!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
652 [!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
653 * Makefile.in: Regenerate.
654 * configure: Regenerate.
655
f7922329
NC		 6562009-08-26 Philippe De Muyter <phdm@macqel.be>
657
658 * m68k-dis.c (print_insn_arg): Add movecr register names for
659 coldfire v4e families.
660
ff13a42d
RW		 6612009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
662
663 * Makefile.am (SUBDIRS): Build '.' before 'po'.
664 (COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
665 (MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
666 (i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
667 using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
668 (i386-gen.o): New rule.
669 ($(srcdir)/i386-init.h): Adjust.
670 (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
671 (ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
672 (ia64-gen.o): New rule.
673 (ia64_asmtab_deps): New variable.
674 ($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
675 (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
676 (s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
677 likewise.
678 (s390-opc.tab): Adjust.
679 (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
680 rules.
681 (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
682 * Makefile.in: Regenerate.
683 * z8kgen.c (gas): Avoid '/*' in comment.
684 * z8k-opc.h (func): Regenerate.
685
6f01793d
RW		 6862009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
687
688 * Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
689 from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
690 i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
691 ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
692 msp430-dis.c added.
693 (LIBOPCODES_CFILES): New variable, adding to
694 TARGET_LIBOPCODES_CFILES also non-target library sources.
695 (CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
696 files.
697 (ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
698 (EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
699 * Makefile.in: Regenerate.
700 * po/POTFILES.in: Regenerate.
701
81ecdfbb
RW		 7022009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
703
14ec8efd
RW		 704 * Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
705 [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
706 [INSTALL_LIBBFD] (bfdinclude_DATA): New.
707 [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
708 [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
709 is built shared even if it is not to be installed.
710 (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
711 (install_libopcodes, uninstall_libopcodes): Remove.
712 (AM_CPPFLAGS): Renamed from ...
713 (INCLUDES): ... this.
714 * Makefile.in: Regenerate.
715
758227f0
RW		 716 * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
717 1.11, foreign, no-dist.
718 (MKDEP, m32c_opc_h): Remove variables.
719 (disassemble.lo): Rewrite using automake-style dependency
720 tracking rules; only list the dependency upon the primary source
721 file, but no included headers.
722 (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
723 (i386-gen.o, ia64-gen.o): Remove dependency statements.
724 (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
725 ensure all dependency fragments are included in the Makefile.
726 (s390-opc.lo): Depend on s390-opc.tab.
727 (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
728 (mkdep section): Remove.
729 * Makefile.in: Regenerate.
730 * po/POTFILES.in: Regenerate.
731
af542c2e
RW		 732 * Makefile.am (install-pdf, install-html): Remove.
733 * Makefile.in: Regenerate.
734
81ecdfbb
RW		 735 * Makefile.in: Regenerate.
736 * aclocal.m4: Likewise.
737 * config.in: Likewise.
738 * configure: Likewise.
739
7ba29e2a
NC		 7402009-08-06 Michael Eager <eager@eagercon.com>
741
742 * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
743 CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
744 * Makefile.in: Regenerate.
745 * configure.in: Add bfd_microblaze_arch target.
746 * configure: Regenerate.
e0c483d6 747 * disassemble.c: Define ARCH_microblaze, return
7ba29e2a
NC		 748 print_insn_microblaze().
749 * microblaze-dis.c: New MicroBlaze disassembler.
750 * microblaze-opc.h: New MicroBlaze opcode definitions.
751 * microblaze-opcm.h: New MicroBlaze opcode types.
752
8a9036a4
L		 7532009-07-25 H.J. Lu <hongjiu.lu@intel.com>
754
755 * configure.in: Handle bfd_l1om_arch.
756 * disassemble.c (disassembler): Likewise.
757
758 * configure: Regenerated.
759
760 * i386-dis.c (print_insn): Handle bfd_mach_l1om and
761 bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
762
763 * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
764 Add CPU_L1OM_FLAGS.
765 (cpu_flags): Add CpuL1OM.
766 (set_bitfield): Take an argument to set the value field.
767 (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
768 (process_i386_opcode_modifier): Updated.
769 (process_i386_operand_type): Likewise.
770 * i386-init.h: Regenerated.
771 * i386-tbl.h: Likewise.
772
773 * i386-opc.h (CpuL1OM): New.
774 (CpuXsave): Updated.
775 (i386_cpu_flags): Add cpul1om.
776
309d3373
JB		 7772009-07-24 Jan Beulich <jbeulich@novell.com>
778
779 * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
780 frstpm.
781 * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
782 (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
783 (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
784 * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
785 Define.
786 (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
787 and cpufisttp.
788 * i386-opc.tbl: Qualify floating point instructions by their
789 respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
790 and fsincos to be avilable only on 387. Fix fstsw ax to be
791 available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
792 and frstpm.
793 * i386-init.h, i386-tbl.h: Regenerate.
794
7769efb2
NC		 7952009-07-20 Nick Clifton <nickc@redhat.com>
796
797 PR 10288
798 * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
799 offset or indexed based addressing mode 3.
800
74bdfecf
NC		 8012009-07-14 Nick Clifton <nickc@redhat.com>
802
803 PR 10288
804 * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
805 patterns.
806 (arm_decode_shift): Catch illegal register based shifts.
807 (print_insn_arm): Properly handle negative register r0
808 post-indexed addressing.
809
d1aaab3c
DK		 8102009-07-10 Doug Kwan <dougkwan@google.com>
811
812 * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
813 lower 32 bits of long types to make hexadecimal output consistent
814 on both 32-bit and 64-bit hosts.
815
87337981
AM		 8162009-07-10 Alan Modra <amodra@bigpond.net.au>
817
818 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
819 * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
820 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
821 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
822 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
823 * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
824 * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
825 * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
826 * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
827 * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
e0c483d6 828 * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
87337981
AM		 829 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
830
1103f72c
NC		 8312009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
832
833 * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
834
78c66db8
NC		 8352009-07-07 Nick Clifton <nickc@redhat.com>
836
837 PR 10288
838 * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
839 addressing modes.
840
22102fb0
DD		 8412009-07-06 DJ Delorie <dj@redhat.com>
842
843 * mep-desc.c: Regenerate.
844 * mep-desc.h: Regenerate.
845 * mep-opc.c: Regenerate.
846 * mep-opc.h: Regenerate.
847
922d8de8
DR		 8482009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
849
850 * i386-opc.h (CpuFMA4): Add CpuFMA4.
851 (i386_cpu_flags): New.
852 * i386-gen.c: Add CPU_FMA4_FLAGS.
853 * i386-opc.tbl: Add FMA4 instructions.
854 * i386-tbl.h: Regenerate.
855 * i386-init.h: Regenerate.
856 * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
857 (OP_XMM_VexW): Ditto.
858 (OP_EX_VexW): Ditto.
859 (VEXI4_Fixup): Ditto.
860 (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
861 (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
862 (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
863 (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
864 (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
865 (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
866 (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
867 (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
868 (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
869 (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
870 (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
871 (get_vex_imm8): New. handle FMA4.
872 (OP_EX_VexReg): Ditto.
e0c483d6 873
fe56b6ce
NC		 8742009-06-30 Nick Clifton <nickc@redhat.com>
875
876 PR 10288
877 * arm-dis.c (coprocessor): Print the LDC and STC versions of the
878 LFM and SFM instructions as comments,.
879 Improve consistency of formatting for instructions displayed as
880 comments and decimal values displayed with their hexadecimal
881 equivalents.
882 Formatting tidy ups.
883
05413229
NC		 8842009-06-29 Nick Clifton <nickc@redhat.com>
885
886 PR 10288
887 * arm-dis.c (enum opcode_sentinels): New: Used to mark the
888 boundary between variaant and generic coprocessor instuctions.
889 (coprocessor): Use it.
890 Fix architecture version of MCRR and MRRC instructions.
891 (arm_opcdes): Fix patterns for STRB and STRH instructions.
892 (print_insn_coprocessor): Check architecture and extension masks.
893 Print a hexadecimal version of any decimal constant that is
894 outside of the range of -16 to +32.
895 (print_arm_address): Add a return value of the offset used in the
896 adress, if it is worth printing a hexadecimal version of it.
897 (print_insn_neon): Print a hexadecimal version of any decimal
898 constant that is outside of the range of -16 to +32.
899 (print_insn_arm): Likewise.
900 (print_insn_thumb16): Likewise.
901 (print_insn_thumb32): Likewise.
e0c483d6 902
05413229
NC		 903 PR 10297
904 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
905 of an undefined instruction.
906 (arm_opcodes): Use it.
907 (thumb_opcod): Use it.
908 (thumb32_opc): Use it.
909
378a0c07
DD		 9102009-06-23 DJ Delorie <dj@redhat.com>
911
dab97f24
DD		 912 * mep-desc.c: Regenerate.
913 * mep-desc.h: Regenerate.
914 * mep-dis.c: Regenerate.
915 * mep-ibld.c: Regenerate.
916 * mep-opc.c: Regenerate.
917
378a0c07
DD		 918 * mep-asm.c: Regenerate.
919 * mep-opc.c: Regenerate.
920 * mep-opc.h: Regenerate.
921
aece7d2e
NC		 9222009-06-22 Nick Clifton <nickc@redhat.com>
923
924 * po/fi.po: Updated Finish translation.
925
1998a8e0
AM		 9262009-06-22 Alan Modra <amodra@bigpond.net.au>
927
928 * m32c-asm.c: Regenerate.
929
b33bafa0
AM		 9302009-06-22 Alan Modra <amodra@bigpond.net.au>
931
932 * score-dis.c (print_insn_score48, print_insn_score32): Move default
933 case label to proper lexical block.
934 * score7-dis.c (print_insn_score32): Likewise.
935
ce21feb4
MS		 9362009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
937
938 * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
939 MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
940 * s390-opc.txt (nopr, nop): Use new instruction format.
941
0313a2b8
NC		 9422009-06-18 Nick Clifton <nickc@redhat.com>
943
944 PR 10288
945 * arm-dis.c (print_insn_coprocessor): Check that a user specified
946 ARM architecture supports the matched instruction.
947 (print_insn_arm): Likewise.
948 (select_arm_features): New function. Fills in the fields of an
949 arm_feature_set structure based on a given arm machine number.
950 (print_insn): Initialise an arm_feature_set structure.
951
6db7e006
MR		 9522009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
953
954 * vax-dis.c (is_function_entry): Return success for synthetic
955 symbols too.
956 (is_plt_tail): New function.
957 (print_insn_vax): Decode PLT entry offset longword.
958
522fe561
NC		 9592009-06-15 Nick Clifton <nickc@redhat.com>
960
fe2ceba1
NC		 961 PR 10186
962 * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
963 instruction.
964
522fe561
NC		 965 PR 10173
966 * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
967
1316c8b3
NC		 9682009-06-15 Nick Clifton <nickc@redhat.com>
969
970 PR 10263
971 * arm-dis.c (print_insn): Ignore is_data if the user has requested
972 the disassembly of data as well as instructions.
973
f6475b48
DE		 9742009-06-11 Doug Evans <dje@sebabeach.org>
975
976 * cgen.sh: Handle multiple simultaneous runs for parallel makes.
977
f865a31d
AG		 9782009-06-11 Anthony Green <green@moxielogic.com>
979
980 * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
981 (moxie_form3_opc_info): Add branch instructions.
982 * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
983 encoded instructions.
984
0e7c7f11
AG		 9852009-06-06 Anthony Green <green@moxielogic.com>
986
987 * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
988 * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
989
67a648f1
AM		 9902009-06-04 Alan Modra <amodra@bigpond.net.au>
991
992 * dep-in.sed: Don't use \n in replacement part of s command.
993 * Makefile.am (DEP1): LC_ALL for uniq.
994 * Makefile.in: Regenerate.
995
06c582ac
NC		 9962009-06-02 Nick Clifton <nickc@redhat.com>
997
998 * po/nl.po: Updated Dutch translation.
999
3164099e
TG		 10002009-06-02 Tristan Gingold <gingold@adacore.com>
1001
1002 * ia64-gen.c (parse_resource_users, print_dependency_table,
1003 add_dis_table_ent, finish_distable, insert_bit_table_ent,
1004 add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
1005 get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
1006 insert_completer_entry, print_completer_entry, print_completer_table,
1007 opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
1008
d285268e
DD		 10092009-05-28 DJ Delorie <dj@redhat.com>
1010
1011 * mep-asm.c: Regenerate.
1012 * mep-desc.c: Regenerate.
1013
2f3565a3
DD		 10142009-05-26 DJ Delorie <dj@redhat.com>
1015
1016 * mep-asm.c: Regenerate.
1017 * mep-desc.c: Regenerate.
1018 * mep-desc.h: Regenerate.
1019 * mep-dis.c: Regenerate.
1020 * mep-ibld.c: Regenerate.
1021 * mep-opc.c: Regenerate.
1022 * mep-opc.h: Regenerate.
1023
f12e7348
NC		 10242009-05-26 Nick Clifton <nickc@redhat.com>
1025
1026 * po/id.po: Updated Indonesian translation.
1027 * po/opcodes.pot: Updated template file.
1028
9e097a72
AM		 10292009-05-26 Alan Modra <amodra@bigpond.net.au>
1030
1031 * dep-in.sed: Don't modify .o to .lo here. Output one filename
1032 per line with all lines having continuation backslash. Prefix
1033 first line with "A", following lines with "B".
1034 * Makefile.am (DEP): Don't use dep.sed here.
1035 (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
1036 dep.sed here on dependencies, sort and uniq.
1037 * Makefile.in: Regenerate.
1038
4f8318f8
TG		 10392009-05-25 Tristan Gingold <gingold@adacore.com>
1040
1041 * makefile.vms (OPT): New variable.
1042 (CFLAGS): Update compilation flags.
1043
1d74713b
DD		 10442009-05-22 DJ Delorie <dj@redhat.com>
1045
1046 * mep-asm.c: Regenerate.
1047 * mep-desc.c: Regenerate.
1048 * mep-desc.h: Regenerate.
1049 * mep-dis.c: Regenerate.
1050 * mep-ibld.c: Regenerate.
1051 * mep-opc.c: Regenerate.
1052 * mep-opc.h: Regenerate.
1053
c1e679ec
DR		 10542009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
1055
1056 * i386-opc.h (Cpusse5): Delete.
1057 (i386_cpu_flags): Delete.
1058 * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
1059 * i386-opc.tbl: Remove SSE5 instructions.
1060 * i386-tbl.h: Regenerate.
1061 * i386-init.h: Regenerate.
1062 * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
1063 (print_drex_arg): Delete.
1064 (OP_DREX4): Delete.
1065 (OP_DREX3): Delete.
1066 (OP_DREX_ICMP): Delete.
1067 (OP_DREX_FCMP): Delete.
1068 (DREX_*): Delete.
1069 (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
e0c483d6 1070
2b3decb5
AM		 10712009-05-22 Alan Modra <amodra@bigpond.net.au>
1072
1073 * Makefile.am: Run "make dep-am".
1074 * Makefile.in: Regenerate.
1075 * po/POTFILES.in: Regenerate.
1076
eb956800
DD		 10772009-05-19 DJ Delorie <dj@redhat.com>
1078
1079 * mep-asm.c: Regenerate.
1080 * mep-opc.c: Regenerate.
1081
3526b680
DD		 10822009-04-30 DJ Delorie <dj@redhat.com>
1083
1084 * mep-asm.c: Regenerate.
1085 * mep-desc.c: Regenerate.
1086 * mep-desc.h: Regenerate.
1087 * mep-dis.c: Regenerate.
1088 * mep-ibld.c: Regenerate.
1089 * mep-opc.c: Regenerate.
1090 * mep-opc.h: Regenerate.
1091
45be3704
DD		 10922009-04-17 DJ Delorie <dj@redhat.com
1093
1094 * mep-desc.c: Regenerate.
1095 * mep-ibld.c: Regenerate.
1096 * mep-opc.c: Regenerate.
1097 * mep-opc.h: Regenerate.
1098
20135e4c
NC		 10992009-04-15 Anthony Green <green@moxielogic.com>
1100
1101 * moxie-opc.c, moxie-dis.c: Created.
1102 * Makefile.am: Build the moxie source files.
1103 * configure.in: Add moxie support.
1104 * Makefile.in, configure: Rebuilt.
1105 * disassemble.c (disassembler): Add moxie support.
1106 (ARCH_moxie): Define.
1107
ac5c19e6
JB		 11082009-04-15 Jan Beulich <jbeulich@novell.com>
1109
1110 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
1111 extension to None.
1112 (pshab, pshaw, pshad, pshaq): Likewise.
1113 * i386-tbl.h: Re-generate.
1114
52de720d
DD		 11152009-04-08 DJ Delorie <dj@redhat.com
1116
1117 * mep-asm.c: Regenerate.
1118 * mep-desc.c: Regenerate.
1119 * mep-desc.h: Regenerate.
1120 * mep-dis.c: Regenerate.
1121 * mep-ibld.c: Regenerate.
1122 * mep-opc.c: Regenerate.
1123 * mep-opc.h: Regenerate.
1124
858d7a6d
PB		 11252009-04-07 Peter Bergner <bergner@vnet.ibm.com>
1126
1127 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
1128 "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
1129 Reorder entries so the extended mnemonics are listed before tlbilx.
1130
70dc4e32
PB		 11312009-04-02 Peter Bergner <bergner@vnet.ibm.com>
1132
1133 * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
1134 due to -many/-Many.
1135 (print_insn_powerpc): Make sure we only deprecate instructions using
1136 the original dialect and not a modified dialect due to -Many handling.
1137 Move the handling of the condition register and default operands to
1138 the end of the if/else if/else chain.
1139 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1140 instructions from newer processors are listed before older ones.
1141 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
1142 that have instructions with conflicting opcodes.
1143
e401b04c
PB		 11442009-04-01 Peter Bergner <bergner@vnet.ibm.com>
1145
1146 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
1147 E500MC entries.
1148
b8f9ee44
CL		 11492009-04-01 Christophe Lyon <christophe.lyon@st.com>
1150
1151 * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
1152
d460e92e
JM		 11532009-03-30 Joseph Myers <joseph@codesourcery.com>
1154
1155 * arm-dis.c (print_insn): Also check section matches in backwards
1156 search for mapping symbol.
1157
d34b5006
L		 11582009-03-26 H.J. Lu <hongjiu.lu@intel.com>
1159
1160 * i386-dis.c (get_valid_dis386): Abort on unhandled table.
1161
8d25cc3d
AM		 11622009-03-18 Alan Modra <amodra@bigpond.net.au>
1163
3889c459 1164 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
8d25cc3d
AM		 1165 * Makefile.am: Run "make dep-am".
1166 * Makefile.in: Regenerate.
1167 * openrisc-opc.c: Regenerate.
1168
34dd024a
NC		 11692009-03-10 Nick Clifton <nickc@redhat.com>
1170
1171 * po/id.po: Updated Indonesian translation.
1172
69fe9ce5
AM		 11732009-03-10 Alan Modra <amodra@bigpond.net.au>
1174
1175 * ppc-dis.c: Include "opintl.h".
1176 (struct ppc_mopt, ppc_opts): New.
1177 (ppc_parse_cpu): New function.
1178 (powerpc_init_dialect): Use it.
1179 (print_ppc_disassembler_options): Dump options from ppc_opts.
1180 Internationalize message.
1181
d11fd249
NC		 11822009-03-06 Nick Clifton <nickc@redhat.com>
1183
1184 * po/es.po: Updated Spanish translation.
1185
51dec227
AM		 11862009-03-04 Alan Modra <amodra@bigpond.net.au>
1187
1188 PR 6768
1189 * configure.in: Test for ld --as-needed support. Link shared
1190 libopcodes against libm.
1191 * configure: Regenerate.
1192
c72ab5f2
PB		 11932009-03-03 Peter Bergner <bergner@vnet.ibm.com>
1194
1195 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1196 instructions from newer processors are listed before older ones.
1197
a1f7ca36
AM		 11982009-03-03 Alan Modra <amodra@bigpond.net.au>
1199
1200 * Makefile.am: Run "make dep-am".
1201 (HFILES): Move lm32-desc.h and lm32-opc.h from..
1202 (CFILES): ..here.
1203 * Makefile.in: Regenerate.
1204
c3b7224a
NC		 12052009-03-02 Qinwei <qinwei@sunnorth.com.cn>
1206
1207 * score7-dis.c: New file.
1208 * Makefile.am: Add dependencies for score7-dis.c.
1209 * Makefile.in: Regenerate.
1210 * configure.in: Add score7-dis to score files.
1211 * configure: Regenerate.
1212 * score-dis.c: Add support for score7 architecture.
1213 * score-opc.h: Likewise.
1214
58e24671
RW		 12152009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
1216
1217 * configure: Regenerate.
1218
d6f574e0
L		 12192009-02-27 H.J. Lu <hongjiu.lu@intel.com>
1220
1221 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
1222
066be9f7
PB		 12232009-02-26 Peter Bergner <bergner@vnet.ibm.com>
1224
1225 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
1226 the power7 and the isel instructions.
1227 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
1228 (insert_dm, extract_dm): Likewise.
1229 (XB6): Update comment to include XX2 form.
1230 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
1231 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
1232 (RemoveXX3DM): Delete.
1233 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
1234 "mftgpr">: Deprecate for POWER7.
1235 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
1236 "frsqrte.">: Deprecate the three operand form and enable the two
1237 operand form for POWER7 and later.
1238 <"wait">: Extend to accept optional parameter. Enable for POWER7.
1239 <"waitsrv", "waitimpl">: Add extended opcodes.
1240 <"ldbrx", "stdbrx">: Enable for POWER7.
1241 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
1242 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
1243 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
1244 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
1245 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
1246 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
1247 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
1248 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
1249 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
1250 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
1251 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
1252 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
1253 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
1254 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
1255 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
1256 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
1257 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
1258 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
1259 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
1260 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
1261 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
1262 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
1263 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
1264 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
1265 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
1266 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
1267 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
1268 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
1269 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
1270 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
1271 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
1272 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
1273 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
1274 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
1275 "xxspltw", "xxswapd">: Add VSX opcodes.
1276
4c664d7b
L		 12772009-02-23 H.J. Lu <hongjiu.lu@intel.com>
1278
1279 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
1280 (operand_types): Remove Vex_Imm4.
1281
1282 * i386-opc.h (Vex_Imm4): Removed.
1283 (OTMax): Updated.
1284 (i386_operand_type): Remove vex_imm4.
1285
1286 * i386-opc.tbl: Remove Vex_Imm4 comments.
1287 * i386-init.h: Regenerated.
1288 * i386-tbl.h: Likewise.
1289
4ce8808b
RE		 12902009-02-23 Richard Earnshaw <rearnsha@arm.com>
1291
1292 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
1293 vq{r}shr{u}n.s64 insnstructions.
1294
0e55be16
PB		 12952009-02-19 Peter Bergner <bergner@vnet.ibm.com>
1296
1297 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
1298 operand to be a float point register (FRT/FRS).
1299
b1c9882d
AN		 13002009-02-18 Adam Nemet <anemet@caviumnetworks.com>
1301
1302 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
1303 dmfc2 and dmtc2 before the architecture-level variants.
1304
137f2437
NC		 13052009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
1306
1307 * fr30-opc.c: Regenerate.
1308 * frv-opc.c: Regenerate.
1309 * ip2k-opc.c: Regenerate.
1310 * iq2000-opc.c: Regenerate.
1311 * lm32-opc.c: Regenerate.
1312 * m32c-opc.c: Regenerate.
1313 * m32r-opc.c: Regenerate.
1314 * mep-opc.c: Regenerate.
1315 * mt-opc.c: Regenerate.
1316 * xc16x-opc.c: Regenerate.
1317 * xstormy16-opc.c: Regenerate.
1318 * tic54x-dis.c (print_instruction): Avoid compiler warning on
1319 sprintf call.
1320
87298967
NS		 13212009-02-12 Nathan Sidwell <nathan@codesourcery.com>
1322
1323 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
1324
80890a61
PB		 13252009-02-05 Peter Bergner <bergner@vnet.ibm.com>
1326
1327 * ppc-opc.c: Update copyright year.
1328 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
1329 ordering for POWER4 and later and use the correct Server ordering.
1330
ce2f5b3c
L		 13312009-02-04 H.J. Lu <hongjiu.lu@intel.com>
1332
1333 AVX Programming Reference (January, 2009)
1334 * i386-dis.c (PREFIX_VEX_3A44): New.
1335 (VEX_LEN_3A44_P_2): Likewise.
1336 (PREFIX_VEX_3A48): Updated.
1337 (VEX_LEN_3A4C_P_2): Likewise.
1338 (prefix_table): Add PREFIX_VEX_3A44.
1339 (vex_table): Likewise.
1340 (vex_len_table): Add VEX_LEN_3A44_P_2.
1341
1342 * i386-opc.tbl: Add PCLMUL + AVX instructions.
1343 * i386-tbl.h: Regenerated.
1344
52b6b6b9
JM		 13452009-02-03 Sandip Matte <sandip@rmicorp.com>
1346
1347 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
1348 (mips_arch_choices): Add XLR entry.
1349 * mips-opc.c (XLR): Define.
1350 (mips_builtin_opcodes): Add XLR instructions.
1351
31dd3154
JM		 13522009-02-03 Carlos O'Donell <carlos@codesourcery.com>
1353
1354 * Makefile.am: Add install-pdf target.
1355 * po/Make-in: Add install-pdf target.
1356 * Makefile.in: Regenerate.
1357
c1a0a41f
DD		 13582009-02-02 DJ Delorie <dj@redhat.com>
1359
1360 * mep-asm.c: Regenerate.
1361 * mep-desc.c: Regenerate.
1362 * mep-desc.h: Regenerate.
1363 * mep-dis.c: Regenerate.
1364 * mep-ibld.c: Regenerate.
1365 * mep-opc.c: Regenerate.
1366 * mep-opc.h: Regenerate.
1367
087b80de
JM		 13682009-01-29 Mark Mitchell <mark@codesourcery.com>
1369
1370 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
1371 qsub, and qdsub.
1372
159073e6
NC		 13732009-01-28 Chao-ying Fu <fu@mips.com>
1374
e0c483d6 1375 * mips-opc.c (suxc1): Add the flag of FP_D.
159073e6 1376
6f3b91a6
AM		 13772009-01-20 Alan Modra <amodra@bigpond.net.au>
1378
1379 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
1380 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
1381 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
1382 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
1383 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
1384 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
1385 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
1386 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
1387
29670fb9
AM		 13882009-01-16 Alan Modra <amodra@bigpond.net.au>
1389
1390 * configure.in (commonbfdlib): Delete.
1391 (SHARED_LIBADD): Add pic libiberty if such is available.
1392 * configure: Regenerate.
1393 * po/POTFILES.in: Regenerate.
1394
21169fcf
PB		 13952009-01-14 Peter Bergner <bergner@vnet.ibm.com>
1396
1397 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
1398 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
1399 operand form and enable the four operand form for POWER6 and later.
1400 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
1401 three operand form for POWER6 and later.
1402
4ca47a51
MF		 14032009-01-14 Mike Frysinger <vapier@gentoo.org>
1404
1405 * bfin-dis.c (OUTS): Use "%s" as format string.
1406
8acd5377
L		 14072009-01-13 H.J. Lu <hongjiu.lu@intel.com>
1408
1409 * i386-gen.c (cpu_flag_init): Remove a white space.
1410 (operand_type_init): Likewise.
1411
c1ec1875
L		 14122009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1413
1414 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
1415 * i386-tbl.h: Regenerated.
1416
c7532693
L		 14172009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1418
1419 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
1420 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
1421 subS, xorS and cmpS.
1422
bd5295b2
L		 14232009-01-10 H.J. Lu <hongjiu.lu@intel.com>
1424
1425 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
1426 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
1427 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
1428 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
1429 and CpuSYSCALL.
1430 (lineno): Removed.
1431 (set_bitfield): Take an argument, lineno. Don't report lineno
1432 on error if it is -1.
1433 (process_i386_cpu_flag): Take an argument, lineno.
1434 (process_i386_opcode_modifier): Likewise.
1435 (process_i386_operand_type): Likewise.
1436 (output_i386_opcode): Likewise.
1437 (opcode_hash_entry): Add lineno.
1438 (process_i386_opcodes): Updated.
1439 (process_i386_registers): Likewise.
1440 (process_i386_initializers): Likewise.
1441
1442 * i386-opc.h (CpuP4): Removed.
1443 (CpuK6): Likewise.
1444 (CpuK8): Likewise.
1445 (CpuClflush): New.
1446 (CpuSYSCALL): Likewise.
1447 (CpuMMX): Updated.
1448 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
1449 cpuclflush and cpusyscall.
1450
1451 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
1452 syscall and sysret.
1453 * i386-init.h: Regenerated.
1454 * i386-tbl.h: Likewise.
1455
1b7f3fb0
L		 14562009-01-09 H.J. Lu <hongjiu.lu@intel.com>
1457
1458 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
1459 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
1460 (cpu_flags): Add CpuRdtscp.
1461 (set_bitfield): Remove CpuSledgehammer check.
1462
1463 * i386-opc.h (CpuRdtscp): New.
1464 (CpuLM): Updated.
1465 (i386_cpu_flags): Add cpurdtscp.
1466
1467 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
1468 * i386-init.h: Regenerated.
1469 * i386-tbl.h: Likewise.
1470
1cb0a767
PB		 14712009-01-09 Peter Bergner <bergner@vnet.ibm.com>
1472
1473 * ppc-opc.c (PPCNONE): Define.
1474 (NOPOWER4): Delete.
1475 (powerpc_opcodes): Initialize the new "deprecated" field.
1476
168e3097
L		 14772009-01-06 H.J. Lu <hongjiu.lu@intel.com>
1478
1479 AVX Programming Reference (December, 2008)
1480 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
1481 (VEX_LEN_E7_P_2_M_0): Likewise.
1482 (VEX_LEN_2C_P_1): Updated.
1483 (VEX_LEN_E8_P_2): Likewise.
1484 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
1485 (mod_table): Likewise.
1486
1487 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
1488 * i386-tbl.h: Regenerated.
1489
22da050b
L		 14902009-01-05 H.J. Lu <hongjiu.lu@intel.com>
1491
1492 * i386-gen.c (process_copyright): Update for 2009.
1493
1494 * i386-init.h: Regenerated.
1495 * i386-tbl.h: Likewise.
1496
0bfee649 14972009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 1498
0bfee649
L		 1499 AVX Programming Reference (December, 2008)
1500 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 1501 (OP_EX_VexW): Likewise.
0bfee649 1502 (OP_EX_VexImmW): Likewise.
c0f3af97 1503 (OP_XMM_VexW): Likewise.
c0f3af97 1504 (VEXI4_Fixup): Likewise.
c0f3af97 1505 (VPERMIL2_Fixup): Likewise.
c0f3af97 1506 (VexI4): Likewise.
0bfee649
L		 1507 (VexFMA): Likewise.
1508 (Vex128FMA): Likewise.
c0f3af97
L		 1509 (EXVexW): Likewise.
1510 (EXdVexW): Likewise.
1511 (EXqVexW): Likewise.
0bfee649 1512 (EXVexImmW): Likewise.
c0f3af97 1513 (XMVexW): Likewise.
c0f3af97 1514 (VPERMIL2): Likewise.
0bfee649
L		 1515 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
1516 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
1517 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
1518 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
1519 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
1520 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
1521 (get_vex_imm8): Likewise.
1522 (OP_EX_VexReg): Likewise.
1523 vpermil2_op): Likewise.
1524 (EXVexWdq): New.
1525 (vex_w_dq_mode): Likewise.
1526 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
1527 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
1528 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
1529 (es_reg): Updated.
1530 (PREFIX_VEX_38DB): Likewise.
1531 (PREFIX_VEX_3A4A): Likewise.
1532 (PREFIX_VEX_3A60): Likewise.
1533 (PREFIX_VEX_3ADF): Likewise.
1534 (VEX_LEN_3ADF_P_2): Likewise.
1535 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
e0c483d6 1536 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
0bfee649
L		 1537 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
1538 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
1539 PREFIX_VEX_3896...PREFIX_VEX_389F,
1540 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
1541 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 1542 (vex_table): Likewise.
0bfee649
L		 1543 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
1544 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
1545 (putop): Support "%XW".
1546 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 1547
0bfee649 1548 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 1549
0bfee649
L		 1550 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
1551 instructions. Add new FMA instructions.
28dbc079
L		 1552 * i386-tbl.h: Regenerated.
1553
e0c483d6 15542009-01-02 Matthias Klose <doko@ubuntu.com>
3fe15143 1555
e0c483d6
AM		 1556 * or32-opc.c (or32_print_register, or32_print_immediate,
1557 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 1558
0bfee649 1559For older changes see ChangeLog-2008
252b5132
RH		 1560\f
1561Local Variables:
2f6d2f85
NC		 1562mode: change-log
1563left-margin: 8
1564fill-column: 74
252b5132
RH		 1565version-control: never
1566End:
GDB Binutils - Deliverables
This page took 0.550215 seconds and 4 git commands to generate.