gas: xtensa: limit size of auto litpools
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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e207bc53
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12018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
2
3 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
4
87993319
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52018-02-13 Maciej W. Rozycki <macro@mips.com>
6
7 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
8 variable to `function_index'.
9
68d20676
NC
102018-02-13 Nick Clifton <nickc@redhat.com>
11
12 PR 22823
13 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
14 about truncation of printing.
15
d2159fdc
HW
162018-02-12 Henry Wong <henry@stuffedcow.net>
17
18 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
19
f174ef9f
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202018-02-05 Nick Clifton <nickc@redhat.com>
21
22 * po/pt_BR.po: Updated Brazilian Portuguese translation.
23
be3a8dca
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242018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
25
26 * i386-dis.c (enum): Add pconfig.
27 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
28 (cpu_flags): Add CpuPCONFIG.
29 * i386-opc.h (enum): Add CpuPCONFIG.
30 (i386_cpu_flags): Add cpupconfig.
31 * i386-opc.tbl: Add PCONFIG instruction.
32 * i386-init.h: Regenerate.
33 * i386-tbl.h: Likewise.
34
3233d7d0
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352018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
36
37 * i386-dis.c (enum): Add PREFIX_0F09.
38 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
39 (cpu_flags): Add CpuWBNOINVD.
40 * i386-opc.h (enum): Add CpuWBNOINVD.
41 (i386_cpu_flags): Add cpuwbnoinvd.
42 * i386-opc.tbl: Add WBNOINVD instruction.
43 * i386-init.h: Regenerate.
44 * i386-tbl.h: Likewise.
45
e925c834
JW
462018-01-17 Jim Wilson <jimw@sifive.com>
47
48 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
49
d777820b
IT
502018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
51
52 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
53 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
54 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
55 (cpu_flags): Add CpuIBT, CpuSHSTK.
56 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
57 (i386_cpu_flags): Add cpuibt, cpushstk.
58 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
59 * i386-init.h: Regenerate.
60 * i386-tbl.h: Likewise.
61
f6efed01
NC
622018-01-16 Nick Clifton <nickc@redhat.com>
63
64 * po/pt_BR.po: Updated Brazilian Portugese translation.
65 * po/de.po: Updated German translation.
66
2721d702
JW
672018-01-15 Jim Wilson <jimw@sifive.com>
68
69 * riscv-opc.c (match_c_nop): New.
70 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
71
616dcb87
NC
722018-01-15 Nick Clifton <nickc@redhat.com>
73
74 * po/uk.po: Updated Ukranian translation.
75
3957a496
NC
762018-01-13 Nick Clifton <nickc@redhat.com>
77
78 * po/opcodes.pot: Regenerated.
79
769c7ea5
NC
802018-01-13 Nick Clifton <nickc@redhat.com>
81
82 * configure: Regenerate.
83
faf766e3
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842018-01-13 Nick Clifton <nickc@redhat.com>
85
86 2.30 branch created.
87
888a89da
IT
882018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
89
90 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
91 * i386-tbl.h: Regenerate.
92
cbda583a
JB
932018-01-10 Jan Beulich <jbeulich@suse.com>
94
95 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
96 * i386-tbl.h: Re-generate.
97
c9e92278
JB
982018-01-10 Jan Beulich <jbeulich@suse.com>
99
100 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
101 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
102 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
103 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
104 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
105 Disp8MemShift of AVX512VL forms.
106 * i386-tbl.h: Re-generate.
107
35fd2b2b
JW
1082018-01-09 Jim Wilson <jimw@sifive.com>
109
110 * riscv-dis.c (maybe_print_address): If base_reg is zero,
111 then the hi_addr value is zero.
112
91d8b670
JG
1132018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
114
115 * arm-dis.c (arm_opcodes): Add csdb.
116 (thumb32_opcodes): Add csdb.
117
be2e7d95
JG
1182018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
119
120 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
121 * aarch64-asm-2.c: Regenerate.
122 * aarch64-dis-2.c: Regenerate.
123 * aarch64-opc-2.c: Regenerate.
124
704a705d
L
1252018-01-08 H.J. Lu <hongjiu.lu@intel.com>
126
127 PR gas/22681
128 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
129 Remove AVX512 vmovd with 64-bit operands.
130 * i386-tbl.h: Regenerated.
131
35eeb78f
JW
1322018-01-05 Jim Wilson <jimw@sifive.com>
133
134 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
135 jalr.
136
219d1afa
AM
1372018-01-03 Alan Modra <amodra@gmail.com>
138
139 Update year range in copyright notice of all files.
140
1508bbf5
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1412018-01-02 Jan Beulich <jbeulich@suse.com>
142
143 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
144 and OPERAND_TYPE_REGZMM entries.
145
1e563868 146For older changes see ChangeLog-2017
3499769a 147\f
1e563868 148Copyright (C) 2018 Free Software Foundation, Inc.
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149
150Copying and distribution of this file, with or without modification,
151are permitted in any medium without royalty provided the copyright
152notice and this notice are preserved.
153
154Local Variables:
155mode: change-log
156left-margin: 8
157fill-column: 74
158version-control: never
159End:
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