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* cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
cdedc9f0
HPN		 12005-12-06 Hans-Peter Nilsson <hp@axis.com>
2
3 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
4 (print_with_operands): Check for prefix when [PC+] is seen.
5
3609e0fe
DB		 62005-12-02 Dave Brolley <brolley@redhat.com>
7
8 * configure.in (cgen_files): Add cgen-bitset.lo.
9 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
10 * Makefile.am (CFILES): Add cgen-bitset.c.
11 (ALL_MACHINES): Add cgen-bitset.lo.
12 (cgen-bitset.lo): New target.
13 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
14 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
15 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
16 (cgen_bitset_union): Moved from here ...
17 * cgen-bitset.c: ... to here. New file.
18 * Makefile.in: Regenerated.
19 * configure: Regenerated.
20
aa2273ba
JW		 212005-11-22 James E Wilson <wilson@specifix.com>
22
23 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
24 opcode_fprintf_vma): New.
25 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
26
ce7a772b
AM		 272005-11-16 Alan Modra <amodra@bigpond.net.au>
28
29 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
30 frsqrtes.
31
0499d65b
TS		 322005-11-14 David Ung <davidu@mips.com>
33
34 * mips16-opc.c: Add MIPS16e save/restore opcodes.
35 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
36 codes for save/restore.
37
dc82c973
AS		 382005-11-10 Andreas Schwab <schwab@suse.de>
39
40 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
41 coprocessor ID 1.
42
dbb33a87
NC		 432005-11-08 H.J. Lu <hongjiu.lu@intel.com>
44
45 * m32c-desc.c: Regenerated.
46
6f84a2a6
NS		 472005-11-08 Nathan Sidwell <nathan@codesourcery.com>
48
49 Add ms2.
50 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
51 ms1-opc.c, ms1-opc.h: Regenerated.
52
a541e3ce
SE		 532005-11-07 Steve Ellcey <sje@cup.hp.com>
54
55 * configure: Regenerate after modifying bfd/warning.m4.
56
3e7d61b2
AM		 572005-11-07 Alan Modra <amodra@bigpond.net.au>
58
59 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
60 ignored rex prefixes here.
61 (print_insn): Instead, handle them similarly to fwait followed
62 by non-fp insns.
63
a92e0d0a
L		 642005-11-02 H.J. Lu <hongjiu.lu@intel.com>
65
66 * iq2000-desc.c: Regenerated.
67 * iq2000-desc.h: Likewise.
68 * iq2000-dis.c: Likewise.
69 * iq2000-opc.c: Likewise.
70
36b0c57d
PB		 712005-11-02 Paul Brook <paul@codesourcery.com>
72
73 * arm-dis.c (print_insn_thumb32): Word align blx target address.
74
9a2ff3f5
AM		 752005-10-31 Alan Modra <amodra@bigpond.net.au>
76
77 * arm-dis.c (print_insn): Warning fix.
78
9e5169a8
L		 792005-10-30 H.J. Lu <hongjiu.lu@intel.com>
80
81 * Makefile.am: Run "make dep-am".
82 * Makefile.in: Regenerated.
83
84 * dep-in.sed: Replace " ./" with " ".
85
fb53f5a8
DB		 862005-10-28 Dave Brolley <brolley@redhat.com>
87
88 * All CGEN-generated sources: Regenerate.
89
90 Contribute the following changes:
91 2005-09-19 Dave Brolley <brolley@redhat.com>
92
93 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
94 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
95 bfd_arch_m32c case.
96
97 2005-02-16 Dave Brolley <brolley@redhat.com>
98
99 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
100 cgen_isa_mask_* to cgen_bitset_*.
101 * cgen-opc.c: Likewise.
102
103 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
104
105 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
106 * *-dis.c: Regenerate.
107
108 2003-06-05 DJ Delorie <dj@redhat.com>
109
110 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
111 it, as it may point to a reused buffer. Set prev_isas when we
112 change cpus.
113
114 2002-12-13 Dave Brolley <brolley@redhat.com>
115
116 * cgen-opc.c (cgen_isa_mask_create): New support function for
117 CGEN_ISA_MASK.
118 (cgen_isa_mask_init): Ditto.
119 (cgen_isa_mask_clear): Ditto.
120 (cgen_isa_mask_add): Ditto.
121 (cgen_isa_mask_set): Ditto.
122 (cgen_isa_supported): Ditto.
123 (cgen_isa_mask_compare): Ditto.
124 (cgen_isa_mask_intersection): Ditto.
125 (cgen_isa_mask_copy): Ditto.
126 (cgen_isa_mask_combine): Ditto.
127 * cgen-dis.in (libiberty.h): #include it.
128 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
129 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
130 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
131 * Makefile.in: Regenerated.
132
c6552317
DD		 1332005-10-27 DJ Delorie <dj@redhat.com>
134
135 * m32c-asm.c: Regenerate.
136 * m32c-desc.c: Regenerate.
137 * m32c-desc.h: Regenerate.
138 * m32c-dis.c: Regenerate.
139 * m32c-ibld.c: Regenerate.
140 * m32c-opc.c: Regenerate.
141 * m32c-opc.h: Regenerate.
142
f75eb1c0
DD		 1432005-10-26 DJ Delorie <dj@redhat.com>
144
145 * m32c-asm.c: Regenerate.
146 * m32c-desc.c: Regenerate.
147 * m32c-desc.h: Regenerate.
148 * m32c-dis.c: Regenerate.
149 * m32c-ibld.c: Regenerate.
150 * m32c-opc.c: Regenerate.
151 * m32c-opc.h: Regenerate.
152
f1022c90
PB		 1532005-10-26 Paul Brook <paul@codesourcery.com>
154
155 * arm-dis.c (arm_opcodes): Correct "sel" entry.
156
e277c00b
AM		 1572005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
158
159 * m32r-asm.c: Regenerate.
160
92e0a941
DD		 1612005-10-25 DJ Delorie <dj@redhat.com>
162
163 * m32c-asm.c: Regenerate.
164 * m32c-desc.c: Regenerate.
165 * m32c-desc.h: Regenerate.
166 * m32c-dis.c: Regenerate.
167 * m32c-ibld.c: Regenerate.
168 * m32c-opc.c: Regenerate.
169 * m32c-opc.h: Regenerate.
170
3c9b82ba
NC		 1712005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
172
173 * configure.in: Add target architecture bfd_arch_z80.
174 * configure: Regenerated.
3e7d61b2 175 * disassemble.c (disassembler)<ARCH_z80>: Add case
3c9b82ba
NC		 176 bfd_arch_z80.
177 * z80-dis.c: New file.
178
3caac5b8
AM		 1792005-10-25 Alan Modra <amodra@bigpond.net.au>
180
181 * po/POTFILES.in: Regenerate.
182 * po/opcodes.pot: Regenerate.
183
6a2375c6
JB		 1842005-10-24 Jan Beulich <jbeulich@novell.com>
185
186 * ia64-asmtab.c: Regenerate.
187
a1a280bb
DD		 1882005-10-21 DJ Delorie <dj@redhat.com>
189
190 * m32c-asm.c: Regenerate.
191 * m32c-desc.c: Regenerate.
192 * m32c-desc.h: Regenerate.
193 * m32c-dis.c: Regenerate.
194 * m32c-ibld.c: Regenerate.
195 * m32c-opc.c: Regenerate.
196 * m32c-opc.h: Regenerate.
197
b7d48530
NC		 1982005-10-21 Nick Clifton <nickc@redhat.com>
199
200 * bfin-dis.c: Tidy up code, removing redundant constructs.
201
8dd744b6
MS		 2022005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
203
204 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
205 instructions.
206
e74eb924
NC		 2072005-10-18 Nick Clifton <nickc@redhat.com>
208
209 * m32r-asm.c: Regenerate after updating m32r.opc.
210
471e4e36
JZ		 2112005-10-18 Jie Zhang <jie.zhang@analog.com>
212
213 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
214 reading instruction from memory.
215
5e03663f
NC		 2162005-10-18 Nick Clifton <nickc@redhat.com>
217
218 * m32r-asm.c: Regenerate after updating m32r.opc.
219
ab7c9a26
NC		 2202005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
221
222 * m32r-asm.c: Regenerate after updating m32r.opc.
223
19590ef7
RE		 2242005-10-08 James Lemke <jim@wasabisystems.com>
225
226 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
227 operations.
228
6edfbbad
DJ		 2292005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
230
231 * ppc-dis.c (struct dis_private): Remove.
232 (powerpc_dialect): Avoid aliasing warnings.
233 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
234
095f2843
NC		 2352005-09-30 Nick Clifton <nickc@redhat.com>
236
237 * po/ga.po: New Irish translation.
238 * configure.in (ALL_LINGUAS): Add "ga".
239 * configure: Regenerate.
240
fdd3b9b3
L		 2412005-09-30 H.J. Lu <hongjiu.lu@intel.com>
242
243 * Makefile.am: Run "make dep-am".
244 * Makefile.in: Regenerated.
245 * aclocal.m4: Likewise.
246 * configure: Likewise.
247
4b7f6baa
CM		 2482005-09-30 Catherine Moore <clm@cm00re.com>
249
250 * Makefile.am: Bfin support.
251 * Makefile.in: Regenerated.
252 * aclocal.m4: Regenerated.
253 * bfin-dis.c: New file.
254 * configure.in: Bfin support.
255 * configure: Regenerated.
256 * disassemble.c (ARCH_bfin): Define.
257 (disassembler): Add case for bfd_arch_bfin.
258
1a114b12
JB		 2592005-09-28 Jan Beulich <jbeulich@novell.com>
260
261 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
262 (indirEv): Use it.
263 (stackEv): New.
264 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
265 (dis386): Document and use new 'V' meta character. Use it for
266 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
267 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
268 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
269 data prefix as used whenever DFLAG was examined. Handle 'V'.
270 (intel_operand_size): Use stack_v_mode.
271 (OP_E): Use stack_v_mode, but handle only the special case of
272 64-bit mode without operand size override here; fall through to
273 v_mode case otherwise.
274 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
275 and no operand size override is present.
276 (OP_J): Use get32s for obtaining the displacement also when rex64
277 is present.
278
3eb17e6b
PB		 2792005-09-08 Paul Brook <paul@codesourcery.com>
280
281 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
282
61cc0267
CF		 2832005-09-06 Chao-ying Fu <fu@mips.com>
284
285 * mips-opc.c (MT32): New define.
286 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
287 bottom to avoid opcode collision with "mftr" and "mttr".
288 Add MT instructions.
289 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
290 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
291 formats.
292
b13dd07a
PB		 2932005-09-02 Paul Brook <paul@codesourcery.com>
294
295 * arm-dis.c (coprocessor_opcodes): Add null terminator.
296
8f06b2d8
PB		 2972005-09-02 Paul Brook <paul@codesourcery.com>
298
299 * arm-dis.c (coprocessor_opcodes): New.
300 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
301 (print_insn_coprocessor): New function.
302 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
303 format characters.
304 (print_insn_thumb32): Use print_insn_coprocessor.
305
a2dfd01f
PB		 3062005-08-30 Paul Brook <paul@codesourcery.com>
307
308 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
309
3f31e633
JB		 3102005-08-26 Jan Beulich <jbeulich@novell.com>
311
312 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
313 re-use.
314 (OP_E): Call intel_operand_size, move call site out of mode
315 dependent code.
316 (OP_OFF): Call intel_operand_size if suffix_always. Remove
317 ATTRIBUTE_UNUSED from parameters.
318 (OP_OFF64): Likewise.
319 (OP_ESreg): Call intel_operand_size.
320 (OP_DSreg): Likewise.
321 (OP_DIR): Use colon rather than semicolon as separator of far
322 jump/call operands.
323
fd25c5a9
CF		 3242005-08-25 Chao-ying Fu <fu@mips.com>
325
326 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
327 (mips_builtin_opcodes): Add DSP instructions.
328 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
329 mips64, mips64r2.
330 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
331 operand formats.
332
dd8b7c22
DU		 3332005-08-23 David Ung <davidu@mips.com>
334
335 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
3e7d61b2 336 instructions to the table.
dd8b7c22 337
c17ae8a2
AM		 3382005-08-18 Alan Modra <amodra@bigpond.net.au>
339
848cf006 340 * a29k-dis.c: Delete.
c17ae8a2
AM		 341 * Makefile.am: Remove a29k support.
342 * configure.in: Likewise.
343 * disassemble.c: Likewise.
344 * Makefile.in: Regenerate.
345 * configure: Regenerate.
346 * po/POTFILES.in: Regenerate.
347
36ae0db3
DJ		 3482005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
349
350 * ppc-dis.c (powerpc_dialect): Handle e300.
351 (print_ppc_disassembler_options): Likewise.
352 * ppc-opc.c (PPCE300): Define.
353 (powerpc_opcodes): Mark icbt as available for the e300.
354
63a3357b
DA		 3552005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
356
357 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
358 Use "rp" instead of "%r2" in "b,l" insns.
359
ad101263
MS		 3602005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
361
362 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
363 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
364 (main): Likewise.
365 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
366 and 4 bit optional masks.
367 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
368 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
369 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
370 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
371 (s390_opformats): Likewise.
372 * s390-opc.txt: Add new instructions for cpu type z9-109.
373
f1fa1093
DA		 3742005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
375
376 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
377
e9f89963
PB		 3782005-07-29 Paul Brook <paul@codesourcery.com>
379
380 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
381
92e90b6e
PB		 3822005-07-29 Paul Brook <paul@codesourcery.com>
383
384 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
385 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
386
fd54057a
DD		 3872005-07-25 DJ Delorie <dj@redhat.com>
388
389 * m32c-asm.c Regenerate.
390 * m32c-dis.c Regenerate.
391
760c0f6a
DD		 3922005-07-20 DJ Delorie <dj@redhat.com>
393
394 * disassemble.c (disassemble_init_for_target): M32C ISAs are
395 enums, so convert them to bit masks, which attributes are.
396
85da3a56
NC		 3972005-07-18 Nick Clifton <nickc@redhat.com>
398
399 * configure.in: Restore alpha ordering to list of arches.
400 * configure: Regenerate.
401 * disassemble.c: Restore alpha ordering to list of arches.
402
4032005-07-18 Nick Clifton <nickc@redhat.com>
404
405 * m32c-asm.c: Regenerate.
406 * m32c-desc.c: Regenerate.
407 * m32c-desc.h: Regenerate.
408 * m32c-dis.c: Regenerate.
409 * m32c-ibld.h: Regenerate.
410 * m32c-opc.c: Regenerate.
411 * m32c-opc.h: Regenerate.
412
22cbf2e7
L		 4132005-07-18 H.J. Lu <hongjiu.lu@intel.com>
414
415 * i386-dis.c (PNI_Fixup): Update comment.
416 (VMX_Fixup): Properly handle the suffix check.
417
0aea0460
DA		 4182005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
419
420 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
421 mfctl disassembly.
422
0f82ff91
AM		 4232005-07-16 Alan Modra <amodra@bigpond.net.au>
424
425 * Makefile.am: Run "make dep-am".
426 (stamp-m32c): Fix cpu dependencies.
427 * Makefile.in: Regenerate.
428 * ip2k-dis.c: Regenerate.
429
90700ea2
L		 4302007-07-15 H.J. Lu <hongjiu.lu@intel.com>
431
432 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
433 (VMX_Fixup): New. Fix up Intel VMX Instructions.
434 (Em): New.
435 (Gm): New.
436 (VM): New.
437 (dis386_twobyte): Updated entries 0x78 and 0x79.
438 (twobyte_has_modrm): Likewise.
439 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
440 (OP_G): Handle m_mode.
441
49f58d10
JB		 4422005-07-14 Jim Blandy <jimb@redhat.com>
443
444 Add support for the Renesas M32C and M16C.
445 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
446 * m32c-desc.h, m32c-opc.h: New.
447 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
448 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
449 m32c-opc.c.
450 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
451 m32c-ibld.lo, m32c-opc.lo.
452 (CLEANFILES): List stamp-m32c.
453 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
454 (CGEN_CPUS): Add m32c.
455 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
456 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
457 (m32c_opc_h): New variable.
458 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
459 (m32c-opc.lo): New rules.
460 * Makefile.in: Regenerated.
461 * configure.in: Add case for bfd_m32c_arch.
462 * configure: Regenerated.
463 * disassemble.c (ARCH_m32c): New.
464 [ARCH_m32c]: #include "m32c-desc.h".
465 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
466 (disassemble_init_for_target) [ARCH_m32c]: Same.
467
468 * cgen-ops.h, cgen-types.h: New files.
469 * Makefile.am (HFILES): List them.
470 * Makefile.in: Regenerated.
3e7d61b2 471
0fd3a477
JW		 4722005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
473
474 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
475 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
476 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
477 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
478 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
479 v850-dis.c: Fix format bugs.
480 * ia64-gen.c (fail, warn): Add format attribute.
481 * or32-opc.c (debug): Likewise.
482
22f8fcbd
NC		 4832005-07-07 Khem Raj <kraj@mvista.com>
484
485 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
486 disassembly pattern.
487
d125c27b
AM		 4882005-07-06 Alan Modra <amodra@bigpond.net.au>
489
490 * Makefile.am (stamp-m32r): Fix path to cpu files.
491 (stamp-m32r, stamp-iq2000): Likewise.
492 * Makefile.in: Regenerate.
493 * m32r-asm.c: Regenerate.
494 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
495 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
496
3ec2b351
NC		 4972005-07-05 Nick Clifton <nickc@redhat.com>
498
499 * iq2000-asm.c: Regenerate.
500 * ms1-asm.c: Regenerate.
501
30123838
JB		 5022005-07-05 Jan Beulich <jbeulich@novell.com>
503
504 * i386-dis.c (SVME_Fixup): New.
505 (grps): Use it for the lidt entry.
506 (PNI_Fixup): Call OP_M rather than OP_E.
507 (INVLPG_Fixup): Likewise.
508
b0eec63e
L		 5092005-07-04 H.J. Lu <hongjiu.lu@intel.com>
510
511 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
512
47b0e7ad
NC		 5132005-07-01 Nick Clifton <nickc@redhat.com>
514
515 * a29k-dis.c: Update to ISO C90 style function declarations and
516 fix formatting.
517 * alpha-opc.c: Likewise.
518 * arc-dis.c: Likewise.
519 * arc-opc.c: Likewise.
520 * avr-dis.c: Likewise.
521 * cgen-asm.in: Likewise.
522 * cgen-dis.in: Likewise.
523 * cgen-ibld.in: Likewise.
524 * cgen-opc.c: Likewise.
525 * cris-dis.c: Likewise.
526 * d10v-dis.c: Likewise.
527 * d30v-dis.c: Likewise.
528 * d30v-opc.c: Likewise.
529 * dis-buf.c: Likewise.
530 * dlx-dis.c: Likewise.
531 * h8300-dis.c: Likewise.
532 * h8500-dis.c: Likewise.
533 * hppa-dis.c: Likewise.
534 * i370-dis.c: Likewise.
535 * i370-opc.c: Likewise.
536 * m10200-dis.c: Likewise.
537 * m10300-dis.c: Likewise.
538 * m68k-dis.c: Likewise.
539 * m88k-dis.c: Likewise.
540 * mips-dis.c: Likewise.
541 * mmix-dis.c: Likewise.
542 * msp430-dis.c: Likewise.
543 * ns32k-dis.c: Likewise.
544 * or32-dis.c: Likewise.
545 * or32-opc.c: Likewise.
546 * pdp11-dis.c: Likewise.
547 * pj-dis.c: Likewise.
548 * s390-dis.c: Likewise.
549 * sh-dis.c: Likewise.
550 * sh64-dis.c: Likewise.
551 * sparc-dis.c: Likewise.
552 * sparc-opc.c: Likewise.
553 * sysdep.h: Likewise.
554 * tic30-dis.c: Likewise.
555 * tic4x-dis.c: Likewise.
556 * tic80-dis.c: Likewise.
557 * v850-dis.c: Likewise.
558 * v850-opc.c: Likewise.
559 * vax-dis.c: Likewise.
560 * w65-dis.c: Likewise.
561 * z8kgen.c: Likewise.
3e7d61b2 562
47b0e7ad
NC		 563 * fr30-*: Regenerate.
564 * frv-*: Regenerate.
565 * ip2k-*: Regenerate.
566 * iq2000-*: Regenerate.
567 * m32r-*: Regenerate.
568 * ms1-*: Regenerate.
569 * openrisc-*: Regenerate.
570 * xstormy16-*: Regenerate.
571
cc16ba8c
BE		 5722005-06-23 Ben Elliston <bje@gnu.org>
573
574 * m68k-dis.c: Use ISC C90.
575 * m68k-opc.c: Formatting fixes.
576
4b185e97
DU		 5772005-06-16 David Ung <davidu@mips.com>
578
3e7d61b2
AM		 579 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
580 instructions to the table; seb/seh/sew/zeb/zeh/zew.
4b185e97 581
ac188222
DB		 5822005-06-15 Dave Brolley <brolley@redhat.com>
583
584 Contribute Morpho ms1 on behalf of Red Hat
3e7d61b2 585 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
ac188222
DB		 586 ms1-opc.h: New files, Morpho ms1 target.
587
588 2004-05-14 Stan Cox <scox@redhat.com>
589
590 * disassemble.c (ARCH_ms1): Define.
591 (disassembler): Handle bfd_arch_ms1
592
593 2004-05-13 Michael Snyder <msnyder@redhat.com>
594
595 * Makefile.am, Makefile.in: Add ms1 target.
596 * configure.in: Ditto.
597
6b5d3a4d
ZW		 5982005-06-08 Zack Weinberg <zack@codesourcery.com>
599
600 * arm-opc.h: Delete; fold contents into ...
601 * arm-dis.c: ... here. Move includes of internal COFF headers
602 next to includes of internal ELF headers.
603 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
604 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
605 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
606 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
607 (iwmmxt_wwnames, iwmmxt_wwssnames):
608 Make const.
609 (regnames): Remove iWMMXt coprocessor register sets.
610 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
611 (get_arm_regnames): Adjust fourth argument to match above changes.
612 (set_iwmmxt_regnames): Delete.
613 (print_insn_arm): Constify 'c'. Use ISO syntax for function
614 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
615 and iwmmxt_cregnames, not set_iwmmxt_regnames.
616 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
617 ISO syntax for function pointer calls.
618
4a5329c6
ZW		 6192005-06-07 Zack Weinberg <zack@codesourcery.com>
620
621 * arm-dis.c: Split up the comments describing the format codes, so
622 that the ARM and 16-bit Thumb opcode tables each have comments
623 preceding them that describe all the codes, and only the codes,
624 valid in those tables. (32-bit Thumb table is already like this.)
625 Reorder the lists in all three comments to match the order in
626 which the codes are implemented.
627 Remove all forward declarations of static functions. Convert all
628 function definitions to ISO C format.
629 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
630 Return nothing.
631 (print_insn_thumb16): Remove unused case 'I'.
632 (print_insn): Update for changed calling convention of subroutines.
633
3d456fa1
JB		 6342005-05-25 Jan Beulich <jbeulich@novell.com>
635
636 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
637 hex (but retain it being displayed as signed). Remove redundant
638 checks. Add handling of displacements for 16-bit addressing in Intel
639 mode.
640
2888cb7a
JB		 6412005-05-25 Jan Beulich <jbeulich@novell.com>
642
643 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
644 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
645 masking of 'rm' in 16-bit memory address handling.
646
1ed8e1e4
AM		 6472005-05-19 Anton Blanchard <anton@samba.org>
648
649 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
650 (print_ppc_disassembler_options): Document it.
651 * ppc-opc.c (SVC_LEV): Define.
652 (LEV): Allow optional operand.
653 (POWER5): Define.
654 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
655 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
656
49cc2e69
KC		 6572005-05-19 Kelley Cook <kcook@gcc.gnu.org>
658
659 * Makefile.in: Regenerate.
660
c19d1205
ZW		 6612005-05-17 Zack Weinberg <zack@codesourcery.com>
662
663 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
664 instructions. Adjust disassembly of some opcodes to match
665 unified syntax.
666 (thumb32_opcodes): New table.
667 (print_insn_thumb): Rename print_insn_thumb16; don't handle
668 two-halfword branches here.
669 (print_insn_thumb32): New function.
670 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
671 and print_insn_thumb32. Be consistent about order of
672 halfwords when printing 32-bit instructions.
673
003519a7
L		 6742005-05-07 H.J. Lu <hongjiu.lu@intel.com>
675
676 PR 843
677 * i386-dis.c (branch_v_mode): New.
678 (indirEv): Use branch_v_mode instead of v_mode.
679 (OP_E): Handle branch_v_mode.
680
920a34a7
L		 6812005-05-07 H.J. Lu <hongjiu.lu@intel.com>
682
683 * d10v-dis.c (dis_2_short): Support 64bit host.
684
5de773c1
NC		 6852005-05-07 Nick Clifton <nickc@redhat.com>
686
687 * po/nl.po: Updated translation.
688
f4321104
NC		 6892005-05-07 Nick Clifton <nickc@redhat.com>
690
691 * Update the address and phone number of the FSF organization in
692 the GPL notices in the following files:
693 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
694 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
695 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
696 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
697 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
698 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
699 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
700 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
701 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
702 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
703 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
704 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
705 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
706 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
707 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
708 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
709 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
710 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
711 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
712 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
713 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
714 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
715 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
716 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
717 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
718 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
719 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
720 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
721 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
722 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
723 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
724 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
725 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
726
10b076a2
JW		 7272005-05-05 James E Wilson <wilson@specifixinc.com>
728
729 * ia64-opc.c: Include sysdep.h before libiberty.h.
730
022716b6
NC		 7312005-05-05 Nick Clifton <nickc@redhat.com>
732
733 * configure.in (ALL_LINGUAS): Add vi.
734 * configure: Regenerate.
735 * po/vi.po: New.
736
db5152b4
JG		 7372005-04-26 Jerome Guitton <guitton@gnat.com>
738
739 * configure.in: Fix the check for basename declaration.
740 * configure: Regenerate.
741
eed0d89a
AM		 7422005-04-19 Alan Modra <amodra@bigpond.net.au>
743
744 * ppc-opc.c (RTO): Define.
745 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
746 entries to suit PPC440.
747
791fe849
MK		 7482005-04-18 Mark Kettenis <kettenis@gnu.org>
749
750 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
751 Add xcrypt-ctr.
752
ffe58f7c
NC		 7532005-04-14 Nick Clifton <nickc@redhat.com>
754
755 * po/fi.po: New translation: Finnish.
756 * configure.in (ALL_LINGUAS): Add fi.
757 * configure: Regenerate.
758
9e9b66a9
AM		 7592005-04-14 Alan Modra <amodra@bigpond.net.au>
760
761 * Makefile.am (NO_WERROR): Define.
762 * configure.in: Invoke AM_BINUTILS_WARNINGS.
763 * Makefile.in: Regenerate.
764 * aclocal.m4: Regenerate.
765 * configure: Regenerate.
766
9494d739
NC		 7672005-04-04 Nick Clifton <nickc@redhat.com>
768
769 * fr30-asm.c: Regenerate.
770 * frv-asm.c: Regenerate.
771 * iq2000-asm.c: Regenerate.
772 * m32r-asm.c: Regenerate.
773 * openrisc-asm.c: Regenerate.
774
6128c599
JB		 7752005-04-01 Jan Beulich <jbeulich@novell.com>
776
777 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
778 visible operands in Intel mode. The first operand of monitor is
779 %rax in 64-bit mode.
780
373ff435
JB		 7812005-04-01 Jan Beulich <jbeulich@novell.com>
782
783 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
784 easier future additions.
785
4bd60896
JG		 7862005-03-31 Jerome Guitton <guitton@gnat.com>
787
788 * configure.in: Check for basename.
789 * configure: Regenerate.
790 * config.in: Ditto.
791
4cc91dba
L		 7922005-03-29 H.J. Lu <hongjiu.lu@intel.com>
793
794 * i386-dis.c (SEG_Fixup): New.
795 (Sv): New.
796 (dis386): Use "Sv" for 0x8c and 0x8e.
797
ec72cfe5
NC		 7982005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
799 Nick Clifton <nickc@redhat.com>
c19d1205 800
ec72cfe5
NC		 801 * vax-dis.c: (entry_addr): New varible: An array of user supplied
802 function entry mask addresses.
803 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 804 elements in entry_addr.
ec72cfe5
NC		 805 (entry_addr_total_slots): New variable: The total number of
806 elements in entry_addr.
807 (parse_disassembler_options): New function. Fills in the entry_addr
808 array.
809 (free_entry_array): New function. Release the memory used by the
810 entry addr array. Suppressed because there is no way to call it.
811 (is_function_entry): Check if a given address is a function's
812 start address by looking at supplied entry mask addresses and
813 symbol information, if available.
814 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
815
85064c79
L		 8162005-03-23 H.J. Lu <hongjiu.lu@intel.com>
817
818 * cris-dis.c (print_with_operands): Use ~31L for long instead
819 of ~31.
820
de7141c7
L		 8212005-03-20 H.J. Lu <hongjiu.lu@intel.com>
822
823 * mmix-opc.c (O): Revert the last change.
824 (Z): Likewise.
825
e493ab45
L		 8262005-03-19 H.J. Lu <hongjiu.lu@intel.com>
827
828 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
829 (Z): Likewise.
830
d8d7c459
HPN		 8312005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
832
833 * mmix-opc.c (O, Z): Force expression as unsigned long.
834
ebdb0383
NC		 8352005-03-18 Nick Clifton <nickc@redhat.com>
836
837 * ip2k-asm.c: Regenerate.
838 * op/opcodes.pot: Regenerate.
839
1ad12f97
NC		 8402005-03-16 Nick Clifton <nickc@redhat.com>
841 Ben Elliston <bje@au.ibm.com>
842
569acd2c 843 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 844 compiler command line. Enabled by default. Disable via
569acd2c 845 --disable-werror.
1ad12f97
NC		 846 * configure: Regenerate.
847
4eb30afc
AM		 8482005-03-16 Alan Modra <amodra@bigpond.net.au>
849
850 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
851 BOOKE.
852
ea8409f7
AM		 8532005-03-15 Alan Modra <amodra@bigpond.net.au>
854
729ae8d2
AM		 855 * po/es.po: Commit new Spanish translation.
856
ea8409f7
AM		 857 * po/fr.po: Commit new French translation.
858
4f495e61
NC		 8592005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
860
861 * vax-dis.c: Fix spelling error
862 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
863 of just "Entry mask: < r1 ... >"
864
0a003adc
ZW		 8652005-03-12 Zack Weinberg <zack@codesourcery.com>
866
867 * arm-dis.c (arm_opcodes): Document %E and %V.
868 Add entries for v6T2 ARM instructions:
869 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
870 (print_insn_arm): Add support for %E and %V.
885fc257 871 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 872
da99ee72
AM		 8732005-03-10 Jeff Baker <jbaker@qnx.com>
874 Alan Modra <amodra@bigpond.net.au>
875
876 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
877 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
878 (SPRG_MASK): Delete.
879 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 880 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 881 mfsprg4..7 after msprg and consolidate.
882
220abb21
AM		 8832005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
884
885 * vax-dis.c (entry_mask_bit): New array.
886 (print_insn_vax): Decode function entry mask.
887
0e06657a
AH		 8882005-03-07 Aldy Hernandez <aldyh@redhat.com>
889
890 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
891
06647dfd
AM		 8922005-03-05 Alan Modra <amodra@bigpond.net.au>
893
894 * po/opcodes.pot: Regenerate.
895
82b829a7
RR		 8962005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
897
220abb21 898 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 899 (dsmOneArcInst): Use the enum values for the decoding class.
900 Remove redundant case in the switch for decodingClass value 11.
82b829a7 901
c4a530c5
JB		 9022005-03-02 Jan Beulich <jbeulich@novell.com>
903
904 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
905 accesses.
906 (OP_C): Consider lock prefix in non-64-bit modes.
907
47d8304e
AM		 9082005-02-24 Alan Modra <amodra@bigpond.net.au>
909
910 * cris-dis.c (format_hex): Remove ineffective warning fix.
911 * crx-dis.c (make_instruction): Warning fix.
912 * frv-asm.c: Regenerate.
913
ec36c4a4
NC		 9142005-02-23 Nick Clifton <nickc@redhat.com>
915
33b71eeb
NC		 916 * cgen-dis.in: Use bfd_byte for buffers that are passed to
917 read_memory.
06647dfd 918
33b71eeb 919 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 920
ec36c4a4
NC		 921 * crx-dis.c (make_instruction): Move argument structure into inner
922 scope and ensure that all of its fields are initialised before
923 they are used.
924
33b71eeb
NC		 925 * fr30-asm.c: Regenerate.
926 * fr30-dis.c: Regenerate.
927 * frv-asm.c: Regenerate.
928 * frv-dis.c: Regenerate.
929 * ip2k-asm.c: Regenerate.
930 * ip2k-dis.c: Regenerate.
931 * iq2000-asm.c: Regenerate.
932 * iq2000-dis.c: Regenerate.
933 * m32r-asm.c: Regenerate.
934 * m32r-dis.c: Regenerate.
935 * openrisc-asm.c: Regenerate.
936 * openrisc-dis.c: Regenerate.
937 * xstormy16-asm.c: Regenerate.
938 * xstormy16-dis.c: Regenerate.
939
53c9ebc5
AM		 9402005-02-22 Alan Modra <amodra@bigpond.net.au>
941
942 * arc-ext.c: Warning fixes.
943 * arc-ext.h: Likewise.
944 * cgen-opc.c: Likewise.
945 * ia64-gen.c: Likewise.
946 * maxq-dis.c: Likewise.
947 * ns32k-dis.c: Likewise.
948 * w65-dis.c: Likewise.
949 * ia64-asmtab.c: Regenerate.
950
610ad19b
AM		 9512005-02-22 Alan Modra <amodra@bigpond.net.au>
952
953 * fr30-desc.c: Regenerate.
954 * fr30-desc.h: Regenerate.
955 * fr30-opc.c: Regenerate.
956 * fr30-opc.h: Regenerate.
957 * frv-desc.c: Regenerate.
958 * frv-desc.h: Regenerate.
959 * frv-opc.c: Regenerate.
960 * frv-opc.h: Regenerate.
961 * ip2k-desc.c: Regenerate.
962 * ip2k-desc.h: Regenerate.
963 * ip2k-opc.c: Regenerate.
964 * ip2k-opc.h: Regenerate.
965 * iq2000-desc.c: Regenerate.
966 * iq2000-desc.h: Regenerate.
967 * iq2000-opc.c: Regenerate.
968 * iq2000-opc.h: Regenerate.
969 * m32r-desc.c: Regenerate.
970 * m32r-desc.h: Regenerate.
971 * m32r-opc.c: Regenerate.
972 * m32r-opc.h: Regenerate.
973 * m32r-opinst.c: Regenerate.
974 * openrisc-desc.c: Regenerate.
975 * openrisc-desc.h: Regenerate.
976 * openrisc-opc.c: Regenerate.
977 * openrisc-opc.h: Regenerate.
978 * xstormy16-desc.c: Regenerate.
979 * xstormy16-desc.h: Regenerate.
980 * xstormy16-opc.c: Regenerate.
981 * xstormy16-opc.h: Regenerate.
982
db9db6f2
AM		 9832005-02-21 Alan Modra <amodra@bigpond.net.au>
984
985 * Makefile.am: Run "make dep-am"
986 * Makefile.in: Regenerate.
987
bf143b25
NC		 9882005-02-15 Nick Clifton <nickc@redhat.com>
989
990 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
991 compile time warnings.
992 (print_keyword): Likewise.
993 (default_print_insn): Likewise.
994
995 * fr30-desc.c: Regenerated.
996 * fr30-desc.h: Regenerated.
997 * fr30-dis.c: Regenerated.
998 * fr30-opc.c: Regenerated.
999 * fr30-opc.h: Regenerated.
1000 * frv-desc.c: Regenerated.
1001 * frv-dis.c: Regenerated.
1002 * frv-opc.c: Regenerated.
1003 * ip2k-asm.c: Regenerated.
1004 * ip2k-desc.c: Regenerated.
1005 * ip2k-desc.h: Regenerated.
1006 * ip2k-dis.c: Regenerated.
1007 * ip2k-opc.c: Regenerated.
1008 * ip2k-opc.h: Regenerated.
1009 * iq2000-desc.c: Regenerated.
1010 * iq2000-dis.c: Regenerated.
1011 * iq2000-opc.c: Regenerated.
1012 * m32r-asm.c: Regenerated.
1013 * m32r-desc.c: Regenerated.
1014 * m32r-desc.h: Regenerated.
1015 * m32r-dis.c: Regenerated.
1016 * m32r-opc.c: Regenerated.
1017 * m32r-opc.h: Regenerated.
1018 * m32r-opinst.c: Regenerated.
1019 * openrisc-desc.c: Regenerated.
1020 * openrisc-desc.h: Regenerated.
1021 * openrisc-dis.c: Regenerated.
1022 * openrisc-opc.c: Regenerated.
1023 * openrisc-opc.h: Regenerated.
1024 * xstormy16-desc.c: Regenerated.
1025 * xstormy16-desc.h: Regenerated.
1026 * xstormy16-dis.c: Regenerated.
1027 * xstormy16-opc.c: Regenerated.
1028 * xstormy16-opc.h: Regenerated.
1029
d6098898
L		 10302005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1031
1032 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1033 address.
1034
5a84f3e0
NC		 10352005-02-11 Nick Clifton <nickc@redhat.com>
1036
bc18c937
NC		 1037 * iq2000-asm.c: Regenerate.
1038
5a84f3e0
NC		 1039 * frv-dis.c: Regenerate.
1040
0a40490e
JB		 10412005-02-07 Jim Blandy <jimb@redhat.com>
1042
1043 * Makefile.am (CGEN): Load guile.scm before calling the main
1044 application script.
1045 * Makefile.in: Regenerated.
1046 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1047 Simply pass the cgen-opc.scm path to ${cgen} as its first
1048 argument; ${cgen} itself now contains the '-s', or whatever is
1049 appropriate for the Scheme being used.
1050
c46f8c51
AC		 10512005-01-31 Andrew Cagney <cagney@gnu.org>
1052
1053 * configure: Regenerate to track ../gettext.m4.
1054
60b9a617
JB		 10552005-01-31 Jan Beulich <jbeulich@novell.com>
1056
1057 * ia64-gen.c (NELEMS): Define.
1058 (shrink): Generate alias with missing second predicate register when
1059 opcode has two outputs and these are both predicates.
1060 * ia64-opc-i.c (FULL17): Define.
1061 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1062 here to generate output template.
1063 (TBITCM, TNATCM): Undefine after use.
1064 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1065 first input. Add ld16 aliases without ar.csd as second output. Add
1066 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1067 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1068 ar.ccv as third/fourth inputs. Consolidate through...
1069 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1070 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1071 * ia64-asmtab.c: Regenerate.
1072
a53bf506
AC		 10732005-01-27 Andrew Cagney <cagney@gnu.org>
1074
1075 * configure: Regenerate to track ../gettext.m4 change.
1076
90219bd0
AO		 10772005-01-25 Alexandre Oliva <aoliva@redhat.com>
1078
1079 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1080 * frv-asm.c: Rebuilt.
1081 * frv-desc.c: Rebuilt.
1082 * frv-desc.h: Rebuilt.
1083 * frv-dis.c: Rebuilt.
1084 * frv-ibld.c: Rebuilt.
1085 * frv-opc.c: Rebuilt.
1086 * frv-opc.h: Rebuilt.
1087
45181ed1
AC		 10882005-01-24 Andrew Cagney <cagney@gnu.org>
1089
1090 * configure: Regenerate, ../gettext.m4 was updated.
1091
9e836e3d
FF		 10922005-01-21 Fred Fish <fnf@specifixinc.com>
1093
1094 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1095 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1096 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1097 * mips-dis.c: Ditto.
1098
5e8cb021
AM		 10992005-01-20 Alan Modra <amodra@bigpond.net.au>
1100
1101 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1102
986e18a5
FF		 11032005-01-19 Fred Fish <fnf@specifixinc.com>
1104
1105 * mips-dis.c (no_aliases): New disassembly option flag.
1106 (set_default_mips_dis_options): Init no_aliases to zero.
1107 (parse_mips_dis_option): Handle no-aliases option.
1108 (print_insn_mips): Ignore table entries that are aliases
1109 if no_aliases is set.
1110 (print_insn_mips16): Ditto.
1111 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1112 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1113 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1114 * mips16-opc.c (mips16_opcodes): Ditto.
1115
e38bc3b5
NC		 11162005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1117
1118 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1119 (inheritance diagram): Add missing edge.
1120 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1121 easier for the testsuite.
1122 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1123 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 1124 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 1125 arch_sh2a_or_sh4_up child.
1126 (sh_table): Do renaming as above.
1127 Correct comment for ldc.l for gas testsuite to read.
1128 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1129 Correct comments for movy.w and movy.l for gas testsuite to read.
1130 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1131
9df48ba9
L		 11322005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1133
1134 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1135
2033b4b9
L		 11362005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1137
1138 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1139
0bcb06d2
AS		 11402005-01-10 Andreas Schwab <schwab@suse.de>
1141
1142 * disassemble.c (disassemble_init_for_target) <case
1143 bfd_arch_ia64>: Set skip_zeroes to 16.
1144 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1145
47add74d
TL		 11462004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1147
1148 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1149
246f4c05
SS		 11502004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1151
1152 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1153 memory references. Convert avr_operand() to C90 formatting.
1154
0e1200e5
TL		 11552004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1156
1157 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1158
89a649f7
TL		 11592004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1160
1161 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1162 (no_op_insn): Initialize array with instructions that have no
1163 operands.
1164 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1165
6255809c
RE		 11662004-11-29 Richard Earnshaw <rearnsha@arm.com>
1167
1168 * arm-dis.c: Correct top-level comment.
1169
2fbad815
RE		 11702004-11-27 Richard Earnshaw <rearnsha@arm.com>
1171
1172 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1173 architecuture defining the insn.
1174 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 1175 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1176 field.
2fbad815
RE		 1177 Also include opcode/arm.h.
1178 * Makefile.am (arm-dis.lo): Update dependency list.
1179 * Makefile.in: Regenerate.
1180
d81acc42
NC		 11812004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1182
1183 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1184 reflect the change to the short immediate syntax.
1185
ca4f2377
AM		 11862004-11-19 Alan Modra <amodra@bigpond.net.au>
1187
5da8bf1b
AM		 1188 * or32-opc.c (debug): Warning fix.
1189 * po/POTFILES.in: Regenerate.
1190
ca4f2377
AM		 1191 * maxq-dis.c: Formatting.
1192 (print_insn): Warning fix.
1193
b7693d02
DJ		 11942004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1195
1196 * arm-dis.c (WORD_ADDRESS): Define.
1197 (print_insn): Use it. Correct big-endian end-of-section handling.
1198
300dac7e
NC		 11992004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1200 Vineet Sharma <vineets@noida.hcltech.com>
1201
1202 * maxq-dis.c: New file.
1203 * disassemble.c (ARCH_maxq): Define.
610ad19b 1204 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 1205 instructions..
1206 * configure.in: Add case for bfd_maxq_arch.
1207 * configure: Regenerate.
1208 * Makefile.am: Add support for maxq-dis.c
1209 * Makefile.in: Regenerate.
1210 * aclocal.m4: Regenerate.
1211
42048ee7
TL		 12122004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1213
1214 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1215 mode.
1216 * crx-dis.c: Likewise.
1217
bd21e58e
HPN		 12182004-11-04 Hans-Peter Nilsson <hp@axis.com>
1219
1220 Generally, handle CRISv32.
1221 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1222 (struct cris_disasm_data): New type.
1223 (format_reg, format_hex, cris_constraint, print_flags)
1224 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1225 callers changed.
1226 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1227 (print_insn_crisv32_without_register_prefix)
1228 (print_insn_crisv10_v32_with_register_prefix)
1229 (print_insn_crisv10_v32_without_register_prefix)
1230 (cris_parse_disassembler_options): New functions.
1231 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1232 parameter. All callers changed.
1233 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1234 failure.
1235 (cris_constraint) <case 'Y', 'U'>: New cases.
1236 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1237 for constraint 'n'.
1238 (print_with_operands) <case 'Y'>: New case.
1239 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1240 <case 'N', 'Y', 'Q'>: New cases.
1241 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1242 (print_insn_cris_with_register_prefix)
1243 (print_insn_cris_without_register_prefix): Call
1244 cris_parse_disassembler_options.
1245 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1246 for CRISv32 and the size of immediate operands. New v32-only
1247 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1248 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1249 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1250 Change brp to be v3..v10.
1251 (cris_support_regs): New vector.
1252 (cris_opcodes): Update head comment. New format characters '[',
1253 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1254 Add new opcodes for v32 and adjust existing opcodes to accommodate
1255 differences to earlier variants.
1256 (cris_cond15s): New vector.
1257
9306ca4a
JB		 12582004-11-04 Jan Beulich <jbeulich@novell.com>
1259
1260 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1261 (indirEb): Remove.
1262 (Mp): Use f_mode rather than none at all.
1263 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1264 replaces what previously was x_mode; x_mode now means 128-bit SSE
1265 operands.
1266 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1267 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1268 pinsrw's second operand is Edqw.
1269 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1270 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1271 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1272 mode when an operand size override is present or always suffixing.
1273 More instructions will need to be added to this group.
1274 (putop): Handle new macro chars 'C' (short/long suffix selector),
1275 'I' (Intel mode override for following macro char), and 'J' (for
1276 adding the 'l' prefix to far branches in AT&T mode). When an
1277 alternative was specified in the template, honor macro character when
1278 specified for Intel mode.
1279 (OP_E): Handle new *_mode values. Correct pointer specifications for
1280 memory operands. Consolidate output of index register.
1281 (OP_G): Handle new *_mode values.
1282 (OP_I): Handle const_1_mode.
1283 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1284 respective opcode prefix bits have been consumed.
1285 (OP_EM, OP_EX): Provide some default handling for generating pointer
1286 specifications.
1287
f39c96a9
TL		 12882004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1289
1290 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1291 COP_INST macro.
1292
812337be
TL		 12932004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1294
1295 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1296 (getregliststring): Support HI/LO and user registers.
610ad19b 1297 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 1298 rearrangement done in CRX opcode header file.
1299 (crx_regtab): Likewise.
1300 (crx_optab): Likewise.
610ad19b 1301 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 1302 formats.
1303 support new Co-Processor instruction 'cpi'.
1304
4030fa5a
NC		 13052004-10-27 Nick Clifton <nickc@redhat.com>
1306
1307 * opcodes/iq2000-asm.c: Regenerate.
1308 * opcodes/iq2000-desc.c: Regenerate.
1309 * opcodes/iq2000-desc.h: Regenerate.
1310 * opcodes/iq2000-dis.c: Regenerate.
1311 * opcodes/iq2000-ibld.c: Regenerate.
1312 * opcodes/iq2000-opc.c: Regenerate.
1313 * opcodes/iq2000-opc.h: Regenerate.
1314
fc3d45e8
TL		 13152004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1316
1317 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1318 us4, us5 (respectively).
1319 Remove unsupported 'popa' instruction.
1320 Reverse operands order in store co-processor instructions.
1321
3c55da70
AM		 13222004-10-15 Alan Modra <amodra@bigpond.net.au>
1323
1324 * Makefile.am: Run "make dep-am"
1325 * Makefile.in: Regenerate.
1326
7fa3d080
BW		 13272004-10-12 Bob Wilson <bob.wilson@acm.org>
1328
1329 * xtensa-dis.c: Use ISO C90 formatting.
1330
e612bb4d
AM		 13312004-10-09 Alan Modra <amodra@bigpond.net.au>
1332
1333 * ppc-opc.c: Revert 2004-09-09 change.
1334
43cd72b9
BW		 13352004-10-07 Bob Wilson <bob.wilson@acm.org>
1336
1337 * xtensa-dis.c (state_names): Delete.
1338 (fetch_data): Use xtensa_isa_maxlength.
1339 (print_xtensa_operand): Replace operand parameter with opcode/operand
1340 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1341 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1342 instruction bundles. Use xmalloc instead of malloc.
1343
bbac1f2a
NC		 13442004-10-07 David Gibson <david@gibson.dropbear.id.au>
1345
1346 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1347 initializers.
1348
48c9f030
NC		 13492004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1350
1351 * crx-opc.c (crx_instruction): Support Co-processor insns.
1352 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1353 (getregliststring): Change function to use the above enum.
1354 (print_arg): Handle CO-Processor insns.
1355 (crx_cinvs): Add 'b' option to invalidate the branch-target
1356 cache.
1357
12c64a4e
AH		 13582004-10-06 Aldy Hernandez <aldyh@redhat.com>
1359
1360 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1361 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1362 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1363 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1364 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1365
14127cc4
NC		 13662004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1367
1368 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1369 rather than add it.
1370
0dd132b6
NC		 13712004-09-30 Paul Brook <paul@codesourcery.com>
1372
1373 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1374 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1375
3f85e526
L		 13762004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1377
1378 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1379 (CONFIG_STATUS_DEPENDENCIES): New.
1380 (Makefile): Removed.
1381 (config.status): Likewise.
1382 * Makefile.in: Regenerated.
1383
8ae85421
AM		 13842004-09-17 Alan Modra <amodra@bigpond.net.au>
1385
1386 * Makefile.am: Run "make dep-am".
1387 * Makefile.in: Regenerate.
1388 * aclocal.m4: Regenerate.
1389 * configure: Regenerate.
1390 * po/POTFILES.in: Regenerate.
1391 * po/opcodes.pot: Regenerate.
1392
24443139
AS		 13932004-09-11 Andreas Schwab <schwab@suse.de>
1394
1395 * configure: Rebuild.
1396
2a309db0
AM		 13972004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1398
1399 * ppc-opc.c (L): Make this field not optional.
1400
42851540
NC		 14012004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1402
1403 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1404 Fix parameter to 'm[t|f]csr' insns.
1405
979273e3
NN		 14062004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1407
1408 * configure.in: Autoupdate to autoconf 2.59.
1409 * aclocal.m4: Rebuild with aclocal 1.4p6.
1410 * configure: Rebuild with autoconf 2.59.
1411 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1412 bfd changes for autoconf 2.59 on the way).
1413 * config.in: Rebuild with autoheader 2.59.
1414
ac28a1cb
RS		 14152004-08-27 Richard Sandiford <rsandifo@redhat.com>
1416
1417 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1418
30d1c836
ML		 14192004-07-30 Michal Ludvig <mludvig@suse.cz>
1420
1421 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1422 (GRPPADLCK2): New define.
1423 (twobyte_has_modrm): True for 0xA6.
1424 (grps): GRPPADLCK2 for opcode 0xA6.
1425
0b0ac059
AO		 14262004-07-29 Alexandre Oliva <aoliva@redhat.com>
1427
1428 Introduce SH2a support.
1429 * sh-opc.h (arch_sh2a_base): Renumber.
1430 (arch_sh2a_nofpu_base): Remove.
1431 (arch_sh_base_mask): Adjust.
1432 (arch_opann_mask): New.
1433 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1434 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1435 (sh_table): Adjust whitespace.
1436 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1437 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1438 instruction list throughout.
1439 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1440 of arch_sh2a in instruction list throughout.
1441 (arch_sh2e_up): Accomodate above changes.
1442 (arch_sh2_up): Ditto.
1443 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1444 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1445 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1446 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1447 * sh-opc.h (arch_sh2a_nofpu): New.
1448 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1449 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1450 instruction.
1451 2004-01-20 DJ Delorie <dj@redhat.com>
1452 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1453 2003-12-29 DJ Delorie <dj@redhat.com>
1454 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1455 sh_opcode_info, sh_table): Add sh2a support.
1456 (arch_op32): New, to tag 32-bit opcodes.
1457 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1458 2003-12-02 Michael Snyder <msnyder@redhat.com>
1459 * sh-opc.h (arch_sh2a): Add.
1460 * sh-dis.c (arch_sh2a): Handle.
1461 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1462
670ec21d
NC		 14632004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1464
1465 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1466
ed049af3
NC		 14672004-07-22 Nick Clifton <nickc@redhat.com>
1468
1469 PR/280
1470 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1471 insns - this is done by objdump itself.
1472 * h8500-dis.c (print_insn_h8500): Likewise.
1473
20f0a1fc
NC		 14742004-07-21 Jan Beulich <jbeulich@novell.com>
1475
1476 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1477 regardless of address size prefix in effect.
1478 (ptr_reg): Size or address registers does not depend on rex64, but
1479 on the presence of an address size override.
1480 (OP_MMX): Use rex.x only for xmm registers.
1481 (OP_EM): Use rex.z only for xmm registers.
1482
6f14957b
MR		 14832004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1484
1485 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1486 move/branch operations to the bottom so that VR5400 multimedia
1487 instructions take precedence in disassembly.
1488
1586d91e
MR		 14892004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1490
1491 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1492 ISA-specific "break" encoding.
1493
982de27a
NC		 14942004-07-13 Elvis Chiang <elvisfb@gmail.com>
1495
1496 * arm-opc.h: Fix typo in comment.
1497
4300ab10
AS		 14982004-07-11 Andreas Schwab <schwab@suse.de>
1499
1500 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1501
8577e690
AS		 15022004-07-09 Andreas Schwab <schwab@suse.de>
1503
1504 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1505
1fe1f39c
NC		 15062004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1507
1508 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1509 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1510 (crx-dis.lo): New target.
1511 (crx-opc.lo): Likewise.
1512 * Makefile.in: Regenerate.
1513 * configure.in: Handle bfd_crx_arch.
1514 * configure: Regenerate.
1515 * crx-dis.c: New file.
1516 * crx-opc.c: New file.
1517 * disassemble.c (ARCH_crx): Define.
1518 (disassembler): Handle ARCH_crx.
1519
7a33b495
JW		 15202004-06-29 James E Wilson <wilson@specifixinc.com>
1521
1522 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1523 * ia64-asmtab.c: Regnerate.
1524
98e69875
AM		 15252004-06-28 Alan Modra <amodra@bigpond.net.au>
1526
1527 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1528 (extract_fxm): Don't test dialect.
1529 (XFXFXM_MASK): Include the power4 bit.
1530 (XFXM): Add p4 param.
1531 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1532
a53b85e2
AO		 15332004-06-27 Alexandre Oliva <aoliva@redhat.com>
1534
1535 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1536 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1537
d0618d1c
AM		 15382004-06-26 Alan Modra <amodra@bigpond.net.au>
1539
1540 * ppc-opc.c (BH, XLBH_MASK): Define.
1541 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1542
1d9f512f
AM		 15432004-06-24 Alan Modra <amodra@bigpond.net.au>
1544
1545 * i386-dis.c (x_mode): Comment.
1546 (two_source_ops): File scope.
1547 (float_mem): Correct fisttpll and fistpll.
1548 (float_mem_mode): New table.
1549 (dofloat): Use it.
1550 (OP_E): Correct intel mode PTR output.
1551 (ptr_reg): Use open_char and close_char.
1552 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1553 operands. Set two_source_ops.
1554
52886d70
AM		 15552004-06-15 Alan Modra <amodra@bigpond.net.au>
1556
1557 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1558 instead of _raw_size.
1559
bad9ceea
JJ		 15602004-06-08 Jakub Jelinek <jakub@redhat.com>
1561
1562 * ia64-gen.c (in_iclass): Handle more postinc st
1563 and ld variants.
1564 * ia64-asmtab.c: Rebuilt.
1565
0451f5df
MS		 15662004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1567
1568 * s390-opc.txt: Correct architecture mask for some opcodes.
1569 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1570 in the esa mode as well.
1571
f6f9408f
JR		 15722004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1573
1574 * sh-dis.c (target_arch): Make unsigned.
1575 (print_insn_sh): Replace (most of) switch with a call to
1576 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1577 * sh-opc.h: Redefine architecture flags values.
1578 Add sh3-nommu architecture.
1579 Reorganise <arch>_up macros so they make more visual sense.
1580 (SH_MERGE_ARCH_SET): Define new macro.
1581 (SH_VALID_BASE_ARCH_SET): Likewise.
1582 (SH_VALID_MMU_ARCH_SET): Likewise.
1583 (SH_VALID_CO_ARCH_SET): Likewise.
1584 (SH_VALID_ARCH_SET): Likewise.
1585 (SH_MERGE_ARCH_SET_VALID): Likewise.
1586 (SH_ARCH_SET_HAS_FPU): Likewise.
1587 (SH_ARCH_SET_HAS_DSP): Likewise.
1588 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1589 (sh_get_arch_from_bfd_mach): Add prototype.
1590 (sh_get_arch_up_from_bfd_mach): Likewise.
1591 (sh_get_bfd_mach_from_arch_set): Likewise.
1592 (sh_merge_bfd_arc): Likewise.
1593
be8c092b
NC		 15942004-05-24 Peter Barada <peter@the-baradas.com>
1595
1596 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1597 into new match_insn_m68k function. Loop over canidate
1598 matches and select first that completely matches.
be8c092b
NC		 1599 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1600 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1601 to verify addressing for MAC/EMAC.
be8c092b
NC		 1602 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1603 reigster halves since 'fpu' and 'spl' look misleading.
1604 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1605 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1606 first, tighten up match masks.
1607 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1608 'size' from special case code in print_insn_m68k to
1609 determine decode size of insns.
1610
a30e9cc4
AM		 16112004-05-19 Alan Modra <amodra@bigpond.net.au>
1612
1613 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1614 well as when -mpower4.
1615
9598fbe5
NC		 16162004-05-13 Nick Clifton <nickc@redhat.com>
1617
1618 * po/fr.po: Updated French translation.
1619
6b6e92f4
NC		 16202004-05-05 Peter Barada <peter@the-baradas.com>
1621
1622 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1623 variants in arch_mask. Only set m68881/68851 for 68k chips.
1624 * m68k-op.c: Switch from ColdFire chips to core variants.
1625
a404d431
AM		 16262004-05-05 Alan Modra <amodra@bigpond.net.au>
1627
a30e9cc4 1628 PR 147.
a404d431
AM		 1629 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1630
f3806e43
BE		 16312004-04-29 Ben Elliston <bje@au.ibm.com>
1632
520ceea4
BE		 1633 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1634 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1635
1f1799d5
KK		 16362004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1637
1638 * sh-dis.c (print_insn_sh): Print the value in constant pool
1639 as a symbol if it looks like a symbol.
1640
fd99574b
NC		 16412004-04-22 Peter Barada <peter@the-baradas.com>
1642
1643 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1644 appropriate ColdFire architectures.
1645 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1646 mask addressing.
1647 Add EMAC instructions, fix MAC instructions. Remove
1648 macmw/macml/msacmw/msacml instructions since mask addressing now
1649 supported.
1650
b4781d44
JJ		 16512004-04-20 Jakub Jelinek <jakub@redhat.com>
1652
1653 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1654 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1655 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1656 macro. Adjust all users.
1657
91809fda 16582004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1659
91809fda
NC		 1660 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1661 separately.
1662
f4453dfa
NC		 16632004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1664
1665 * m32r-asm.c: Regenerate.
1666
9b0de91a
SS		 16672004-03-29 Stan Shebs <shebs@apple.com>
1668
1669 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1670 used.
1671
e20c0b3d
AM		 16722004-03-19 Alan Modra <amodra@bigpond.net.au>
1673
1674 * aclocal.m4: Regenerate.
1675 * config.in: Regenerate.
1676 * configure: Regenerate.
1677 * po/POTFILES.in: Regenerate.
1678 * po/opcodes.pot: Regenerate.
1679
fdd12ef3
AM		 16802004-03-16 Alan Modra <amodra@bigpond.net.au>
1681
1682 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1683 PPC_OPERANDS_GPR_0.
1684 * ppc-opc.c (RA0): Define.
1685 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1686 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1687 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1688
2dc111b3 16892004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1690
1691 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1692
7bfeee7b
AM		 16932004-03-15 Alan Modra <amodra@bigpond.net.au>
1694
1695 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1696
7ffdda93
ML		 16972004-03-12 Michal Ludvig <mludvig@suse.cz>
1698
1699 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1700 (grps): Delete GRPPLOCK entry.
7ffdda93 1701
cc0ec051
AM		 17022004-03-12 Alan Modra <amodra@bigpond.net.au>
1703
1704 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1705 (M, Mp): Use OP_M.
1706 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1707 (GRPPADLCK): Define.
1708 (dis386): Use NOP_Fixup on "nop".
1709 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1710 (twobyte_has_modrm): Set for 0xa7.
1711 (padlock_table): Delete. Move to..
1712 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1713 and clflush.
1714 (print_insn): Revert PADLOCK_SPECIAL code.
1715 (OP_E): Delete sfence, lfence, mfence checks.
1716
4fd61dcb
JJ		 17172004-03-12 Jakub Jelinek <jakub@redhat.com>
1718
1719 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1720 (INVLPG_Fixup): New function.
1721 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1722
0f10071e
ML		 17232004-03-12 Michal Ludvig <mludvig@suse.cz>
1724
1725 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1726 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1727 (padlock_table): New struct with PadLock instructions.
1728 (print_insn): Handle PADLOCK_SPECIAL.
1729
c02908d2
AM		 17302004-03-12 Alan Modra <amodra@bigpond.net.au>
1731
1732 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1733 (OP_E): Twiddle clflush to sfence here.
1734
d5bb7600
NC		 17352004-03-08 Nick Clifton <nickc@redhat.com>
1736
1737 * po/de.po: Updated German translation.
1738
ae51a426
JR		 17392003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1740
1741 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1742 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1743 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1744 accordingly.
1745
676a64f4
RS		 17462004-03-01 Richard Sandiford <rsandifo@redhat.com>
1747
1748 * frv-asm.c: Regenerate.
1749 * frv-desc.c: Regenerate.
1750 * frv-desc.h: Regenerate.
1751 * frv-dis.c: Regenerate.
1752 * frv-ibld.c: Regenerate.
1753 * frv-opc.c: Regenerate.
1754 * frv-opc.h: Regenerate.
1755
c7a48b9a
RS		 17562004-03-01 Richard Sandiford <rsandifo@redhat.com>
1757
1758 * frv-desc.c, frv-opc.c: Regenerate.
1759
8ae0baa2
RS		 17602004-03-01 Richard Sandiford <rsandifo@redhat.com>
1761
1762 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1763
ce11586c
JR		 17642004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1765
1766 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1767 Also correct mistake in the comment.
1768
6a5709a5
JR		 17692004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1770
1771 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1772 ensure that double registers have even numbers.
1773 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1774 that reserved instruction 0xfffd does not decode the same
1775 as 0xfdfd (ftrv).
1776 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1777 REG_N refers to a double register.
1778 Add REG_N_B01 nibble type and use it instead of REG_NM
1779 in ftrv.
1780 Adjust the bit patterns in a few comments.
1781
e5d2b64f 17822004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1783
1784 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1785
1f04b05f
AH		 17862004-02-20 Aldy Hernandez <aldyh@redhat.com>
1787
1788 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1789
2f3b8700
AH		 17902004-02-20 Aldy Hernandez <aldyh@redhat.com>
1791
1792 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1793
f0b26da6 17942004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1795
1796 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1797 mtivor32, mtivor33, mtivor34.
f0b26da6 1798
23d59c56 17992004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1800
1801 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1802
34920d91
NC		 18032004-02-10 Petko Manolov <petkan@nucleusys.com>
1804
1805 * arm-opc.h Maverick accumulator register opcode fixes.
1806
44d86481
BE		 18072004-02-13 Ben Elliston <bje@wasabisystems.com>
1808
1809 * m32r-dis.c: Regenerate.
1810
17707c23
MS		 18112004-01-27 Michael Snyder <msnyder@redhat.com>
1812
1813 * sh-opc.h (sh_table): "fsrra", not "fssra".
1814
fe3a9bc4
NC		 18152004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1816
1817 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1818 contraints.
1819
ff24f124
JJ		 18202004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1821
1822 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1823
a02a862a
AM		 18242004-01-19 Alan Modra <amodra@bigpond.net.au>
1825
1826 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1827 1. Don't print scale factor on AT&T mode when index missing.
1828
d164ea7f
AO		 18292004-01-16 Alexandre Oliva <aoliva@redhat.com>
1830
1831 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1832 when loaded into XR registers.
1833
cb10e79a
RS		 18342004-01-14 Richard Sandiford <rsandifo@redhat.com>
1835
1836 * frv-desc.h: Regenerate.
1837 * frv-desc.c: Regenerate.
1838 * frv-opc.c: Regenerate.
1839
f532f3fa
MS		 18402004-01-13 Michael Snyder <msnyder@redhat.com>
1841
1842 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1843
e45d0630
PB		 18442004-01-09 Paul Brook <paul@codesourcery.com>
1845
1846 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1847 specific opcodes.
1848
3ba7a1aa
DJ		 18492004-01-07 Daniel Jacobowitz <drow@mvista.com>
1850
1851 * Makefile.am (libopcodes_la_DEPENDENCIES)
1852 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1853 comment about the problem.
1854 * Makefile.in: Regenerate.
1855
ba2d3f07
AO		 18562004-01-06 Alexandre Oliva <aoliva@redhat.com>
1857
1858 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1859 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1860 cut&paste errors in shifting/truncating numerical operands.
1861 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1862 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1863 (parse_uslo16): Likewise.
1864 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1865 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1866 (parse_s12): Likewise.
1867 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1868 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1869 (parse_uslo16): Likewise.
1870 (parse_uhi16): Parse gothi and gotfuncdeschi.
1871 (parse_d12): Parse got12 and gotfuncdesc12.
1872 (parse_s12): Likewise.
1873
3ab48931
NC		 18742004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1875
1876 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1877 instruction which looks similar to an 'rla' instruction.
a0bd404e 1878
c9e214e5 1879For older changes see ChangeLog-0203
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RH		 1880\f
1881Local Variables:
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NC		 1882mode: change-log
1883left-margin: 8
1884fill-column: 74
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RH		 1885version-control: never
1886End:
GDB Binutils - Deliverables
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