Commit | Line | Data |
---|---|---|
b3882df9 L |
1 | 2006-06-10 H.J. Lu <hongjiu.lu@intel.com> |
2 | ||
3 | * i386.c (GRP10): Renamed to ... | |
4 | (GRP12): This. | |
5 | (GRP11): Renamed to ... | |
6 | (GRP13): This. | |
7 | (GRP12): Renamed to ... | |
8 | (GRP14): This. | |
9 | (GRP13): Renamed to ... | |
10 | (GRP15): This. | |
11 | (GRP14): Renamed to ... | |
12 | (GRP16): This. | |
13 | (dis386_twobyte): Updated. | |
14 | (grps): Likewise. | |
15 | ||
5f4df3dd NC |
16 | 2006-06-09 Nick Clifton <nickc@redhat.com> |
17 | ||
18 | * po/fi.po: Updated Finnish translation. | |
19 | ||
6648b7cf JM |
20 | 2006-06-07 Joseph S. Myers <joseph@codesourcery.com> |
21 | ||
22 | * po/Make-in (pdf, ps): New dummy targets. | |
23 | ||
c22aaad1 PB |
24 | 2006-06-06 Paul Brook <paul@codesourcery.com> |
25 | ||
26 | * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm | |
27 | instructions. | |
28 | (neon_opcodes): Add conditional execution specifiers. | |
29 | (thumb_opcodes): Ditto. | |
30 | (thumb32_opcodes): Ditto. | |
31 | (arm_conditional): Change 0xe to "al" and add "" to end. | |
32 | (ifthen_state, ifthen_next_state, ifthen_address): New. | |
33 | (IFTHEN_COND): Define. | |
34 | (print_insn_coprocessor, print_insn_neon): Print thumb conditions. | |
35 | (print_insn_arm): Change %c to use new values of arm_conditional. | |
36 | (print_insn_thumb16): Print thumb conditions. Add %I. | |
37 | (print_insn_thumb32): Print thumb conditions. | |
38 | (find_ifthen_state): New function. | |
39 | (print_insn): Track IT block state. | |
40 | ||
9622b051 AM |
41 | 2006-06-06 Ben Elliston <bje@au.ibm.com> |
42 | Anton Blanchard <anton@samba.org> | |
43 | Peter Bergner <bergner@vnet.ibm.com> | |
44 | ||
45 | * ppc-dis.c (powerpc_dialect): Handle power6 option. | |
46 | (print_ppc_disassembler_options): Mention power6. | |
47 | ||
65263ce3 TS |
48 | 2006-06-06 Thiemo Seufer <ths@mips.com> |
49 | Chao-ying Fu <fu@mips.com> | |
50 | ||
51 | * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2. | |
52 | * mips-opc.c: Add DSP64 instructions. | |
53 | ||
92ce91bb AM |
54 | 2006-06-06 Alan Modra <amodra@bigpond.net.au> |
55 | ||
56 | * m68hc11-dis.c (print_insn): Warning fix. | |
57 | ||
4cfe2c59 DJ |
58 | 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com> |
59 | ||
60 | * po/Make-in (top_builddir): Define. | |
61 | ||
7ff1a5b5 AM |
62 | 2006-06-05 Alan Modra <amodra@bigpond.net.au> |
63 | ||
64 | * Makefile.am: Run "make dep-am". | |
65 | * Makefile.in: Regenerate. | |
66 | * config.in: Regenerate. | |
67 | ||
20e95c23 DJ |
68 | 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com> |
69 | ||
70 | * Makefile.am (INCLUDES): Use @INCINTL@. | |
71 | * acinclude.m4: Include new gettext macros. | |
72 | * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS. | |
73 | Remove local code for po/Makefile. | |
74 | * Makefile.in, aclocal.m4, configure: Regenerated. | |
75 | ||
eebf07fb NC |
76 | 2006-05-30 Nick Clifton <nickc@redhat.com> |
77 | ||
78 | * po/es.po: Updated Spanish translation. | |
79 | ||
a596001e RS |
80 | 2006-05-25 Richard Sandiford <richard@codesourcery.com> |
81 | ||
82 | * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd | |
83 | and fmovem entries. Put register list entries before immediate | |
84 | mask entries. Use "l" rather than "L" in the fmovem entries. | |
85 | * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it | |
86 | out from INFO. | |
87 | (m68k_scan_mask): New function, split out from... | |
88 | (print_insn_m68k): ...here. If no architecture has been set, | |
89 | first try printing an m680x0 instruction, then try a Coldfire one. | |
90 | ||
4a4d496a NC |
91 | 2006-05-24 Nick Clifton <nickc@redhat.com> |
92 | ||
93 | * po/ga.po: Updated Irish translation. | |
94 | ||
a854efa3 NC |
95 | 2006-05-22 Nick Clifton <nickc@redhat.com> |
96 | ||
97 | * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts. | |
98 | ||
0bd79061 NC |
99 | 2006-05-22 Nick Clifton <nickc@redhat.com> |
100 | ||
101 | * po/nl.po: Updated translation. | |
102 | ||
00988f49 AM |
103 | 2006-05-18 Alan Modra <amodra@bigpond.net.au> |
104 | ||
105 | * avr-dis.c: Formatting fix. | |
106 | ||
9b3f89ee TS |
107 | 2006-05-14 Thiemo Seufer <ths@mips.com> |
108 | ||
109 | * mips16-opc.c (I1, I32, I64): New shortcut defines. | |
110 | (mips16_opcodes): Change membership of instructions to their | |
111 | lowest baseline ISA. | |
112 | ||
cb6d3433 L |
113 | 2006-05-09 H.J. Lu <hongjiu.lu@intel.com> |
114 | ||
115 | * i386-dis.c (grps): Update sgdt/sidt for 64bit. | |
116 | ||
1f3c39b9 JB |
117 | 2006-05-05 Julian Brown <julian@codesourcery.com> |
118 | ||
119 | * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as | |
120 | vldm/vstm. | |
121 | ||
d43b4baf TS |
122 | 2006-05-05 Thiemo Seufer <ths@mips.com> |
123 | David Ung <davidu@mips.com> | |
124 | ||
125 | * mips-opc.c: Add macro for cache instruction. | |
126 | ||
39a7806d TS |
127 | 2006-05-04 Thiemo Seufer <ths@mips.com> |
128 | Nigel Stephens <nigel@mips.com> | |
129 | David Ung <davidu@mips.com> | |
130 | ||
131 | * mips-dis.c (mips_arch_choices): Add smartmips instruction | |
132 | decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release | |
133 | 2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to | |
134 | MIPS64R2. | |
135 | * mips-opc.c: fix random typos in comments. | |
136 | (INSN_SMARTMIPS): New defines. | |
137 | (mips_builtin_opcodes): Add paired single support for MIPS32R2. | |
138 | Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd, | |
139 | flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the | |
140 | FP_S and FP_D flags to denote single and double register | |
141 | accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards. | |
142 | Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1 | |
143 | for MIPS32R2. Add SmartMIPS instructions. Add two-argument | |
144 | variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to | |
145 | release 2 ISAs. | |
146 | * mips16-opc.c (mips16_opcodes): Add sdbbp instruction. | |
147 | ||
104b4fab TS |
148 | 2006-05-03 Thiemo Seufer <ths@mips.com> |
149 | ||
150 | * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order. | |
151 | ||
022fac6d TS |
152 | 2006-05-02 Thiemo Seufer <ths@mips.com> |
153 | Nigel Stephens <nigel@mips.com> | |
154 | David Ung <davidu@mips.com> | |
155 | ||
156 | * mips-dis.c (print_insn_args): Force mips16 to odd addresses. | |
157 | (print_mips16_insn_arg): Force mips16 to odd addresses. | |
158 | ||
9bcd4f99 TS |
159 | 2006-04-30 Thiemo Seufer <ths@mips.com> |
160 | David Ung <davidu@mips.com> | |
161 | ||
162 | * mips-opc.c (mips_builtin_opcodes): Add udi instructions | |
163 | "udi0" to "udi15". | |
164 | * mips-dis.c (print_insn_args): Adds udi argument handling. | |
165 | ||
f095b97b JW |
166 | 2006-04-28 James E Wilson <wilson@specifix.com> |
167 | ||
168 | * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing | |
169 | error message. | |
170 | ||
59c455b3 TS |
171 | 2006-04-28 Thiemo Seufer <ths@mips.com> |
172 | David Ung <davidu@mips.com> | |
bdb09db1 | 173 | Nigel Stephens <nigel@mips.com> |
59c455b3 TS |
174 | |
175 | * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register | |
176 | names. | |
177 | ||
cc0ca239 | 178 | 2006-04-28 Thiemo Seufer <ths@mips.com> |
bdb09db1 | 179 | Nigel Stephens <nigel@mips.com> |
cc0ca239 TS |
180 | David Ung <davidu@mips.com> |
181 | ||
182 | * mips-dis.c (print_insn_args): Add mips_opcode argument. | |
183 | (print_insn_mips): Adjust print_insn_args call. | |
184 | ||
0d09bfe6 | 185 | 2006-04-28 Thiemo Seufer <ths@mips.com> |
bdb09db1 | 186 | Nigel Stephens <nigel@mips.com> |
0d09bfe6 TS |
187 | |
188 | * mips-dis.c (print_insn_args): Print $fcc only for FP | |
189 | instructions, use $cc elsewise. | |
190 | ||
654c225a | 191 | 2006-04-28 Thiemo Seufer <ths@mips.com> |
bdb09db1 | 192 | Nigel Stephens <nigel@mips.com> |
654c225a TS |
193 | |
194 | * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names): | |
195 | Map MIPS16 registers to O32 names. | |
196 | (print_mips16_insn_arg): Use mips16_reg_names. | |
197 | ||
0dbde4cf JB |
198 | 2006-04-26 Julian Brown <julian@codesourcery.com> |
199 | ||
200 | * arm-dis.c (print_insn_neon): Disassemble floating-point constant | |
201 | VMOV. | |
202 | ||
16980d0b JB |
203 | 2006-04-26 Nathan Sidwell <nathan@codesourcery.com> |
204 | Julian Brown <julian@codesourcery.com> | |
205 | ||
206 | * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert | |
207 | %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?]. | |
208 | Add unified load/store instruction names. | |
209 | (neon_opcode_table): New. | |
210 | (arm_opcodes): Expand meaning of %<bitfield>['`?]. | |
211 | (arm_decode_bitfield): New. | |
212 | (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers. | |
213 | Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y. | |
214 | (print_insn_neon): New. | |
215 | (print_insn_arm): Adjust print_insn_coprocessor call. Call | |
216 | print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers. | |
217 | (print_insn_thumb32): Likewise. | |
218 | ||
ec3fcc56 AM |
219 | 2006-04-19 Alan Modra <amodra@bigpond.net.au> |
220 | ||
221 | * Makefile.am: Run "make dep-am". | |
222 | * Makefile.in: Regenerate. | |
223 | ||
241a6c40 AM |
224 | 2006-04-19 Alan Modra <amodra@bigpond.net.au> |
225 | ||
7c6646cd AM |
226 | * avr-dis.c (avr_operand): Warning fix. |
227 | ||
241a6c40 AM |
228 | * configure: Regenerate. |
229 | ||
e7403566 DJ |
230 | 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com> |
231 | ||
232 | * po/POTFILES.in: Regenerated. | |
233 | ||
52f16a0e NC |
234 | 2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de> |
235 | ||
236 | PR binutils/2454 | |
237 | * avr-dis.c (avr_operand): Arrange for a comment to appear before | |
238 | the symolic form of an address, so that the output of objdump -d | |
239 | can be reassembled. | |
240 | ||
e78efa90 DD |
241 | 2006-04-10 DJ Delorie <dj@redhat.com> |
242 | ||
243 | * m32c-asm.c: Regenerate. | |
244 | ||
108a6f8e CD |
245 | 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> |
246 | ||
247 | * Makefile.am: Add install-html target. | |
248 | * Makefile.in: Regenerate. | |
249 | ||
a135cb2c NC |
250 | 2006-04-06 Nick Clifton <nickc@redhat.com> |
251 | ||
252 | * po/vi/po: Updated Vietnamese translation. | |
253 | ||
47426b41 AM |
254 | 2006-03-31 Paul Koning <ni1d@arrl.net> |
255 | ||
256 | * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction. | |
257 | ||
331f1cbe BS |
258 | 2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com> |
259 | ||
260 | * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the | |
261 | logic to identify halfword shifts. | |
262 | ||
c16d2bf0 PB |
263 | 2006-03-16 Paul Brook <paul@codesourcery.com> |
264 | ||
265 | * arm-dis.c (arm_opcodes): Rename swi to svc. | |
266 | (thumb_opcodes): Ditto. | |
267 | ||
5348b81e DD |
268 | 2006-03-13 DJ Delorie <dj@redhat.com> |
269 | ||
5398310a DD |
270 | * m32c-asm.c: Regenerate. |
271 | * m32c-desc.c: Likewise. | |
272 | * m32c-desc.h: Likewise. | |
273 | * m32c-dis.c: Likewise. | |
274 | * m32c-ibld.c: Likewise. | |
5348b81e DD |
275 | * m32c-opc.c: Likewise. |
276 | * m32c-opc.h: Likewise. | |
277 | ||
253d272c DD |
278 | 2006-03-10 DJ Delorie <dj@redhat.com> |
279 | ||
280 | * m32c-desc.c: Regenerate with mul.l, mulu.l. | |
281 | * m32c-opc.c: Likewise. | |
282 | * m32c-opc.h: Likewise. | |
283 | ||
284 | ||
f530741d NC |
285 | 2006-03-09 Nick Clifton <nickc@redhat.com> |
286 | ||
287 | * po/sv.po: Updated Swedish translation. | |
288 | ||
35c52694 L |
289 | 2006-03-07 H.J. Lu <hongjiu.lu@intel.com> |
290 | ||
291 | PR binutils/2428 | |
292 | * i386-dis.c (REP_Fixup): New function. | |
293 | (AL): Remove duplicate. | |
294 | (Xbr): New. | |
295 | (Xvr): Likewise. | |
296 | (Ybr): Likewise. | |
297 | (Yvr): Likewise. | |
298 | (indirDXr): Likewise. | |
299 | (ALr): Likewise. | |
300 | (eAXr): Likewise. | |
301 | (dis386): Updated entries of ins, outs, movs, lods and stos. | |
302 | ||
ed963e2d NC |
303 | 2006-03-05 Nick Clifton <nickc@redhat.com> |
304 | ||
305 | * cgen-ibld.in (insert_normal): Cope with attempts to insert a | |
306 | signed 32-bit value into an unsigned 32-bit field when the host is | |
307 | a 64-bit machine. | |
308 | * fr30-ibld.c: Regenerate. | |
309 | * frv-ibld.c: Regenerate. | |
310 | * ip2k-ibld.c: Regenerate. | |
311 | * iq2000-asm.c: Regenerate. | |
312 | * iq2000-ibld.c: Regenerate. | |
313 | * m32c-ibld.c: Regenerate. | |
314 | * m32r-ibld.c: Regenerate. | |
315 | * openrisc-ibld.c: Regenerate. | |
316 | * xc16x-ibld.c: Regenerate. | |
317 | * xstormy16-ibld.c: Regenerate. | |
318 | ||
c7d41dc5 NC |
319 | 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) |
320 | ||
321 | * xc16x-asm.c: Regenerate. | |
322 | * xc16x-dis.c: Regenerate. | |
c7d41dc5 | 323 | |
f7d9e5c3 CD |
324 | 2006-02-27 Carlos O'Donell <carlos@codesourcery.com> |
325 | ||
326 | * po/Make-in: Add html target. | |
327 | ||
331d2d0d L |
328 | 2006-02-27 H.J. Lu <hongjiu.lu@intel.com> |
329 | ||
330 | * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by | |
331 | Intel Merom New Instructions. | |
332 | (THREE_BYTE_0): Likewise. | |
333 | (THREE_BYTE_1): Likewise. | |
334 | (three_byte_table): Likewise. | |
335 | (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use | |
336 | THREE_BYTE_1 for entry 0x3a. | |
337 | (twobyte_has_modrm): Updated. | |
338 | (twobyte_uses_SSE_prefix): Likewise. | |
339 | (print_insn): Handle 3-byte opcodes used by Intel Merom New | |
340 | Instructions. | |
341 | ||
ff3f9d5b DM |
342 | 2006-02-24 David S. Miller <davem@sunset.davemloft.net> |
343 | ||
344 | * sparc-dis.c (v9_priv_reg_names): Add "gl" entry. | |
345 | (v9_hpriv_reg_names): New table. | |
346 | (print_insn_sparc): Allow values up to 16 for '?' and '!'. | |
347 | New cases '$' and '%' for read/write hyperprivileged register. | |
348 | * sparc-opc.c (sparc_opcodes): Add new entries for UA2005 | |
349 | window handling and rdhpr/wrhpr instructions. | |
350 | ||
6772dd07 DD |
351 | 2006-02-24 DJ Delorie <dj@redhat.com> |
352 | ||
353 | * m32c-desc.c: Regenerate with linker relaxation attributes. | |
354 | * m32c-desc.h: Likewise. | |
355 | * m32c-dis.c: Likewise. | |
356 | * m32c-opc.c: Likewise. | |
357 | ||
62b3e311 PB |
358 | 2006-02-24 Paul Brook <paul@codesourcery.com> |
359 | ||
360 | * arm-dis.c (arm_opcodes): Add V7 instructions. | |
361 | (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants. | |
362 | (print_arm_address): New function. | |
363 | (print_insn_arm): Use it. Add 'P' and 'U' cases. | |
364 | (psr_name): New function. | |
365 | (print_insn_thumb32): Add 'U', 'C' and 'D' cases. | |
366 | ||
59cf82fe L |
367 | 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> |
368 | ||
369 | * ia64-opc-i.c (bXc): New. | |
370 | (mXc): Likewise. | |
371 | (OpX2TaTbYaXcC): Likewise. | |
372 | (TF). Likewise. | |
373 | (TFCM). Likewise. | |
374 | (ia64_opcodes_i): Add instructions for tf. | |
375 | ||
376 | * ia64-opc.h (IMMU5b): New. | |
377 | ||
378 | * ia64-asmtab.c: Regenerated. | |
379 | ||
19a7219f L |
380 | 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> |
381 | ||
382 | * ia64-gen.c: Update copyright years. | |
383 | * ia64-opc-b.c: Likewise. | |
384 | ||
7f3dfb9c L |
385 | 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> |
386 | ||
387 | * ia64-gen.c (lookup_regindex): Handle ".vm". | |
388 | (print_dependency_table): Handle '\"'. | |
389 | ||
390 | * ia64-ic.tbl: Updated from SDM 2.2. | |
391 | * ia64-raw.tbl: Likewise. | |
392 | * ia64-waw.tbl: Likewise. | |
393 | * ia64-asmtab.c: Regenerated. | |
394 | ||
395 | * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1. | |
396 | ||
d70c5fc7 NC |
397 | 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> |
398 | Anil Paranjape <anilp1@kpitcummins.com> | |
399 | Shilin Shakti <shilins@kpitcummins.com> | |
400 | ||
401 | * xc16x-desc.h: New file | |
402 | * xc16x-desc.c: New file | |
403 | * xc16x-opc.h: New file | |
404 | * xc16x-opc.c: New file | |
405 | * xc16x-ibld.c: New file | |
406 | * xc16x-asm.c: New file | |
407 | * xc16x-dis.c: New file | |
408 | * Makefile.am: Entries for xc16x | |
409 | * Makefile.in: Regenerate | |
410 | * cofigure.in: Add xc16x target information. | |
411 | * configure: Regenerate. | |
412 | * disassemble.c: Add xc16x target information. | |
413 | ||
a1cfb73e L |
414 | 2006-02-11 H.J. Lu <hongjiu.lu@intel.com> |
415 | ||
416 | * i386-dis.c (dis386_twobyte): Use "movZ" for debug register | |
417 | moves. | |
418 | ||
6dd5059a L |
419 | 2006-02-11 H.J. Lu <hongjiu.lu@intel.com> |
420 | ||
421 | * i386-dis.c ('Z'): Add a new macro. | |
422 | (dis386_twobyte): Use "movZ" for control register moves. | |
423 | ||
8536c657 NC |
424 | 2006-02-10 Nick Clifton <nickc@redhat.com> |
425 | ||
426 | * iq2000-asm.c: Regenerate. | |
427 | ||
266abb8f NS |
428 | 2006-02-07 Nathan Sidwell <nathan@codesourcery.com> |
429 | ||
430 | * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features. | |
431 | ||
f1a64f49 DU |
432 | 2006-01-26 David Ung <davidu@mips.com> |
433 | ||
434 | * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx, | |
435 | ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d, | |
436 | floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d, | |
437 | nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d, | |
438 | rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s. | |
439 | ||
9e919b5f AM |
440 | 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org> |
441 | ||
442 | * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d, | |
443 | ld_d_r, pref_xd_cb): Use signed char to hold data to be | |
444 | disassembled. | |
445 | * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes | |
446 | buffer overflows when disassembling instructions like | |
447 | ld (ix+123),0x23 | |
448 | * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed | |
449 | operand, if the offset is negative. | |
450 | ||
c9021189 AM |
451 | 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org> |
452 | ||
453 | * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use | |
454 | unsigned char to hold data to be disassembled. | |
455 | ||
d99b6465 AS |
456 | 2006-01-17 Andreas Schwab <schwab@suse.de> |
457 | ||
458 | PR binutils/1486 | |
459 | * disassemble.c (disassemble_init_for_target): Set | |
460 | disassembler_needs_relocs for bfd_arch_arm. | |
461 | ||
c2fe9327 PB |
462 | 2006-01-16 Paul Brook <paul@codesourcery.com> |
463 | ||
e88d958a | 464 | * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss, |
c2fe9327 PB |
465 | f?add?, and f?sub? instructions. |
466 | ||
32fba81d NC |
467 | 2006-01-16 Nick Clifton <nickc@redhat.com> |
468 | ||
469 | * po/zh_CN.po: New Chinese (simplified) translation. | |
470 | * configure.in (ALL_LINGUAS): Add "zh_CH". | |
471 | * configure: Regenerate. | |
472 | ||
1b3a26b5 PB |
473 | 2006-01-05 Paul Brook <paul@codesourcery.com> |
474 | ||
475 | * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry. | |
476 | ||
db313fa6 DD |
477 | 2006-01-06 DJ Delorie <dj@redhat.com> |
478 | ||
479 | * m32c-desc.c: Regenerate. | |
480 | * m32c-opc.c: Regenerate. | |
481 | * m32c-opc.h: Regenerate. | |
482 | ||
54d46aca DD |
483 | 2006-01-03 DJ Delorie <dj@redhat.com> |
484 | ||
485 | * cgen-ibld.in (extract_normal): Avoid memory range errors. | |
486 | * m32c-ibld.c: Regenerated. | |
487 | ||
e88d958a | 488 | For older changes see ChangeLog-2005 |
252b5132 RH |
489 | \f |
490 | Local Variables: | |
2f6d2f85 NC |
491 | mode: change-log |
492 | left-margin: 8 | |
493 | fill-column: 74 | |
252b5132 RH |
494 | version-control: never |
495 | End: |