projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
include/
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
ce3d2015
AM		 12010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2
3 * ppc-dis.c (ppc_opts): Add titan entry.
4 * ppc-opc.c (TITAN, MULHW): Define.
5 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
6
68339fdf
SP		 72010-02-03 Quentin Neill <quentin.neill@amd.com>
8
9 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
10 to CPU_BDVER1_FLAGS
11 * i386-init.h: Regenerated.
12
f3d55a94
AG		 132010-02-03 Anthony Green <green@moxielogic.com>
14
15 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
16 0x0f, and make 0x00 an illegal instruction.
17
b0e28b39
DJ		 182010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
19
20 * opcodes/arm-dis.c (struct arm_private_data): New.
21 (print_insn_coprocessor, print_insn_arm): Update to use struct
22 arm_private_data.
23 (is_mapping_symbol, get_map_sym_type): New functions.
24 (get_sym_code_type): Check the symbol's section. Do not check
25 mapping symbols.
26 (print_insn): Default to disassembling ARM mode code. Check
27 for mapping symbols separately from other symbols. Use
28 struct arm_private_data.
29
1c480963
L		 302010-01-28 H.J. Lu <hongjiu.lu@intel.com>
31
32 * i386-dis.c (EXVexWdqScalar): New.
33 (vex_scalar_w_dq_mode): Likewise.
34 (prefix_table): Update entries for PREFIX_VEX_3899,
35 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
36 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
37 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
38 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
39 (intel_operand_size): Handle vex_scalar_w_dq_mode.
40 (OP_EX): Likewise.
41
539f890d
L		 422010-01-27 H.J. Lu <hongjiu.lu@intel.com>
43
44 * i386-dis.c (XMScalar): New.
45 (EXdScalar): Likewise.
46 (EXqScalar): Likewise.
47 (EXqScalarS): Likewise.
48 (VexScalar): Likewise.
49 (EXdVexScalarS): Likewise.
50 (EXqVexScalarS): Likewise.
51 (XMVexScalar): Likewise.
52 (scalar_mode): Likewise.
53 (d_scalar_mode): Likewise.
54 (d_scalar_swap_mode): Likewise.
55 (q_scalar_mode): Likewise.
56 (q_scalar_swap_mode): Likewise.
57 (vex_scalar_mode): Likewise.
58 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
59 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
60 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
61 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
62 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
63 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
64 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
65 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
66 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
67 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
68 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
69 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
70 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
71 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
72 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
73 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
74 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
75 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
76 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
77 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
78 q_scalar_mode, q_scalar_swap_mode.
79 (OP_XMM): Handle scalar_mode.
80 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
81 and q_scalar_swap_mode.
82 (OP_VEX): Handle vex_scalar_mode.
83
208b4d78
L		 842010-01-24 H.J. Lu <hongjiu.lu@intel.com>
85
86 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
87
448b213a
L		 882010-01-24 H.J. Lu <hongjiu.lu@intel.com>
89
90 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
91
47cf8fa0
L		 922010-01-24 H.J. Lu <hongjiu.lu@intel.com>
93
94 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
95
592d1631
L		 962010-01-24 H.J. Lu <hongjiu.lu@intel.com>
97
98 * i386-dis.c (Bad_Opcode): New.
99 (bad_opcode): Likewise.
100 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
101 (dis386_twobyte): Likewise.
102 (reg_table): Likewise.
103 (prefix_table): Likewise.
104 (x86_64_table): Likewise.
105 (vex_len_table): Likewise.
106 (vex_w_table): Likewise.
107 (mod_table): Likewise.
108 (rm_table): Likewise.
109 (float_reg): Likewise.
110 (reg_table): Remove trailing "(bad)" entries.
111 (prefix_table): Likewise.
112 (x86_64_table): Likewise.
113 (vex_len_table): Likewise.
114 (vex_w_table): Likewise.
115 (mod_table): Likewise.
116 (rm_table): Likewise.
117 (get_valid_dis386): Handle bytemode 0.
118
712366da
L		 1192010-01-23 H.J. Lu <hongjiu.lu@intel.com>
120
121 * i386-opc.h (VEXScalar): New.
122
123 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
124 instructions.
125 * i386-tbl.h: Regenerated.
126
706e8205 1272010-01-21 H.J. Lu <hongjiu.lu@intel.com>
73bb6729
L		 128
129 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
130
131 * i386-opc.tbl: Add xsave64 and xrstor64.
132 * i386-tbl.h: Regenerated.
133
99ea83aa
NC		 1342010-01-20 Nick Clifton <nickc@redhat.com>
135
136 PR 11170
137 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
138 based post-indexed addressing.
139
a6461c02
SP		 1402010-01-15 Sebastian Pop <sebastian.pop@amd.com>
141
142 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
143 * i386-tbl.h: Regenerated.
144
a2a7d12c
L		 1452010-01-14 H.J. Lu <hongjiu.lu@intel.com>
146
147 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
148 comments.
149
b9733481
L		 1502010-01-14 H.J. Lu <hongjiu.lu@intel.com>
151
152 * i386-dis.c (names_mm): New.
153 (intel_names_mm): Likewise.
154 (att_names_mm): Likewise.
155 (names_xmm): Likewise.
156 (intel_names_xmm): Likewise.
157 (att_names_xmm): Likewise.
158 (names_ymm): Likewise.
159 (intel_names_ymm): Likewise.
160 (att_names_ymm): Likewise.
161 (print_insn): Set names_mm, names_xmm and names_ymm.
162 (OP_MMX): Use names_mm, names_xmm and names_ymm.
163 (OP_XMM): Likewise.
164 (OP_EM): Likewise.
165 (OP_EMC): Likewise.
166 (OP_MXC): Likewise.
167 (OP_EX): Likewise.
168 (XMM_Fixup): Likewise.
169 (OP_VEX): Likewise.
170 (OP_EX_VexReg): Likewise.
171 (OP_Vex_2src): Likewise.
172 (OP_Vex_2src_1): Likewise.
173 (OP_Vex_2src_2): Likewise.
174 (OP_REG_VexI4): Likewise.
175
5e6718e4
L		 1762010-01-13 H.J. Lu <hongjiu.lu@intel.com>
177
178 * i386-dis.c (print_insn): Update comments.
179
d869730d
L		 1802010-01-12 H.J. Lu <hongjiu.lu@intel.com>
181
182 * i386-dis.c (rex_original): Removed.
183 (ckprefix): Remove rex_original.
184 (print_insn): Update comments.
185
3725885a
RW		 1862010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
187
188 * Makefile.in: Regenerate.
189 * configure: Regenerate.
190
b7cd1872
DE		 1912010-01-07 Doug Evans <dje@sebabeach.org>
192
193 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
194 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
195 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
196 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
197 * xstormy16-ibld.c: Regenerate.
198
69dd9865
SP		 1992010-01-06 Quentin Neill <quentin.neill@amd.com>
200
201 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
202 * i386-init.h: Regenerated.
203
e3e535bc
NC		 2042010-01-06 Daniel Gutson <dgutson@codesourcery.com>
205
206 * arm-dis.c (print_insn): Fixed search for next symbol and data
207 dumping condition, and the initial mapping symbol state.
208
fe8afbc4
DE		 2092010-01-05 Doug Evans <dje@sebabeach.org>
210
211 * cgen-ibld.in: #include "cgen/basic-modes.h".
212 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
213 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
214 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
215 * xstormy16-ibld.c: Regenerate.
216
2edcd244
NC		 2172010-01-04 Nick Clifton <nickc@redhat.com>
218
219 PR 11123
220 * arm-dis.c (print_insn_coprocessor): Initialise value.
221
0dc93057
AM		 2222010-01-04 Edmar Wienskoski <edmar@freescale.com>
223
224 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
225
05994f45
DE		 2262010-01-02 Doug Evans <dje@sebabeach.org>
227
228 * cgen-asm.in: Update copyright year.
229 * cgen-dis.in: Update copyright year.
230 * cgen-ibld.in: Update copyright year.
231 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
232 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
233 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
234 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
235 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
236 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
237 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
238 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
239 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
240 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
241 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
242 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
243 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
244 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
245 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
246 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
247 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
248 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
249 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
250 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
251 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f 252
43ecc30f 253For older changes see ChangeLog-2009
252b5132
RH		 254\f
255Local Variables:
2f6d2f85
NC		 256mode: change-log
257left-margin: 8
258fill-column: 74
252b5132
RH		 259version-control: never
260End:
GDB Binutils - Deliverables
This page took 0.474973 seconds and 4 git commands to generate.