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CommitLineData
8de28984
L		 12007-05-07 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
4 for some SSE4 instructions.
5 (threebyte_0x3a_uses_DATA_prefix): Likewise.
6
20592a94
L		 72007-05-03 H.J. Lu <hongjiu.lu@intel.com>
8
9 * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
10
11 * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
12 type for crc32.
13
9344ff29
L		 142007-05-01 H.J. Lu <hongjiu.lu@intel.com>
15
16 * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
17 check data size prefix in 16bit mode.
18
19 * i386-opc.c (i386_optab): Default crc32 to non-8bit and
20 support Intel mode.
21
53289dcd
MS		 222007-04-30 Mark Salter <msalter@redhat.com>
23
24 * frv-desc.c: Regenerate.
25 * frv-desc.h: Regenerate.
26
eb42fac1
AM		 272007-04-30 Alan Modra <amodra@bigpond.net.au>
28
29 PR 4436
30 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
31
484c222e
L		 322007-04-27 H.J. Lu <hongjiu.lu@intel.com>
33
34 * i386-dis.c (modrm): Put reg before rm.
35
5d669648
L		 362007-04-26 H.J. Lu <hongjiu.lu@intel.com>
37
38 PR binutils/4430
39 * i386-dis.c (print_displacement): New.
40 (OP_E): Call print_displacement instead of print_operand_value
41 to output displacement when either base or index exist. Print
42 the explicit zero displacement in 16bit mode.
43
185b1163
L		 442007-04-26 H.J. Lu <hongjiu.lu@intel.com>
45
46 PR binutils/4429
47 * i386-dis.c (print_insn): Also swap the order of op_riprel
48 when swapping op_index. Break when the RIP relative address
49 is printed.
50 (OP_E): Properly handle RIP relative addressing and print the
51 explicit zero displacement for Intel mode.
52
eddc20ad
AM		 532007-04-27 Alan Modra <amodra@bigpond.net.au>
54
55 * Makefile.am: Run "make dep-am".
56 * Makefile.in: Regenerate.
57 * ns32k-dis.c: Include sysdep.h first.
58
dacc8b01
MS		 592007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
60
61 * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
62 opcode.
eddc20ad
AM		 63 * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
64
fbb92301
NC		 652007-04-24 Nick Clifton <nickc@redhat.com>
66
67 * arm-dis.c (print_insn): Initialise type.
68
4c273957
AM		 692007-04-24 Alan Modra <amodra@bigpond.net.au>
70
71 * cgen-types.h: Include bfd_stdint.h, not stdint.h.
72 * Makefile.am: Run "make dep-am".
73 * Makefile.in: Regenerate.
74
9a2e615a
NS		 752007-04-23 Nathan Sidwell <nathan@codesourcery.com>
76
77 * m68k-opc.c: Mark mcfisa_c instructions.
78
37b37b2d
RE		 792007-04-21 Richard Earnshaw <rearnsha@arm.com>
80
81 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
82 (thumb_opcodes): Add missing white space in adr.
83 (arm_decode_shift): New parameter, print_shift. Only decode the
84 shift parameter if set. Adjust callers.
85 (print_insn_arm): Support for operand type q with no shift decode.
86
717bbdf1
AM		 872007-04-21 Alan Modra <amodra@bigpond.net.au>
88
db557034
AM		 89 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
90 Move contents to..
91 (i386_regtab): ..here.
92 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
93
717bbdf1
AM		 94 * ppc-opc.c (powerpc_operands): Delete duplicate entries.
95 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
96 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
97 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
98
78336706
NS		 992007-04-20 Nathan Sidwell <nathan@codesourcery.com>
100
101 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
102 rambar1.
103
b84bf58a
AM		 1042007-04-20 Alan Modra <amodra@bigpond.net.au>
105
106 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
107 change.
108 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
109 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
110 references to following deleted functions.
111 (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
112 (insert_ds, extract_ds, insert_de, extract_de): Delete.
113 (insert_des, extract_des, insert_li, extract_li): Delete.
114 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
115 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
116 (num_powerpc_operands): New constant.
117 (XSPRG_MASK): Remove entire SPRG field.
118 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
119
0bbdef92
AM		 1202007-04-20 Alan Modra <amodra@bigpond.net.au>
121
122 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
123 (Z2_MASK): Define.
124 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
125
86ad2a13
RE		 1262007-04-20 Richard Earnshaw <rearnsha@arm.com>
127
128 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
129 being disassembled.
130
a33e055d
AM		 1312007-04-19 Alan Modra <amodra@bigpond.net.au>
132
133 * Makefile.am: Run "make dep-am".
134 * Makefile.in: Regenerate.
135 * po/POTFILES.in: Regenerate.
136
360b1600
AM		 1372007-04-19 Alan Modra <amodra@bigpond.net.au>
138
139 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
140 db10cyc, db12cyc, db16cyc.
141
b20ae55e
AM		 1422007-04-19 Nathan Froyd <froydnj@codesourcery.com>
143
144 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
145
381d071f
L		 1462007-04-18 H.J. Lu <hongjiu.lu@intel.com>
147
148 * i386-dis.c (CRC32_Fixup): New.
149 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
150 PREGRP91): New.
151 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
152 (threebyte_0x3a_uses_DATA_prefix): Likewise.
153 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
154 PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
155 (three_byte_table): Likewise.
156
157 * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
158
f6fdceb7 159 * i386-opc.h (CpuSSE4_2): New.
381d071f
L		 160 (CpuSSE4): Likewise.
161 (CpuUnknownFlags): Add CpuSSE4_2.
162
42903f7f
L		 1632007-04-18 H.J. Lu <hongjiu.lu@intel.com>
164
165 * i386-dis.c (XMM_Fixup): New.
166 (Edqb): New.
167 (Edqd): New.
168 (XMM0): New.
169 (dqb_mode): New.
170 (dqd_mode): New.
171 (PREGRP39 ... PREGRP85): New.
172 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
173 (threebyte_0x3a_uses_DATA_prefix): Likewise.
174 (prefix_user_table): Add PREGRP39 ... PREGRP85.
175 (three_byte_table): Likewise.
176 (putop): Handle 'K'.
177 (intel_operand_size): Handle dqb_mode, dqd_mode):
178 (OP_E): Likewise.
179 (OP_G): Likewise.
180
181 * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
182
183 * i386-opc.h (CpuSSE4_1): New.
184 (CpuUnknownFlags): Add CpuSSE4_1.
185 (regKludge): Update comment.
186
ee5c21a0
DJ		 1872007-04-18 Matthias Klose <doko@ubuntu.com>
188
189 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
190 * Makefile.in: Regenerate.
191
b7d19ba6
SE		 1922007-04-14 Steve Ellcey <sje@cup.hp.com>
193
194 * Makefile.am: Add ACLOCAL_AMFLAGS.
195 * Makefile.in: Regenerate.
196
246c51aa
L		 1972007-04-13 H.J. Lu <hongjiu.lu@intel.com>
198
199 * i386-dis.c: Remove trailing white spaces.
6e26e51a
L		 200 * i386-opc.c: Likewise.
201 * i386-opc.h: Likewise.
246c51aa 202
7967e09e
L		 2032007-04-11 H.J. Lu <hongjiu.lu@intel.com>
204
205 PR binutils/4333
206 * i386-dis.c (GRP1a): New.
207 (GRP1b ... GRPPADLCK2): Update index.
208 (dis386): Use GRP1a for entry 0x8f.
209 (mod, rm, reg): Removed. Replaced by ...
210 (modrm): This.
211 (grps): Add GRP1a.
212
56dc1f8a
KH		 2132007-04-09 Kazu Hirata <kazu@codesourcery.com>
214
215 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
216 info->print_address_func if longjmp is called.
217
144f4bc6
DD		 2182007-03-29 DJ Delorie <dj@redhat.com>
219
220 * m32c-desc.c: Regenerate.
221 * m32c-dis.c: Regenerate.
222 * m32c-opc.c: Regenerate.
223
e72cf3ec
L		 2242007-03-28 H.J. Lu <hongjiu.lu@intel.com>
225
226 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
227 movq. Remove InvMem from sldt, smsw and str.
228
229 * i386-opc.h (InvMem): Renamed to ...
230 (RegMem): Update comments.
231 (AnyMem): Remove InvMem.
232
831480e9 2332007-03-27 Paul Brook <paul@codesourcery.com>
b74ed8f5 234
b74ed8f5
PB		 235 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
236
4146fd53
PB		 2372007-03-24 Paul Brook <paul@codesourcery.com>
238
239 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
240 (print_insn_coprocessor): Handle %<bitfield>x.
241
b6702015 2422007-03-24 Paul Brook <paul@codesourcery.com>
e72cf3ec 243 Mark Shinwell <shinwell@codesourcery.com>
b6702015
PB		 244
245 * arm-dis.c (arm_opcodes): Print SRS base register.
246
831480e9 2472007-03-23 H.J. Lu <hongjiu.lu@intel.com>
0003779b
L		 248
249 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
250
251 * i386-opc.c (i386_optab): Add rex.wrxb.
252
831480e9 2532007-03-21 H.J. Lu <hongjiu.lu@intel.com>
161a04f6
L		 254
255 * i386-dis.c (REX_MODE64): Remove definition.
256 (REX_EXTX): Likewise.
257 (REX_EXTY): Likewise.
258 (REX_EXTZ): Likewise.
259 (USED_REX): Use REX_OPCODE instead of 0x40.
260 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
261 REX_R, REX_X and REX_B respectively.
262
831480e9 2632007-03-21 H.J. Lu <hongjiu.lu@intel.com>
8b38ad71
L		 264
265 PR binutils/4218
266 * i386-dis.c (PREGRP38): New.
267 (dis386): Use PREGRP38 for 0x90.
268 (prefix_user_table): Add PREGRP38.
269 (print_insn): Set uses_REPZ_prefix to 1 for pause.
270 (NOP_Fixup1): Properly handle REX bits.
271 (NOP_Fixup2): Likewise.
272
273 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
274 Allow register with nop.
275
75b06e7b
DD		 2762007-03-20 DJ Delorie <dj@redhat.com>
277
278 * m32c-asm.c: Regenerate.
279 * m32c-desc.c: Regenerate.
280 * m32c-desc.h: Regenerate.
281 * m32c-dis.h: Regenerate.
282 * m32c-ibld.c: Regenerate.
283 * m32c-opc.c: Regenerate.
284 * m32c-opc.h: Regenerate.
285
c3fe08fa
L		 2862007-03-15 H.J. Lu <hongjiu.lu@intel.com>
287
288 * i386-opc.c: Include "libiberty.h".
289 (i386_regtab): Remove the last entry.
290 (i386_regtab_size): New.
291 (i386_float_regtab_size): Likewise.
292
293 * i386-opc.h (i386_regtab_size): New.
294 (i386_float_regtab_size): Likewise.
295
0b1cf022
L		 2962007-03-15 H.J. Lu <hongjiu.lu@intel.com>
297
298 * Makefile.am (CFILES): Add i386-opc.c.
299 (ALL_MACHINES): Add i386-opc.lo.
300 Run "make dep-am".
301 * Makefile.in: Regenerated.
302
303 * configure.in: Add i386-opc.lo for bfd_i386_arch.
304 * configure: Regenerated.
305
306 * i386-dis.c: Include "opcode/i386.h".
307 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
308 (FWAIT_OPCODE): Remove definition.
309 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
310 (MAX_OPERANDS): Remove definition.
311
312 * i386-opc.c: New file.
313 * i386-opc.h: Likewise.
314
56eced12
L		 3152007-03-15 H.J. Lu <hongjiu.lu@intel.com>
316
317 * Makefile.in: Regenerated.
318
6f74c397
L		 3192007-03-09 H.J. Lu <hongjiu.lu@intel.com>
320
321 * i386-dis.c (OP_Rd): Renamed to ...
322 (OP_R): This.
323 (Rd): Updated.
324 (Rm): Likewise.
325
a6d04ec4
AM		 3262007-03-08 Alan Modra <amodra@bigpond.net.au>
327
1620f33d
AM		 328 * fr30-asm.c: Regenerate.
329 * frv-asm.c: Regenerate.
330 * ip2k-asm.c: Regenerate.
331 * iq2000-asm.c: Regenerate.
332 * m32c-asm.c: Regenerate.
333 * m32r-asm.c: Regenerate.
334 * m32r-dis.c: Regenerate.
335 * mt-asm.c: Regenerate.
336 * mt-ibld.c: Regenerate.
337 * mt-opc.c: Regenerate.
338 * openrisc-asm.c: Regenerate.
339 * xc16x-asm.c: Regenerate.
340 * xstormy16-asm.c: Regenerate.
341
a6d04ec4
AM		 342 * Makefile.am: Run "make dep-am".
343 * Makefile.in: Regenerate.
344 * po/POTFILES.in: Regenerate.
345
b5639b37
MS		 3462007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
347
348 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
349 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
350 instruction formats added.
351 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
352 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
353 masks added.
354 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
355 instructions added.
356 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
357 (main): z9-ec cpu type option added.
358 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
359
b2e818b7
DD		 3602007-02-22 DJ Delorie <dj@redhat.com>
361
362 * s390-opc.c (INSTR_SS_L2RDRD): New.
363 (MASK_SS_L2RDRD): New.
364 * s390-opc.txt (pka): Use it.
365
8b082fb1
TS		 3662007-02-20 Thiemo Seufer <ths@mips.com>
367 Chao-Ying Fu <fu@mips.com>
368
369 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
370 (print_insn_args): Add support for balign instruction.
371 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
372 (mips_builtin_opcodes): Add DSP R2 instructions.
373
929e4d1a
MS		 3742007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
375
376 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
377 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
378 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
379 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
380
b8e55848
MS		 3812007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
382
383 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
384 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
385 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
386 and sfpc.
387
af692060
NC		 3882007-02-16 Nick Clifton <nickc@redhat.com>
389
390 PR binutils/4045
391 * avr-dis.c (comment_start): New variable, contains the prefix to
392 use when printing addresses in comments.
393 (print_insn_avr): Set comment_start to an empty space if there is
394 no symbol table available as the generic address printing code
395 will prefix the numeric value of the address with 0x.
396
ce518a5f
L		 3972007-02-13 H.J. Lu <hongjiu.lu@intel.com>
398
399 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
400 in struct dis386.
401
bd2f2e55 4022007-02-05 Dave Brolley <brolley@redhat.com>
8c9c183d
DB		 403 Richard Sandiford <rsandifo@redhat.com>
404 DJ Delorie <dj@redhat.com>
405 Graydon Hoare <graydon@redhat.com>
406 Frank Ch. Eigler <fche@redhat.com>
407 Ben Elliston <bje@redhat.com>
408
409 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
410 (CFILES): Add mep-*.c
411 (ALL_MACHINES): Add mep-*.lo.
412 (CLEANFILES): Add stamp-mep.
413 (CGEN_CPUS): Add mep.
414 (MEP_DEPS): New variable.
415 (mep-*): New targets.
416 * configure.in: Handle bfd_mep_arch.
417 * disassemble.c (ARCH_mep): New macro.
418 (disassembler): Handle bfd_arch_mep.
419 (disassemble_init_for_target): Likewise.
420 * mep-*: New files for Toshiba Media Processor (MeP).
bd2f2e55
DB		 421 * Makefile.in: Regenerated.
422 * configure: Regenerated.
423
eb7834a6 4242007-02-05 H.J. Lu <hongjiu.lu@intel.com>
65ca155d
L		 425
426 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
427 wrap around within the same segment in 16bit mode.
428
eb7834a6 4292007-02-02 H.J. Lu <hongjiu.lu@intel.com>
206717e8
L		 430
431 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
432 prefix.
433
c4f5c3d7
L		 4342007-02-02 H.J. Lu <hongjiu.lu@intel.com>
435
436 * avr-dis.c (avr_operand): Correct PR number in comment.
437
fc523535 4382007-02-02 H.J. Lu <hongjiu.lu@intel.com>
f59a29b9
L		 439
440 * disassemble.c (disassembler_usage): Call
441 print_i386_disassembler_options for i386 disassembler.
442
443 * i386-dis.c (print_i386_disassembler_options): New.
444 (print_insn): Support the new addr64 option.
445
64a3a6fc
NC		 4462007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
447
448 * ppc-dis.c (powerpc_dialect): Handle ppc440.
449 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
450 be used.
451
ba4e851b
AM		 4522007-02-02 Alan Modra <amodra@bigpond.net.au>
453
454 * ppc-opc.c (insert_bdm): -Many comment.
455 (valid_bo): Add "extract" param. Accept both powerpc and power4
456 BO fields when disassembling with -Many.
457 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
458
3bdcfdf4
KH		 4592007-01-08 Kazu Hirata <kazu@codesourcery.com>
460
461 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
462 cpu32 | fido_a except on tbl instructions.
463
a028a6f5
PB		 4642007-01-04 Paul Brook <paul@codesourcery.com>
465
466 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
467
baee4c9e
AS		 4682007-01-04 Andreas Schwab <schwab@suse.de>
469
470 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
471
62ac925e
JB		 4722007-01-04 Julian Brown <julian@codesourcery.com>
473
474 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
475 vqrshl instructions.
476
10a2343e 477For older changes see ChangeLog-2006
252b5132
RH		 478\f
479Local Variables:
2f6d2f85
NC		 480mode: change-log
481left-margin: 8
482fill-column: 74
252b5132
RH		 483version-control: never
484End:
GDB Binutils - Deliverables
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