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* elf32-hppa.c (hppa32_elf_local_refcounts): New function.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
d6f574e0
L		 12009-02-27 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
4
066be9f7
PB		 52009-02-26 Peter Bergner <bergner@vnet.ibm.com>
6
7 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
8 the power7 and the isel instructions.
9 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
10 (insert_dm, extract_dm): Likewise.
11 (XB6): Update comment to include XX2 form.
12 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
13 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
14 (RemoveXX3DM): Delete.
15 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
16 "mftgpr">: Deprecate for POWER7.
17 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
18 "frsqrte.">: Deprecate the three operand form and enable the two
19 operand form for POWER7 and later.
20 <"wait">: Extend to accept optional parameter. Enable for POWER7.
21 <"waitsrv", "waitimpl">: Add extended opcodes.
22 <"ldbrx", "stdbrx">: Enable for POWER7.
23 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
24 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
25 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
26 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
27 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
28 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
29 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
30 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
31 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
32 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
33 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
34 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
35 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
36 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
37 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
38 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
39 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
40 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
41 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
42 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
43 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
44 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
45 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
46 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
47 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
48 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
49 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
50 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
51 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
52 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
53 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
54 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
55 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
56 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
57 "xxspltw", "xxswapd">: Add VSX opcodes.
58
4c664d7b
L		 592009-02-23 H.J. Lu <hongjiu.lu@intel.com>
60
61 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
62 (operand_types): Remove Vex_Imm4.
63
64 * i386-opc.h (Vex_Imm4): Removed.
65 (OTMax): Updated.
66 (i386_operand_type): Remove vex_imm4.
67
68 * i386-opc.tbl: Remove Vex_Imm4 comments.
69 * i386-init.h: Regenerated.
70 * i386-tbl.h: Likewise.
71
4ce8808b
RE		 722009-02-23 Richard Earnshaw <rearnsha@arm.com>
73
74 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
75 vq{r}shr{u}n.s64 insnstructions.
76
0e55be16
PB		 772009-02-19 Peter Bergner <bergner@vnet.ibm.com>
78
79 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
80 operand to be a float point register (FRT/FRS).
81
b1c9882d
AN		 822009-02-18 Adam Nemet <anemet@caviumnetworks.com>
83
84 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
85 dmfc2 and dmtc2 before the architecture-level variants.
86
137f2437
NC		 872009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
88
89 * fr30-opc.c: Regenerate.
90 * frv-opc.c: Regenerate.
91 * ip2k-opc.c: Regenerate.
92 * iq2000-opc.c: Regenerate.
93 * lm32-opc.c: Regenerate.
94 * m32c-opc.c: Regenerate.
95 * m32r-opc.c: Regenerate.
96 * mep-opc.c: Regenerate.
97 * mt-opc.c: Regenerate.
98 * xc16x-opc.c: Regenerate.
99 * xstormy16-opc.c: Regenerate.
100 * tic54x-dis.c (print_instruction): Avoid compiler warning on
101 sprintf call.
102
87298967
NS		 1032009-02-12 Nathan Sidwell <nathan@codesourcery.com>
104
105 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
106
80890a61
PB		 1072009-02-05 Peter Bergner <bergner@vnet.ibm.com>
108
109 * ppc-opc.c: Update copyright year.
110 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
111 ordering for POWER4 and later and use the correct Server ordering.
112
ce2f5b3c
L		 1132009-02-04 H.J. Lu <hongjiu.lu@intel.com>
114
115 AVX Programming Reference (January, 2009)
116 * i386-dis.c (PREFIX_VEX_3A44): New.
117 (VEX_LEN_3A44_P_2): Likewise.
118 (PREFIX_VEX_3A48): Updated.
119 (VEX_LEN_3A4C_P_2): Likewise.
120 (prefix_table): Add PREFIX_VEX_3A44.
121 (vex_table): Likewise.
122 (vex_len_table): Add VEX_LEN_3A44_P_2.
123
124 * i386-opc.tbl: Add PCLMUL + AVX instructions.
125 * i386-tbl.h: Regenerated.
126
52b6b6b9
JM		 1272009-02-03 Sandip Matte <sandip@rmicorp.com>
128
129 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
130 (mips_arch_choices): Add XLR entry.
131 * mips-opc.c (XLR): Define.
132 (mips_builtin_opcodes): Add XLR instructions.
133
31dd3154
JM		 1342009-02-03 Carlos O'Donell <carlos@codesourcery.com>
135
136 * Makefile.am: Add install-pdf target.
137 * po/Make-in: Add install-pdf target.
138 * Makefile.in: Regenerate.
139
c1a0a41f
DD		 1402009-02-02 DJ Delorie <dj@redhat.com>
141
142 * mep-asm.c: Regenerate.
143 * mep-desc.c: Regenerate.
144 * mep-desc.h: Regenerate.
145 * mep-dis.c: Regenerate.
146 * mep-ibld.c: Regenerate.
147 * mep-opc.c: Regenerate.
148 * mep-opc.h: Regenerate.
149
087b80de
JM		 1502009-01-29 Mark Mitchell <mark@codesourcery.com>
151
152 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
153 qsub, and qdsub.
154
159073e6
NC		 1552009-01-28 Chao-ying Fu <fu@mips.com>
156
157 * mips-opc.c (suxc1): Add the flag of FP_D.
158
6f3b91a6
AM		 1592009-01-20 Alan Modra <amodra@bigpond.net.au>
160
161 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
162 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
163 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
164 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
165 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
166 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
167 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
168 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
169
29670fb9
AM		 1702009-01-16 Alan Modra <amodra@bigpond.net.au>
171
172 * configure.in (commonbfdlib): Delete.
173 (SHARED_LIBADD): Add pic libiberty if such is available.
174 * configure: Regenerate.
175 * po/POTFILES.in: Regenerate.
176
21169fcf
PB		 1772009-01-14 Peter Bergner <bergner@vnet.ibm.com>
178
179 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
180 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
181 operand form and enable the four operand form for POWER6 and later.
182 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
183 three operand form for POWER6 and later.
184
4ca47a51
MF		 1852009-01-14 Mike Frysinger <vapier@gentoo.org>
186
187 * bfin-dis.c (OUTS): Use "%s" as format string.
188
8acd5377
L		 1892009-01-13 H.J. Lu <hongjiu.lu@intel.com>
190
191 * i386-gen.c (cpu_flag_init): Remove a white space.
192 (operand_type_init): Likewise.
193
c1ec1875
L		 1942009-01-12 H.J. Lu <hongjiu.lu@intel.com>
195
196 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
197 * i386-tbl.h: Regenerated.
198
c7532693
L		 1992009-01-12 H.J. Lu <hongjiu.lu@intel.com>
200
201 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
202 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
203 subS, xorS and cmpS.
204
bd5295b2
L		 2052009-01-10 H.J. Lu <hongjiu.lu@intel.com>
206
207 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
208 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
209 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
210 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
211 and CpuSYSCALL.
212 (lineno): Removed.
213 (set_bitfield): Take an argument, lineno. Don't report lineno
214 on error if it is -1.
215 (process_i386_cpu_flag): Take an argument, lineno.
216 (process_i386_opcode_modifier): Likewise.
217 (process_i386_operand_type): Likewise.
218 (output_i386_opcode): Likewise.
219 (opcode_hash_entry): Add lineno.
220 (process_i386_opcodes): Updated.
221 (process_i386_registers): Likewise.
222 (process_i386_initializers): Likewise.
223
224 * i386-opc.h (CpuP4): Removed.
225 (CpuK6): Likewise.
226 (CpuK8): Likewise.
227 (CpuClflush): New.
228 (CpuSYSCALL): Likewise.
229 (CpuMMX): Updated.
230 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
231 cpuclflush and cpusyscall.
232
233 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
234 syscall and sysret.
235 * i386-init.h: Regenerated.
236 * i386-tbl.h: Likewise.
237
1b7f3fb0
L		 2382009-01-09 H.J. Lu <hongjiu.lu@intel.com>
239
240 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
241 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
242 (cpu_flags): Add CpuRdtscp.
243 (set_bitfield): Remove CpuSledgehammer check.
244
245 * i386-opc.h (CpuRdtscp): New.
246 (CpuLM): Updated.
247 (i386_cpu_flags): Add cpurdtscp.
248
249 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
250 * i386-init.h: Regenerated.
251 * i386-tbl.h: Likewise.
252
1cb0a767
PB		 2532009-01-09 Peter Bergner <bergner@vnet.ibm.com>
254
255 * ppc-opc.c (PPCNONE): Define.
256 (NOPOWER4): Delete.
257 (powerpc_opcodes): Initialize the new "deprecated" field.
258
168e3097
L		 2592009-01-06 H.J. Lu <hongjiu.lu@intel.com>
260
261 AVX Programming Reference (December, 2008)
262 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
263 (VEX_LEN_E7_P_2_M_0): Likewise.
264 (VEX_LEN_2C_P_1): Updated.
265 (VEX_LEN_E8_P_2): Likewise.
266 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
267 (mod_table): Likewise.
268
269 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
270 * i386-tbl.h: Regenerated.
271
22da050b
L		 2722009-01-05 H.J. Lu <hongjiu.lu@intel.com>
273
274 * i386-gen.c (process_copyright): Update for 2009.
275
276 * i386-init.h: Regenerated.
277 * i386-tbl.h: Likewise.
278
0bfee649 2792009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 280
0bfee649
L		 281 AVX Programming Reference (December, 2008)
282 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 283 (OP_EX_VexW): Likewise.
0bfee649 284 (OP_EX_VexImmW): Likewise.
c0f3af97 285 (OP_XMM_VexW): Likewise.
c0f3af97 286 (VEXI4_Fixup): Likewise.
c0f3af97 287 (VPERMIL2_Fixup): Likewise.
c0f3af97 288 (VexI4): Likewise.
0bfee649
L		 289 (VexFMA): Likewise.
290 (Vex128FMA): Likewise.
c0f3af97
L		 291 (EXVexW): Likewise.
292 (EXdVexW): Likewise.
293 (EXqVexW): Likewise.
0bfee649 294 (EXVexImmW): Likewise.
c0f3af97 295 (XMVexW): Likewise.
c0f3af97 296 (VPERMIL2): Likewise.
0bfee649
L		 297 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
298 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
299 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
300 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
301 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
302 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
303 (get_vex_imm8): Likewise.
304 (OP_EX_VexReg): Likewise.
305 vpermil2_op): Likewise.
306 (EXVexWdq): New.
307 (vex_w_dq_mode): Likewise.
308 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
309 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
310 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
311 (es_reg): Updated.
312 (PREFIX_VEX_38DB): Likewise.
313 (PREFIX_VEX_3A4A): Likewise.
314 (PREFIX_VEX_3A60): Likewise.
315 (PREFIX_VEX_3ADF): Likewise.
316 (VEX_LEN_3ADF_P_2): Likewise.
317 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
318 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
319 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
320 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
321 PREFIX_VEX_3896...PREFIX_VEX_389F,
322 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
323 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 324 (vex_table): Likewise.
0bfee649
L		 325 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
326 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
327 (putop): Support "%XW".
328 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 329
0bfee649 330 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 331
0bfee649
L		 332 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
333 instructions. Add new FMA instructions.
28dbc079
L		 334 * i386-tbl.h: Regenerated.
335
0bfee649 3362009-01-02 Matthias Klose <doko@ubuntu.com>
3fe15143 337
0bfee649
L		 338 * or32-opc.c (or32_print_register, or32_print_immediate,
339 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 340
0bfee649 341For older changes see ChangeLog-2008
252b5132
RH		 342\f
343Local Variables:
2f6d2f85
NC		 344mode: change-log
345left-margin: 8
346fill-column: 74
252b5132
RH		 347version-control: never
348End:
GDB Binutils - Deliverables
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