[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.

2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	(arcExtMap_genOpcode): Likewise.
	* arc-opc.c (arg_32bit_rc): Define new variable.
	(arg_32bit_u6): Likewise.
	(arg_32bit_limm): Likewise.

2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-gen.c (VERIFIER): Define.
	* aarch64-opc.c (VERIFIER): Define.
	(verify_ldpsw): Use static linkage.
	* aarch64-opc.h (verify_ldpsw): Remove.
	* aarch64-tbl.h: Use VERIFIER for verifiers.

2016-04-28  Nick Clifton  <nickc@redhat.com>

	PR target/19722
	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
d751b79e JM	1	2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
	2
	3	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
	4
945e0f82 CZ	5	2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
	6
	7	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	8	(arcExtMap_genOpcode): Likewise.
	9	* arc-opc.c (arg_32bit_rc): Define new variable.
	10	(arg_32bit_u6): Likewise.
	11	(arg_32bit_limm): Likewise.
	12
20f55f38 SN	13	2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
	14
	15	* aarch64-gen.c (VERIFIER): Define.
	16	* aarch64-opc.c (VERIFIER): Define.
	17	(verify_ldpsw): Use static linkage.
	18	* aarch64-opc.h (verify_ldpsw): Remove.
	19	* aarch64-tbl.h: Use VERIFIER for verifiers.
	20
4bd13cde NC	21	2016-04-28 Nick Clifton <nickc@redhat.com>
	22
	23	PR target/19722
	24	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	25	* aarch64-opc.c (verify_ldpsw): New function.
	26	* aarch64-opc.h (verify_ldpsw): New prototype.
	27	* aarch64-tbl.h: Add initialiser for verifier field.
	28	(LDPSW): Set verifier to verify_ldpsw.
	29
c0f92bf9 L	30	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	31
	32	PR binutils/19983
	33	PR binutils/19984
	34	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	35	smaller than address size.
	36
e6c7cdec TS	37	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	38
	39	* alpha-dis.c: Regenerate.
	40	* crx-dis.c: Likewise.
	41	* disassemble.c: Likewise.
	42	* epiphany-opc.c: Likewise.
	43	* fr30-opc.c: Likewise.
	44	* frv-opc.c: Likewise.
	45	* ip2k-opc.c: Likewise.
	46	* iq2000-opc.c: Likewise.
	47	* lm32-opc.c: Likewise.
	48	* lm32-opinst.c: Likewise.
	49	* m32c-opc.c: Likewise.
	50	* m32r-opc.c: Likewise.
	51	* m32r-opinst.c: Likewise.
	52	* mep-opc.c: Likewise.
	53	* mt-opc.c: Likewise.
	54	* or1k-opc.c: Likewise.
	55	* or1k-opinst.c: Likewise.
	56	* tic80-opc.c: Likewise.
	57	* xc16x-opc.c: Likewise.
	58	* xstormy16-opc.c: Likewise.
	59
537aefaf AB	60	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	61
	62	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	63	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	64	calcsd, and calcxd instructions.
	65	* arc-opc.c (insert_nps_bitop_size): Delete.
	66	(extract_nps_bitop_size): Delete.
	67	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	68	(extract_nps_qcmp_m3): Define.
	69	(extract_nps_qcmp_m2): Define.
	70	(extract_nps_qcmp_m1): Define.
	71	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	72	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	73	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	74	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	75	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	76	NPS_QCMP_M3.
	77
c8f785f2 AB	78	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	79
	80	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	81
6fd8e7c2 L	82	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	83
	84	* Makefile.in: Regenerated with automake 1.11.6.
	85	* aclocal.m4: Likewise.
	86
4b0c052e AB	87	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	88
	89	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	90	instructions.
	91	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	92	(extract_nps_cmem_uimm16): New function.
	93	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	94
cb040366 AB	95	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	96
	97	* arc-dis.c (arc_insn_length): New function.
	98	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	99	(find_format): Change insnLen parameter to unsigned.
	100
accc0180 NC	101	2016-04-13 Nick Clifton <nickc@redhat.com>
	102
	103	PR target/19937
	104	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	105	the LD.B and LD.BU instructions.
	106
f36e33da CZ	107	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	108
	109	* arc-dis.c (find_format): Check for extension flags.
	110	(print_flags): New function.
	111	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	112	.extAuxRegister.
	113	* arc-ext.c (arcExtMap_coreRegName): Use
	114	LAST_EXTENSION_CORE_REGISTER.
	115	(arcExtMap_coreReadWrite): Likewise.
	116	(dump_ARC_extmap): Update printing.
	117	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	118	(arc_aux_regs): Add cpu field.
	119	* arc-regs.h: Add cpu field, lower case name aux registers.
	120
1c2e355e CZ	121	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	122
	123	* arc-tbl.h: Add rtsc, sleep with no arguments.
	124
b99747ae CZ	125	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	126
	127	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	128	Initialize.
	129	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	130	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	131	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	132	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	133	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	134	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	135	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	136	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	137	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	138	(arc_opcode arc_opcodes): Null terminate the array.
	139	(arc_num_opcodes): Remove.
	140	* arc-ext.h (INSERT_XOP): Define.
	141	(extInstruction_t): Likewise.
	142	(arcExtMap_instName): Delete.
	143	(arcExtMap_insn): New function.
	144	(arcExtMap_genOpcode): Likewise.
	145	* arc-ext.c (ExtInstruction): Remove.
	146	(create_map): Zero initialize instruction fields.
	147	(arcExtMap_instName): Remove.
	148	(arcExtMap_insn): New function.
	149	(dump_ARC_extmap): More info while debuging.
	150	(arcExtMap_genOpcode): New function.
	151	* arc-dis.c (find_format): New function.
	152	(print_insn_arc): Use find_format.
	153	(arc_get_disassembler): Enable dump_ARC_extmap only when
	154	debugging.
	155
92708cec MR	156	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	157
	158	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	159	instruction bits out.
	160
a42a4f84 AB	161	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	162
	163	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	164	* arc-opc.c (arc_flag_operands): Add new flags.
	165	(arc_flag_classes): Add new classes.
	166
1328504b AB	167	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	168
	169	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	170
820f03ff AB	171	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	172
	173	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	174	encode1, rflt, crc16, and crc32 instructions.
	175	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	176	(arc_flag_classes): Add C_NPS_R.
	177	(insert_nps_bitop_size_2b): New function.
	178	(extract_nps_bitop_size_2b): Likewise.
	179	(insert_nps_bitop_uimm8): Likewise.
	180	(extract_nps_bitop_uimm8): Likewise.
	181	(arc_operands): Add new operand entries.
	182
8ddf6b2a CZ	183	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	184
b99747ae CZ	185	* arc-regs.h: Add a new subclass field. Add double assist
	186	accumulator register values.
	187	* arc-tbl.h: Use DPA subclass to mark the double assist
	188	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	189	* arc-opc.c (RSP): Define instead of SP.
	190	(arc_aux_regs): Add the subclass field.
8ddf6b2a	191
589a7d88 JW	192	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	193
	194	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	195
0a191de9	196	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	197
	198	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	199	NPS_R_SRC1.
	200
0a106562 AB	201	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	202
	203	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	204	issues. No functional changes.
	205
bd05ac5f CZ	206	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	207
b99747ae CZ	208	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	209	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	210	(RTT): Remove duplicate.
	211	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	212	(PCT_CONFIG*): Remove.
	213	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	214
9885948f CZ	215	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	216
b99747ae	217	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	218
f2dd8838 CZ	219	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	220
b99747ae CZ	221	* arc-tbl.h (invld07): Remove.
	222	* arc-ext-tbl.h: New file.
	223	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	224	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	225
0d2f91fe JK	226	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	227
	228	Fix -Wstack-usage warnings.
	229	* aarch64-dis.c (print_operands): Substitute size.
	230	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	231
a6b71f42 JM	232	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	233
	234	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	235	to get a proper diagnostic when an invalid ASR register is used.
	236
9780e045 NC	237	2016-03-22 Nick Clifton <nickc@redhat.com>
	238
	239	* configure: Regenerate.
	240
e23e8ebe AB	241	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	242
	243	* arc-nps400-tbl.h: New file.
	244	* arc-opc.c: Add top level comment.
	245	(insert_nps_3bit_dst): New function.
	246	(extract_nps_3bit_dst): New function.
	247	(insert_nps_3bit_src2): New function.
	248	(extract_nps_3bit_src2): New function.
	249	(insert_nps_bitop_size): New function.
	250	(extract_nps_bitop_size): New function.
	251	(arc_flag_operands): Add nps400 entries.
	252	(arc_flag_classes): Add nps400 entries.
	253	(arc_operands): Add nps400 entries.
	254	(arc_opcodes): Add nps400 include.
	255
1ae8ab47 AB	256	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	257
	258	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	259	the new class enum values.
	260
8699fc3e AB	261	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	262
	263	* arc-dis.c (print_insn_arc): Handle nps400.
	264
24740d83 AB	265	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	266
	267	* arc-opc.c (BASE): Delete.
	268
8678914f NC	269	2016-03-18 Nick Clifton <nickc@redhat.com>
	270
	271	PR target/19721
	272	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	273	of MOV insn that aliases an ORR insn.
	274
cc933301 JW	275	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	276
	277	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	278
f86f5863 TS	279	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	280
	281	* mcore-opc.h: Add const qualifiers.
	282	* microblaze-opc.h (struct op_code_struct): Likewise.
	283	* sh-opc.h: Likewise.
	284	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	285	(tic4x_print_op): Likewise.
	286
62de1c63 AM	287	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	288
d11698cd	289	* or1k-desc.h: Regenerate.
62de1c63	290	* fr30-ibld.c: Regenerate.
c697cf0b	291	* rl78-decode.c: Regenerate.
62de1c63	292
020efce5 NC	293	2016-03-01 Nick Clifton <nickc@redhat.com>
	294
	295	PR target/19747
	296	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	297
b0c11777 RL	298	2016-02-24 Renlin Li <renlin.li@arm.com>
	299
	300	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	301	(print_insn_coprocessor): Support fp16 instructions.
	302
3e309328 RL	303	2016-02-24 Renlin Li <renlin.li@arm.com>
	304
	305	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	306	vminnm, vrint(mpna).
	307
8afc7bea RL	308	2016-02-24 Renlin Li <renlin.li@arm.com>
	309
	310	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	311	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	312
4fd7268a L	313	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	314
	315	* i386-dis.c (print_insn): Parenthesize expression to prevent
	316	truncated addresses.
	317	(OP_J): Likewise.
	318
4670103e CZ	319	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	320	Janek van Oirschot <jvanoirs@synopsys.com>
	321
b99747ae CZ	322	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	323	variable.
4670103e	324
c1d9289f NC	325	2016-02-04 Nick Clifton <nickc@redhat.com>
	326
	327	PR target/19561
	328	* msp430-dis.c (print_insn_msp430): Add a special case for
	329	decoding an RRC instruction with the ZC bit set in the extension
	330	word.
	331
a143b004 AB	332	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	333
	334	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	335	* epiphany-ibld.c: Regenerate.
	336	* fr30-ibld.c: Regenerate.
	337	* frv-ibld.c: Regenerate.
	338	* ip2k-ibld.c: Regenerate.
	339	* iq2000-ibld.c: Regenerate.
	340	* lm32-ibld.c: Regenerate.
	341	* m32c-ibld.c: Regenerate.
	342	* m32r-ibld.c: Regenerate.
	343	* mep-ibld.c: Regenerate.
	344	* mt-ibld.c: Regenerate.
	345	* or1k-ibld.c: Regenerate.
	346	* xc16x-ibld.c: Regenerate.
	347	* xstormy16-ibld.c: Regenerate.
	348
b89807c6 AB	349	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	350
	351	* epiphany-dis.c: Regenerated from latest cpu files.
	352
d8c823c8 MM	353	2016-02-01 Michael McConville <mmcco@mykolab.com>
	354
	355	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	356	test bit.
	357
5bc5ae88 RL	358	2016-01-25 Renlin Li <renlin.li@arm.com>
	359
	360	* arm-dis.c (mapping_symbol_for_insn): New function.
	361	(find_ifthen_state): Call mapping_symbol_for_insn().
	362
0bff6e2d MW	363	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	364
	365	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	366	of MSR UAO immediate operand.
	367
100b4f2e MR	368	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	369
	370	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	371	instruction support.
	372
5c14705f AM	373	2016-01-17 Alan Modra <amodra@gmail.com>
	374
	375	* configure: Regenerate.
	376
4d82fe66 NC	377	2016-01-14 Nick Clifton <nickc@redhat.com>
	378
	379	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	380	instructions that can support stack pointer operations.
	381	* rl78-decode.c: Regenerate.
	382	* rl78-dis.c: Fix display of stack pointer in MOVW based
	383	instructions.
	384
651657fa MW	385	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	386
	387	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	388	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	389	erxtatus_el1 and erxaddr_el1.
	390
105bde57 MW	391	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	392
	393	* arm-dis.c (arm_opcodes): Add "esb".
	394	(thumb_opcodes): Likewise.
	395
afa8d405 PB	396	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	397
	398	* ppc-opc.c <xscmpnedp>: Delete.
	399	<xvcmpnedp>: Likewise.
	400	<xvcmpnedp.>: Likewise.
	401	<xvcmpnesp>: Likewise.
	402	<xvcmpnesp.>: Likewise.
	403
83c3256e AS	404	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	405
	406	PR gas/13050
	407	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	408	addition to ISA_A.
	409
6f2750fe AM	410	2016-01-01 Alan Modra <amodra@gmail.com>
	411
	412	Update year range in copyright notice of all files.
	413
3499769a AM	414	For older changes see ChangeLog-2015
	415	\f
	416	Copyright (C) 2016 Free Software Foundation, Inc.
	417
	418	Copying and distribution of this file, with or without modification,
	419	are permitted in any medium without royalty provided the copyright
	420	notice and this notice are preserved.
	421
	422	Local Variables:
	423	mode: change-log
	424	left-margin: 8
	425	fill-column: 74
	426	version-control: never
	427	End: