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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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791fe849
MK		 12005-04-18 Mark Kettenis <kettenis@gnu.org>
2
3 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
4 Add xcrypt-ctr.
5
ffe58f7c
NC		 62005-04-14 Nick Clifton <nickc@redhat.com>
7
8 * po/fi.po: New translation: Finnish.
9 * configure.in (ALL_LINGUAS): Add fi.
10 * configure: Regenerate.
11
9e9b66a9
AM		 122005-04-14 Alan Modra <amodra@bigpond.net.au>
13
14 * Makefile.am (NO_WERROR): Define.
15 * configure.in: Invoke AM_BINUTILS_WARNINGS.
16 * Makefile.in: Regenerate.
17 * aclocal.m4: Regenerate.
18 * configure: Regenerate.
19
9494d739
NC		 202005-04-04 Nick Clifton <nickc@redhat.com>
21
22 * fr30-asm.c: Regenerate.
23 * frv-asm.c: Regenerate.
24 * iq2000-asm.c: Regenerate.
25 * m32r-asm.c: Regenerate.
26 * openrisc-asm.c: Regenerate.
27
6128c599
JB		 282005-04-01 Jan Beulich <jbeulich@novell.com>
29
30 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
31 visible operands in Intel mode. The first operand of monitor is
32 %rax in 64-bit mode.
33
373ff435
JB		 342005-04-01 Jan Beulich <jbeulich@novell.com>
35
36 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
37 easier future additions.
38
4bd60896
JG		 392005-03-31 Jerome Guitton <guitton@gnat.com>
40
41 * configure.in: Check for basename.
42 * configure: Regenerate.
43 * config.in: Ditto.
44
4cc91dba
L		 452005-03-29 H.J. Lu <hongjiu.lu@intel.com>
46
47 * i386-dis.c (SEG_Fixup): New.
48 (Sv): New.
49 (dis386): Use "Sv" for 0x8c and 0x8e.
50
ec72cfe5
NC		 512005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
52 Nick Clifton <nickc@redhat.com>
53
54 * vax-dis.c: (entry_addr): New varible: An array of user supplied
55 function entry mask addresses.
56 (entry_addr_occupied_slots): New variable: The number of occupied
57 elements in entry_addr.
58 (entry_addr_total_slots): New variable: The total number of
59 elements in entry_addr.
60 (parse_disassembler_options): New function. Fills in the entry_addr
61 array.
62 (free_entry_array): New function. Release the memory used by the
63 entry addr array. Suppressed because there is no way to call it.
64 (is_function_entry): Check if a given address is a function's
65 start address by looking at supplied entry mask addresses and
66 symbol information, if available.
67 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
68
85064c79
L		 692005-03-23 H.J. Lu <hongjiu.lu@intel.com>
70
71 * cris-dis.c (print_with_operands): Use ~31L for long instead
72 of ~31.
73
de7141c7
L		 742005-03-20 H.J. Lu <hongjiu.lu@intel.com>
75
76 * mmix-opc.c (O): Revert the last change.
77 (Z): Likewise.
78
e493ab45
L		 792005-03-19 H.J. Lu <hongjiu.lu@intel.com>
80
81 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
82 (Z): Likewise.
83
d8d7c459
HPN		 842005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
85
86 * mmix-opc.c (O, Z): Force expression as unsigned long.
87
ebdb0383
NC		 882005-03-18 Nick Clifton <nickc@redhat.com>
89
90 * ip2k-asm.c: Regenerate.
91 * op/opcodes.pot: Regenerate.
92
1ad12f97
NC		 932005-03-16 Nick Clifton <nickc@redhat.com>
94 Ben Elliston <bje@au.ibm.com>
95
569acd2c 96 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 97 compiler command line. Enabled by default. Disable via
569acd2c 98 --disable-werror.
1ad12f97
NC		 99 * configure: Regenerate.
100
4eb30afc
AM		 1012005-03-16 Alan Modra <amodra@bigpond.net.au>
102
103 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
104 BOOKE.
105
ea8409f7
AM		 1062005-03-15 Alan Modra <amodra@bigpond.net.au>
107
729ae8d2
AM		 108 * po/es.po: Commit new Spanish translation.
109
ea8409f7
AM		 110 * po/fr.po: Commit new French translation.
111
4f495e61
NC		 1122005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
113
114 * vax-dis.c: Fix spelling error
115 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
116 of just "Entry mask: < r1 ... >"
117
0a003adc
ZW		 1182005-03-12 Zack Weinberg <zack@codesourcery.com>
119
120 * arm-dis.c (arm_opcodes): Document %E and %V.
121 Add entries for v6T2 ARM instructions:
122 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
123 (print_insn_arm): Add support for %E and %V.
885fc257 124 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 125
da99ee72
AM		 1262005-03-10 Jeff Baker <jbaker@qnx.com>
127 Alan Modra <amodra@bigpond.net.au>
128
129 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
130 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
131 (SPRG_MASK): Delete.
132 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 133 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 134 mfsprg4..7 after msprg and consolidate.
135
220abb21
AM		 1362005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
137
138 * vax-dis.c (entry_mask_bit): New array.
139 (print_insn_vax): Decode function entry mask.
140
0e06657a
AH		 1412005-03-07 Aldy Hernandez <aldyh@redhat.com>
142
143 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
144
06647dfd
AM		 1452005-03-05 Alan Modra <amodra@bigpond.net.au>
146
147 * po/opcodes.pot: Regenerate.
148
82b829a7
RR		 1492005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
150
220abb21 151 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 152 (dsmOneArcInst): Use the enum values for the decoding class.
153 Remove redundant case in the switch for decodingClass value 11.
82b829a7 154
c4a530c5
JB		 1552005-03-02 Jan Beulich <jbeulich@novell.com>
156
157 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
158 accesses.
159 (OP_C): Consider lock prefix in non-64-bit modes.
160
47d8304e
AM		 1612005-02-24 Alan Modra <amodra@bigpond.net.au>
162
163 * cris-dis.c (format_hex): Remove ineffective warning fix.
164 * crx-dis.c (make_instruction): Warning fix.
165 * frv-asm.c: Regenerate.
166
ec36c4a4
NC		 1672005-02-23 Nick Clifton <nickc@redhat.com>
168
33b71eeb
NC		 169 * cgen-dis.in: Use bfd_byte for buffers that are passed to
170 read_memory.
06647dfd 171
33b71eeb 172 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 173
ec36c4a4
NC		 174 * crx-dis.c (make_instruction): Move argument structure into inner
175 scope and ensure that all of its fields are initialised before
176 they are used.
177
33b71eeb
NC		 178 * fr30-asm.c: Regenerate.
179 * fr30-dis.c: Regenerate.
180 * frv-asm.c: Regenerate.
181 * frv-dis.c: Regenerate.
182 * ip2k-asm.c: Regenerate.
183 * ip2k-dis.c: Regenerate.
184 * iq2000-asm.c: Regenerate.
185 * iq2000-dis.c: Regenerate.
186 * m32r-asm.c: Regenerate.
187 * m32r-dis.c: Regenerate.
188 * openrisc-asm.c: Regenerate.
189 * openrisc-dis.c: Regenerate.
190 * xstormy16-asm.c: Regenerate.
191 * xstormy16-dis.c: Regenerate.
192
53c9ebc5
AM		 1932005-02-22 Alan Modra <amodra@bigpond.net.au>
194
195 * arc-ext.c: Warning fixes.
196 * arc-ext.h: Likewise.
197 * cgen-opc.c: Likewise.
198 * ia64-gen.c: Likewise.
199 * maxq-dis.c: Likewise.
200 * ns32k-dis.c: Likewise.
201 * w65-dis.c: Likewise.
202 * ia64-asmtab.c: Regenerate.
203
610ad19b
AM		 2042005-02-22 Alan Modra <amodra@bigpond.net.au>
205
206 * fr30-desc.c: Regenerate.
207 * fr30-desc.h: Regenerate.
208 * fr30-opc.c: Regenerate.
209 * fr30-opc.h: Regenerate.
210 * frv-desc.c: Regenerate.
211 * frv-desc.h: Regenerate.
212 * frv-opc.c: Regenerate.
213 * frv-opc.h: Regenerate.
214 * ip2k-desc.c: Regenerate.
215 * ip2k-desc.h: Regenerate.
216 * ip2k-opc.c: Regenerate.
217 * ip2k-opc.h: Regenerate.
218 * iq2000-desc.c: Regenerate.
219 * iq2000-desc.h: Regenerate.
220 * iq2000-opc.c: Regenerate.
221 * iq2000-opc.h: Regenerate.
222 * m32r-desc.c: Regenerate.
223 * m32r-desc.h: Regenerate.
224 * m32r-opc.c: Regenerate.
225 * m32r-opc.h: Regenerate.
226 * m32r-opinst.c: Regenerate.
227 * openrisc-desc.c: Regenerate.
228 * openrisc-desc.h: Regenerate.
229 * openrisc-opc.c: Regenerate.
230 * openrisc-opc.h: Regenerate.
231 * xstormy16-desc.c: Regenerate.
232 * xstormy16-desc.h: Regenerate.
233 * xstormy16-opc.c: Regenerate.
234 * xstormy16-opc.h: Regenerate.
235
db9db6f2
AM		 2362005-02-21 Alan Modra <amodra@bigpond.net.au>
237
238 * Makefile.am: Run "make dep-am"
239 * Makefile.in: Regenerate.
240
bf143b25
NC		 2412005-02-15 Nick Clifton <nickc@redhat.com>
242
243 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
244 compile time warnings.
245 (print_keyword): Likewise.
246 (default_print_insn): Likewise.
247
248 * fr30-desc.c: Regenerated.
249 * fr30-desc.h: Regenerated.
250 * fr30-dis.c: Regenerated.
251 * fr30-opc.c: Regenerated.
252 * fr30-opc.h: Regenerated.
253 * frv-desc.c: Regenerated.
254 * frv-dis.c: Regenerated.
255 * frv-opc.c: Regenerated.
256 * ip2k-asm.c: Regenerated.
257 * ip2k-desc.c: Regenerated.
258 * ip2k-desc.h: Regenerated.
259 * ip2k-dis.c: Regenerated.
260 * ip2k-opc.c: Regenerated.
261 * ip2k-opc.h: Regenerated.
262 * iq2000-desc.c: Regenerated.
263 * iq2000-dis.c: Regenerated.
264 * iq2000-opc.c: Regenerated.
265 * m32r-asm.c: Regenerated.
266 * m32r-desc.c: Regenerated.
267 * m32r-desc.h: Regenerated.
268 * m32r-dis.c: Regenerated.
269 * m32r-opc.c: Regenerated.
270 * m32r-opc.h: Regenerated.
271 * m32r-opinst.c: Regenerated.
272 * openrisc-desc.c: Regenerated.
273 * openrisc-desc.h: Regenerated.
274 * openrisc-dis.c: Regenerated.
275 * openrisc-opc.c: Regenerated.
276 * openrisc-opc.h: Regenerated.
277 * xstormy16-desc.c: Regenerated.
278 * xstormy16-desc.h: Regenerated.
279 * xstormy16-dis.c: Regenerated.
280 * xstormy16-opc.c: Regenerated.
281 * xstormy16-opc.h: Regenerated.
282
d6098898
L		 2832005-02-14 H.J. Lu <hongjiu.lu@intel.com>
284
285 * dis-buf.c (perror_memory): Use sprintf_vma to print out
286 address.
287
5a84f3e0
NC		 2882005-02-11 Nick Clifton <nickc@redhat.com>
289
bc18c937
NC		 290 * iq2000-asm.c: Regenerate.
291
5a84f3e0
NC		 292 * frv-dis.c: Regenerate.
293
0a40490e
JB		 2942005-02-07 Jim Blandy <jimb@redhat.com>
295
296 * Makefile.am (CGEN): Load guile.scm before calling the main
297 application script.
298 * Makefile.in: Regenerated.
299 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
300 Simply pass the cgen-opc.scm path to ${cgen} as its first
301 argument; ${cgen} itself now contains the '-s', or whatever is
302 appropriate for the Scheme being used.
303
c46f8c51
AC		 3042005-01-31 Andrew Cagney <cagney@gnu.org>
305
306 * configure: Regenerate to track ../gettext.m4.
307
60b9a617
JB		 3082005-01-31 Jan Beulich <jbeulich@novell.com>
309
310 * ia64-gen.c (NELEMS): Define.
311 (shrink): Generate alias with missing second predicate register when
312 opcode has two outputs and these are both predicates.
313 * ia64-opc-i.c (FULL17): Define.
314 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
315 here to generate output template.
316 (TBITCM, TNATCM): Undefine after use.
317 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
318 first input. Add ld16 aliases without ar.csd as second output. Add
319 st16 aliases without ar.csd as second input. Add cmpxchg aliases
320 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
321 ar.ccv as third/fourth inputs. Consolidate through...
322 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
323 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
324 * ia64-asmtab.c: Regenerate.
325
a53bf506
AC		 3262005-01-27 Andrew Cagney <cagney@gnu.org>
327
328 * configure: Regenerate to track ../gettext.m4 change.
329
90219bd0
AO		 3302005-01-25 Alexandre Oliva <aoliva@redhat.com>
331
332 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
333 * frv-asm.c: Rebuilt.
334 * frv-desc.c: Rebuilt.
335 * frv-desc.h: Rebuilt.
336 * frv-dis.c: Rebuilt.
337 * frv-ibld.c: Rebuilt.
338 * frv-opc.c: Rebuilt.
339 * frv-opc.h: Rebuilt.
340
45181ed1
AC		 3412005-01-24 Andrew Cagney <cagney@gnu.org>
342
343 * configure: Regenerate, ../gettext.m4 was updated.
344
9e836e3d
FF		 3452005-01-21 Fred Fish <fnf@specifixinc.com>
346
347 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
348 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
349 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
350 * mips-dis.c: Ditto.
351
5e8cb021
AM		 3522005-01-20 Alan Modra <amodra@bigpond.net.au>
353
354 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
355
986e18a5
FF		 3562005-01-19 Fred Fish <fnf@specifixinc.com>
357
358 * mips-dis.c (no_aliases): New disassembly option flag.
359 (set_default_mips_dis_options): Init no_aliases to zero.
360 (parse_mips_dis_option): Handle no-aliases option.
361 (print_insn_mips): Ignore table entries that are aliases
362 if no_aliases is set.
363 (print_insn_mips16): Ditto.
364 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
365 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
366 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
367 * mips16-opc.c (mips16_opcodes): Ditto.
368
e38bc3b5
NC		 3692005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
370
371 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
372 (inheritance diagram): Add missing edge.
373 (arch_sh1_up): Rename arch_sh_up to match external name to make life
374 easier for the testsuite.
375 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
376 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 377 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 378 arch_sh2a_or_sh4_up child.
379 (sh_table): Do renaming as above.
380 Correct comment for ldc.l for gas testsuite to read.
381 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
382 Correct comments for movy.w and movy.l for gas testsuite to read.
383 Correct comments for fmov.d and fmov.s for gas testsuite to read.
384
9df48ba9
L		 3852005-01-12 H.J. Lu <hongjiu.lu@intel.com>
386
387 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
388
2033b4b9
L		 3892005-01-12 H.J. Lu <hongjiu.lu@intel.com>
390
391 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
392
0bcb06d2
AS		 3932005-01-10 Andreas Schwab <schwab@suse.de>
394
395 * disassemble.c (disassemble_init_for_target) <case
396 bfd_arch_ia64>: Set skip_zeroes to 16.
397 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
398
47add74d
TL		 3992004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
400
401 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
402
246f4c05
SS		 4032004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
404
405 * avr-dis.c: Prettyprint. Added printing of symbol names in all
406 memory references. Convert avr_operand() to C90 formatting.
407
0e1200e5
TL		 4082004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
409
410 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
411
89a649f7
TL		 4122004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
413
414 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
415 (no_op_insn): Initialize array with instructions that have no
416 operands.
417 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
418
6255809c
RE		 4192004-11-29 Richard Earnshaw <rearnsha@arm.com>
420
421 * arm-dis.c: Correct top-level comment.
422
2fbad815
RE		 4232004-11-27 Richard Earnshaw <rearnsha@arm.com>
424
425 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
426 architecuture defining the insn.
427 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 428 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
429 field.
2fbad815
RE		 430 Also include opcode/arm.h.
431 * Makefile.am (arm-dis.lo): Update dependency list.
432 * Makefile.in: Regenerate.
433
d81acc42
NC		 4342004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
435
436 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
437 reflect the change to the short immediate syntax.
438
ca4f2377
AM		 4392004-11-19 Alan Modra <amodra@bigpond.net.au>
440
5da8bf1b
AM		 441 * or32-opc.c (debug): Warning fix.
442 * po/POTFILES.in: Regenerate.
443
ca4f2377
AM		 444 * maxq-dis.c: Formatting.
445 (print_insn): Warning fix.
446
b7693d02
DJ		 4472004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
448
449 * arm-dis.c (WORD_ADDRESS): Define.
450 (print_insn): Use it. Correct big-endian end-of-section handling.
451
300dac7e
NC		 4522004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
453 Vineet Sharma <vineets@noida.hcltech.com>
454
455 * maxq-dis.c: New file.
456 * disassemble.c (ARCH_maxq): Define.
610ad19b 457 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 458 instructions..
459 * configure.in: Add case for bfd_maxq_arch.
460 * configure: Regenerate.
461 * Makefile.am: Add support for maxq-dis.c
462 * Makefile.in: Regenerate.
463 * aclocal.m4: Regenerate.
464
42048ee7
TL		 4652004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
466
467 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
468 mode.
469 * crx-dis.c: Likewise.
470
bd21e58e
HPN		 4712004-11-04 Hans-Peter Nilsson <hp@axis.com>
472
473 Generally, handle CRISv32.
474 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
475 (struct cris_disasm_data): New type.
476 (format_reg, format_hex, cris_constraint, print_flags)
477 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
478 callers changed.
479 (format_sup_reg, print_insn_crisv32_with_register_prefix)
480 (print_insn_crisv32_without_register_prefix)
481 (print_insn_crisv10_v32_with_register_prefix)
482 (print_insn_crisv10_v32_without_register_prefix)
483 (cris_parse_disassembler_options): New functions.
484 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
485 parameter. All callers changed.
486 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
487 failure.
488 (cris_constraint) <case 'Y', 'U'>: New cases.
489 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
490 for constraint 'n'.
491 (print_with_operands) <case 'Y'>: New case.
492 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
493 <case 'N', 'Y', 'Q'>: New cases.
494 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
495 (print_insn_cris_with_register_prefix)
496 (print_insn_cris_without_register_prefix): Call
497 cris_parse_disassembler_options.
498 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
499 for CRISv32 and the size of immediate operands. New v32-only
500 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
501 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
502 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
503 Change brp to be v3..v10.
504 (cris_support_regs): New vector.
505 (cris_opcodes): Update head comment. New format characters '[',
506 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
507 Add new opcodes for v32 and adjust existing opcodes to accommodate
508 differences to earlier variants.
509 (cris_cond15s): New vector.
510
9306ca4a
JB		 5112004-11-04 Jan Beulich <jbeulich@novell.com>
512
513 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
514 (indirEb): Remove.
515 (Mp): Use f_mode rather than none at all.
516 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
517 replaces what previously was x_mode; x_mode now means 128-bit SSE
518 operands.
519 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
520 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
521 pinsrw's second operand is Edqw.
522 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
523 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
524 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
525 mode when an operand size override is present or always suffixing.
526 More instructions will need to be added to this group.
527 (putop): Handle new macro chars 'C' (short/long suffix selector),
528 'I' (Intel mode override for following macro char), and 'J' (for
529 adding the 'l' prefix to far branches in AT&T mode). When an
530 alternative was specified in the template, honor macro character when
531 specified for Intel mode.
532 (OP_E): Handle new *_mode values. Correct pointer specifications for
533 memory operands. Consolidate output of index register.
534 (OP_G): Handle new *_mode values.
535 (OP_I): Handle const_1_mode.
536 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
537 respective opcode prefix bits have been consumed.
538 (OP_EM, OP_EX): Provide some default handling for generating pointer
539 specifications.
540
f39c96a9
TL		 5412004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
542
543 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
544 COP_INST macro.
545
812337be
TL		 5462004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
547
548 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
549 (getregliststring): Support HI/LO and user registers.
610ad19b 550 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 551 rearrangement done in CRX opcode header file.
552 (crx_regtab): Likewise.
553 (crx_optab): Likewise.
610ad19b 554 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 555 formats.
556 support new Co-Processor instruction 'cpi'.
557
4030fa5a
NC		 5582004-10-27 Nick Clifton <nickc@redhat.com>
559
560 * opcodes/iq2000-asm.c: Regenerate.
561 * opcodes/iq2000-desc.c: Regenerate.
562 * opcodes/iq2000-desc.h: Regenerate.
563 * opcodes/iq2000-dis.c: Regenerate.
564 * opcodes/iq2000-ibld.c: Regenerate.
565 * opcodes/iq2000-opc.c: Regenerate.
566 * opcodes/iq2000-opc.h: Regenerate.
567
fc3d45e8
TL		 5682004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
569
570 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
571 us4, us5 (respectively).
572 Remove unsupported 'popa' instruction.
573 Reverse operands order in store co-processor instructions.
574
3c55da70
AM		 5752004-10-15 Alan Modra <amodra@bigpond.net.au>
576
577 * Makefile.am: Run "make dep-am"
578 * Makefile.in: Regenerate.
579
7fa3d080
BW		 5802004-10-12 Bob Wilson <bob.wilson@acm.org>
581
582 * xtensa-dis.c: Use ISO C90 formatting.
583
e612bb4d
AM		 5842004-10-09 Alan Modra <amodra@bigpond.net.au>
585
586 * ppc-opc.c: Revert 2004-09-09 change.
587
43cd72b9
BW		 5882004-10-07 Bob Wilson <bob.wilson@acm.org>
589
590 * xtensa-dis.c (state_names): Delete.
591 (fetch_data): Use xtensa_isa_maxlength.
592 (print_xtensa_operand): Replace operand parameter with opcode/operand
593 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
594 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
595 instruction bundles. Use xmalloc instead of malloc.
596
bbac1f2a
NC		 5972004-10-07 David Gibson <david@gibson.dropbear.id.au>
598
599 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
600 initializers.
601
48c9f030
NC		 6022004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
603
604 * crx-opc.c (crx_instruction): Support Co-processor insns.
605 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
606 (getregliststring): Change function to use the above enum.
607 (print_arg): Handle CO-Processor insns.
608 (crx_cinvs): Add 'b' option to invalidate the branch-target
609 cache.
610
12c64a4e
AH		 6112004-10-06 Aldy Hernandez <aldyh@redhat.com>
612
613 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
614 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
615 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
616 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
617 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
618
14127cc4
NC		 6192004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
620
621 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
622 rather than add it.
623
0dd132b6
NC		 6242004-09-30 Paul Brook <paul@codesourcery.com>
625
626 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
627 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
628
3f85e526
L		 6292004-09-17 H.J. Lu <hongjiu.lu@intel.com>
630
631 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
632 (CONFIG_STATUS_DEPENDENCIES): New.
633 (Makefile): Removed.
634 (config.status): Likewise.
635 * Makefile.in: Regenerated.
636
8ae85421
AM		 6372004-09-17 Alan Modra <amodra@bigpond.net.au>
638
639 * Makefile.am: Run "make dep-am".
640 * Makefile.in: Regenerate.
641 * aclocal.m4: Regenerate.
642 * configure: Regenerate.
643 * po/POTFILES.in: Regenerate.
644 * po/opcodes.pot: Regenerate.
645
24443139
AS		 6462004-09-11 Andreas Schwab <schwab@suse.de>
647
648 * configure: Rebuild.
649
2a309db0
AM		 6502004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
651
652 * ppc-opc.c (L): Make this field not optional.
653
42851540
NC		 6542004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
655
656 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
657 Fix parameter to 'm[t|f]csr' insns.
658
979273e3
NN		 6592004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
660
661 * configure.in: Autoupdate to autoconf 2.59.
662 * aclocal.m4: Rebuild with aclocal 1.4p6.
663 * configure: Rebuild with autoconf 2.59.
664 * Makefile.in: Rebuild with automake 1.4p6 (picking up
665 bfd changes for autoconf 2.59 on the way).
666 * config.in: Rebuild with autoheader 2.59.
667
ac28a1cb
RS		 6682004-08-27 Richard Sandiford <rsandifo@redhat.com>
669
670 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
671
30d1c836
ML		 6722004-07-30 Michal Ludvig <mludvig@suse.cz>
673
674 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
675 (GRPPADLCK2): New define.
676 (twobyte_has_modrm): True for 0xA6.
677 (grps): GRPPADLCK2 for opcode 0xA6.
678
0b0ac059
AO		 6792004-07-29 Alexandre Oliva <aoliva@redhat.com>
680
681 Introduce SH2a support.
682 * sh-opc.h (arch_sh2a_base): Renumber.
683 (arch_sh2a_nofpu_base): Remove.
684 (arch_sh_base_mask): Adjust.
685 (arch_opann_mask): New.
686 (arch_sh2a, arch_sh2a_nofpu): Adjust.
687 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
688 (sh_table): Adjust whitespace.
689 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
690 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
691 instruction list throughout.
692 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
693 of arch_sh2a in instruction list throughout.
694 (arch_sh2e_up): Accomodate above changes.
695 (arch_sh2_up): Ditto.
696 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
697 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
698 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
699 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
700 * sh-opc.h (arch_sh2a_nofpu): New.
701 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
702 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
703 instruction.
704 2004-01-20 DJ Delorie <dj@redhat.com>
705 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
706 2003-12-29 DJ Delorie <dj@redhat.com>
707 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
708 sh_opcode_info, sh_table): Add sh2a support.
709 (arch_op32): New, to tag 32-bit opcodes.
710 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
711 2003-12-02 Michael Snyder <msnyder@redhat.com>
712 * sh-opc.h (arch_sh2a): Add.
713 * sh-dis.c (arch_sh2a): Handle.
714 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
715
670ec21d
NC		 7162004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
717
718 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
719
ed049af3
NC		 7202004-07-22 Nick Clifton <nickc@redhat.com>
721
722 PR/280
723 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
724 insns - this is done by objdump itself.
725 * h8500-dis.c (print_insn_h8500): Likewise.
726
20f0a1fc
NC		 7272004-07-21 Jan Beulich <jbeulich@novell.com>
728
729 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
730 regardless of address size prefix in effect.
731 (ptr_reg): Size or address registers does not depend on rex64, but
732 on the presence of an address size override.
733 (OP_MMX): Use rex.x only for xmm registers.
734 (OP_EM): Use rex.z only for xmm registers.
735
6f14957b
MR		 7362004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
737
738 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
739 move/branch operations to the bottom so that VR5400 multimedia
740 instructions take precedence in disassembly.
741
1586d91e
MR		 7422004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
743
744 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
745 ISA-specific "break" encoding.
746
982de27a
NC		 7472004-07-13 Elvis Chiang <elvisfb@gmail.com>
748
749 * arm-opc.h: Fix typo in comment.
750
4300ab10
AS		 7512004-07-11 Andreas Schwab <schwab@suse.de>
752
753 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
754
8577e690
AS		 7552004-07-09 Andreas Schwab <schwab@suse.de>
756
757 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
758
1fe1f39c
NC		 7592004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
760
761 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
762 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
763 (crx-dis.lo): New target.
764 (crx-opc.lo): Likewise.
765 * Makefile.in: Regenerate.
766 * configure.in: Handle bfd_crx_arch.
767 * configure: Regenerate.
768 * crx-dis.c: New file.
769 * crx-opc.c: New file.
770 * disassemble.c (ARCH_crx): Define.
771 (disassembler): Handle ARCH_crx.
772
7a33b495
JW		 7732004-06-29 James E Wilson <wilson@specifixinc.com>
774
775 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
776 * ia64-asmtab.c: Regnerate.
777
98e69875
AM		 7782004-06-28 Alan Modra <amodra@bigpond.net.au>
779
780 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
781 (extract_fxm): Don't test dialect.
782 (XFXFXM_MASK): Include the power4 bit.
783 (XFXM): Add p4 param.
784 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
785
a53b85e2
AO		 7862004-06-27 Alexandre Oliva <aoliva@redhat.com>
787
788 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
789 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
790
d0618d1c
AM		 7912004-06-26 Alan Modra <amodra@bigpond.net.au>
792
793 * ppc-opc.c (BH, XLBH_MASK): Define.
794 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
795
1d9f512f
AM		 7962004-06-24 Alan Modra <amodra@bigpond.net.au>
797
798 * i386-dis.c (x_mode): Comment.
799 (two_source_ops): File scope.
800 (float_mem): Correct fisttpll and fistpll.
801 (float_mem_mode): New table.
802 (dofloat): Use it.
803 (OP_E): Correct intel mode PTR output.
804 (ptr_reg): Use open_char and close_char.
805 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
806 operands. Set two_source_ops.
807
52886d70
AM		 8082004-06-15 Alan Modra <amodra@bigpond.net.au>
809
810 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
811 instead of _raw_size.
812
bad9ceea
JJ		 8132004-06-08 Jakub Jelinek <jakub@redhat.com>
814
815 * ia64-gen.c (in_iclass): Handle more postinc st
816 and ld variants.
817 * ia64-asmtab.c: Rebuilt.
818
0451f5df
MS		 8192004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
820
821 * s390-opc.txt: Correct architecture mask for some opcodes.
822 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
823 in the esa mode as well.
824
f6f9408f
JR		 8252004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
826
827 * sh-dis.c (target_arch): Make unsigned.
828 (print_insn_sh): Replace (most of) switch with a call to
829 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
830 * sh-opc.h: Redefine architecture flags values.
831 Add sh3-nommu architecture.
832 Reorganise <arch>_up macros so they make more visual sense.
833 (SH_MERGE_ARCH_SET): Define new macro.
834 (SH_VALID_BASE_ARCH_SET): Likewise.
835 (SH_VALID_MMU_ARCH_SET): Likewise.
836 (SH_VALID_CO_ARCH_SET): Likewise.
837 (SH_VALID_ARCH_SET): Likewise.
838 (SH_MERGE_ARCH_SET_VALID): Likewise.
839 (SH_ARCH_SET_HAS_FPU): Likewise.
840 (SH_ARCH_SET_HAS_DSP): Likewise.
841 (SH_ARCH_UNKNOWN_ARCH): Likewise.
842 (sh_get_arch_from_bfd_mach): Add prototype.
843 (sh_get_arch_up_from_bfd_mach): Likewise.
844 (sh_get_bfd_mach_from_arch_set): Likewise.
845 (sh_merge_bfd_arc): Likewise.
846
be8c092b
NC		 8472004-05-24 Peter Barada <peter@the-baradas.com>
848
849 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 850 into new match_insn_m68k function. Loop over canidate
851 matches and select first that completely matches.
be8c092b
NC		 852 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
853 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 854 to verify addressing for MAC/EMAC.
be8c092b
NC		 855 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
856 reigster halves since 'fpu' and 'spl' look misleading.
857 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
858 * m68k-opc.c: Rearragne mac/emac cases to use longest for
859 first, tighten up match masks.
860 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
861 'size' from special case code in print_insn_m68k to
862 determine decode size of insns.
863
a30e9cc4
AM		 8642004-05-19 Alan Modra <amodra@bigpond.net.au>
865
866 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
867 well as when -mpower4.
868
9598fbe5
NC		 8692004-05-13 Nick Clifton <nickc@redhat.com>
870
871 * po/fr.po: Updated French translation.
872
6b6e92f4
NC		 8732004-05-05 Peter Barada <peter@the-baradas.com>
874
875 * m68k-dis.c(print_insn_m68k): Add new chips, use core
876 variants in arch_mask. Only set m68881/68851 for 68k chips.
877 * m68k-op.c: Switch from ColdFire chips to core variants.
878
a404d431
AM		 8792004-05-05 Alan Modra <amodra@bigpond.net.au>
880
a30e9cc4 881 PR 147.
a404d431
AM		 882 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
883
f3806e43
BE		 8842004-04-29 Ben Elliston <bje@au.ibm.com>
885
520ceea4
BE		 886 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
887 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 888
1f1799d5
KK		 8892004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
890
891 * sh-dis.c (print_insn_sh): Print the value in constant pool
892 as a symbol if it looks like a symbol.
893
fd99574b
NC		 8942004-04-22 Peter Barada <peter@the-baradas.com>
895
896 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
897 appropriate ColdFire architectures.
898 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
899 mask addressing.
900 Add EMAC instructions, fix MAC instructions. Remove
901 macmw/macml/msacmw/msacml instructions since mask addressing now
902 supported.
903
b4781d44
JJ		 9042004-04-20 Jakub Jelinek <jakub@redhat.com>
905
906 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
907 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
908 suffix. Use fmov*x macros, create all 3 fpsize variants in one
909 macro. Adjust all users.
910
91809fda 9112004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 912
91809fda
NC		 913 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
914 separately.
915
f4453dfa
NC		 9162004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
917
918 * m32r-asm.c: Regenerate.
919
9b0de91a
SS		 9202004-03-29 Stan Shebs <shebs@apple.com>
921
922 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
923 used.
924
e20c0b3d
AM		 9252004-03-19 Alan Modra <amodra@bigpond.net.au>
926
927 * aclocal.m4: Regenerate.
928 * config.in: Regenerate.
929 * configure: Regenerate.
930 * po/POTFILES.in: Regenerate.
931 * po/opcodes.pot: Regenerate.
932
fdd12ef3
AM		 9332004-03-16 Alan Modra <amodra@bigpond.net.au>
934
935 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
936 PPC_OPERANDS_GPR_0.
937 * ppc-opc.c (RA0): Define.
938 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
939 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 940 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 941
2dc111b3 9422004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 943
944 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 945
7bfeee7b
AM		 9462004-03-15 Alan Modra <amodra@bigpond.net.au>
947
948 * sparc-dis.c (print_insn_sparc): Update getword prototype.
949
7ffdda93
ML		 9502004-03-12 Michal Ludvig <mludvig@suse.cz>
951
952 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 953 (grps): Delete GRPPLOCK entry.
7ffdda93 954
cc0ec051
AM		 9552004-03-12 Alan Modra <amodra@bigpond.net.au>
956
957 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
958 (M, Mp): Use OP_M.
959 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
960 (GRPPADLCK): Define.
961 (dis386): Use NOP_Fixup on "nop".
962 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
963 (twobyte_has_modrm): Set for 0xa7.
964 (padlock_table): Delete. Move to..
965 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
966 and clflush.
967 (print_insn): Revert PADLOCK_SPECIAL code.
968 (OP_E): Delete sfence, lfence, mfence checks.
969
4fd61dcb
JJ		 9702004-03-12 Jakub Jelinek <jakub@redhat.com>
971
972 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
973 (INVLPG_Fixup): New function.
974 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
975
0f10071e
ML		 9762004-03-12 Michal Ludvig <mludvig@suse.cz>
977
978 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
979 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
980 (padlock_table): New struct with PadLock instructions.
981 (print_insn): Handle PADLOCK_SPECIAL.
982
c02908d2
AM		 9832004-03-12 Alan Modra <amodra@bigpond.net.au>
984
985 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
986 (OP_E): Twiddle clflush to sfence here.
987
d5bb7600
NC		 9882004-03-08 Nick Clifton <nickc@redhat.com>
989
990 * po/de.po: Updated German translation.
991
ae51a426
JR		 9922003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
993
994 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
995 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
996 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
997 accordingly.
998
676a64f4
RS		 9992004-03-01 Richard Sandiford <rsandifo@redhat.com>
1000
1001 * frv-asm.c: Regenerate.
1002 * frv-desc.c: Regenerate.
1003 * frv-desc.h: Regenerate.
1004 * frv-dis.c: Regenerate.
1005 * frv-ibld.c: Regenerate.
1006 * frv-opc.c: Regenerate.
1007 * frv-opc.h: Regenerate.
1008
c7a48b9a
RS		 10092004-03-01 Richard Sandiford <rsandifo@redhat.com>
1010
1011 * frv-desc.c, frv-opc.c: Regenerate.
1012
8ae0baa2
RS		 10132004-03-01 Richard Sandiford <rsandifo@redhat.com>
1014
1015 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1016
ce11586c
JR		 10172004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1018
1019 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1020 Also correct mistake in the comment.
1021
6a5709a5
JR		 10222004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1023
1024 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1025 ensure that double registers have even numbers.
1026 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1027 that reserved instruction 0xfffd does not decode the same
1028 as 0xfdfd (ftrv).
1029 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1030 REG_N refers to a double register.
1031 Add REG_N_B01 nibble type and use it instead of REG_NM
1032 in ftrv.
1033 Adjust the bit patterns in a few comments.
1034
e5d2b64f 10352004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1036
1037 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1038
1f04b05f
AH		 10392004-02-20 Aldy Hernandez <aldyh@redhat.com>
1040
1041 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1042
2f3b8700
AH		 10432004-02-20 Aldy Hernandez <aldyh@redhat.com>
1044
1045 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1046
f0b26da6 10472004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1048
1049 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1050 mtivor32, mtivor33, mtivor34.
f0b26da6 1051
23d59c56 10522004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1053
1054 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1055
34920d91
NC		 10562004-02-10 Petko Manolov <petkan@nucleusys.com>
1057
1058 * arm-opc.h Maverick accumulator register opcode fixes.
1059
44d86481
BE		 10602004-02-13 Ben Elliston <bje@wasabisystems.com>
1061
1062 * m32r-dis.c: Regenerate.
1063
17707c23
MS		 10642004-01-27 Michael Snyder <msnyder@redhat.com>
1065
1066 * sh-opc.h (sh_table): "fsrra", not "fssra".
1067
fe3a9bc4
NC		 10682004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1069
1070 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1071 contraints.
1072
ff24f124
JJ		 10732004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1074
1075 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1076
a02a862a
AM		 10772004-01-19 Alan Modra <amodra@bigpond.net.au>
1078
1079 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1080 1. Don't print scale factor on AT&T mode when index missing.
1081
d164ea7f
AO		 10822004-01-16 Alexandre Oliva <aoliva@redhat.com>
1083
1084 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1085 when loaded into XR registers.
1086
cb10e79a
RS		 10872004-01-14 Richard Sandiford <rsandifo@redhat.com>
1088
1089 * frv-desc.h: Regenerate.
1090 * frv-desc.c: Regenerate.
1091 * frv-opc.c: Regenerate.
1092
f532f3fa
MS		 10932004-01-13 Michael Snyder <msnyder@redhat.com>
1094
1095 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1096
e45d0630
PB		 10972004-01-09 Paul Brook <paul@codesourcery.com>
1098
1099 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1100 specific opcodes.
1101
3ba7a1aa
DJ		 11022004-01-07 Daniel Jacobowitz <drow@mvista.com>
1103
1104 * Makefile.am (libopcodes_la_DEPENDENCIES)
1105 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1106 comment about the problem.
1107 * Makefile.in: Regenerate.
1108
ba2d3f07
AO		 11092004-01-06 Alexandre Oliva <aoliva@redhat.com>
1110
1111 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1112 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1113 cut&paste errors in shifting/truncating numerical operands.
1114 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1115 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1116 (parse_uslo16): Likewise.
1117 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1118 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1119 (parse_s12): Likewise.
1120 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1121 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1122 (parse_uslo16): Likewise.
1123 (parse_uhi16): Parse gothi and gotfuncdeschi.
1124 (parse_d12): Parse got12 and gotfuncdesc12.
1125 (parse_s12): Likewise.
1126
3ab48931
NC		 11272004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1128
1129 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1130 instruction which looks similar to an 'rla' instruction.
a0bd404e 1131
c9e214e5 1132For older changes see ChangeLog-0203
252b5132
RH		 1133\f
1134Local Variables:
2f6d2f85
NC		 1135mode: change-log
1136left-margin: 8
1137fill-column: 74
252b5132
RH		 1138version-control: never
1139End:
GDB Binutils - Deliverables
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