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* m32c-desc.c: Regenerated.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
dbb33a87
NC		 12005-11-08 H.J. Lu <hongjiu.lu@intel.com>
2
3 * m32c-desc.c: Regenerated.
4
6f84a2a6
NS		 52005-11-08 Nathan Sidwell <nathan@codesourcery.com>
6
7 Add ms2.
8 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
9 ms1-opc.c, ms1-opc.h: Regenerated.
10
a541e3ce
SE		 112005-11-07 Steve Ellcey <sje@cup.hp.com>
12
13 * configure: Regenerate after modifying bfd/warning.m4.
14
3e7d61b2
AM		 152005-11-07 Alan Modra <amodra@bigpond.net.au>
16
17 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
18 ignored rex prefixes here.
19 (print_insn): Instead, handle them similarly to fwait followed
20 by non-fp insns.
21
a92e0d0a
L		 222005-11-02 H.J. Lu <hongjiu.lu@intel.com>
23
24 * iq2000-desc.c: Regenerated.
25 * iq2000-desc.h: Likewise.
26 * iq2000-dis.c: Likewise.
27 * iq2000-opc.c: Likewise.
28
36b0c57d
PB		 292005-11-02 Paul Brook <paul@codesourcery.com>
30
31 * arm-dis.c (print_insn_thumb32): Word align blx target address.
32
9a2ff3f5
AM		 332005-10-31 Alan Modra <amodra@bigpond.net.au>
34
35 * arm-dis.c (print_insn): Warning fix.
36
9e5169a8
L		 372005-10-30 H.J. Lu <hongjiu.lu@intel.com>
38
39 * Makefile.am: Run "make dep-am".
40 * Makefile.in: Regenerated.
41
42 * dep-in.sed: Replace " ./" with " ".
43
fb53f5a8
DB		 442005-10-28 Dave Brolley <brolley@redhat.com>
45
46 * All CGEN-generated sources: Regenerate.
47
48 Contribute the following changes:
49 2005-09-19 Dave Brolley <brolley@redhat.com>
50
51 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
52 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
53 bfd_arch_m32c case.
54
55 2005-02-16 Dave Brolley <brolley@redhat.com>
56
57 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
58 cgen_isa_mask_* to cgen_bitset_*.
59 * cgen-opc.c: Likewise.
60
61 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
62
63 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
64 * *-dis.c: Regenerate.
65
66 2003-06-05 DJ Delorie <dj@redhat.com>
67
68 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
69 it, as it may point to a reused buffer. Set prev_isas when we
70 change cpus.
71
72 2002-12-13 Dave Brolley <brolley@redhat.com>
73
74 * cgen-opc.c (cgen_isa_mask_create): New support function for
75 CGEN_ISA_MASK.
76 (cgen_isa_mask_init): Ditto.
77 (cgen_isa_mask_clear): Ditto.
78 (cgen_isa_mask_add): Ditto.
79 (cgen_isa_mask_set): Ditto.
80 (cgen_isa_supported): Ditto.
81 (cgen_isa_mask_compare): Ditto.
82 (cgen_isa_mask_intersection): Ditto.
83 (cgen_isa_mask_copy): Ditto.
84 (cgen_isa_mask_combine): Ditto.
85 * cgen-dis.in (libiberty.h): #include it.
86 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
87 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
88 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
89 * Makefile.in: Regenerated.
90
c6552317
DD		 912005-10-27 DJ Delorie <dj@redhat.com>
92
93 * m32c-asm.c: Regenerate.
94 * m32c-desc.c: Regenerate.
95 * m32c-desc.h: Regenerate.
96 * m32c-dis.c: Regenerate.
97 * m32c-ibld.c: Regenerate.
98 * m32c-opc.c: Regenerate.
99 * m32c-opc.h: Regenerate.
100
f75eb1c0
DD		 1012005-10-26 DJ Delorie <dj@redhat.com>
102
103 * m32c-asm.c: Regenerate.
104 * m32c-desc.c: Regenerate.
105 * m32c-desc.h: Regenerate.
106 * m32c-dis.c: Regenerate.
107 * m32c-ibld.c: Regenerate.
108 * m32c-opc.c: Regenerate.
109 * m32c-opc.h: Regenerate.
110
f1022c90
PB		 1112005-10-26 Paul Brook <paul@codesourcery.com>
112
113 * arm-dis.c (arm_opcodes): Correct "sel" entry.
114
e277c00b
AM		 1152005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
116
117 * m32r-asm.c: Regenerate.
118
92e0a941
DD		 1192005-10-25 DJ Delorie <dj@redhat.com>
120
121 * m32c-asm.c: Regenerate.
122 * m32c-desc.c: Regenerate.
123 * m32c-desc.h: Regenerate.
124 * m32c-dis.c: Regenerate.
125 * m32c-ibld.c: Regenerate.
126 * m32c-opc.c: Regenerate.
127 * m32c-opc.h: Regenerate.
128
3c9b82ba
NC		 1292005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
130
131 * configure.in: Add target architecture bfd_arch_z80.
132 * configure: Regenerated.
3e7d61b2 133 * disassemble.c (disassembler)<ARCH_z80>: Add case
3c9b82ba
NC		 134 bfd_arch_z80.
135 * z80-dis.c: New file.
136
3caac5b8
AM		 1372005-10-25 Alan Modra <amodra@bigpond.net.au>
138
139 * po/POTFILES.in: Regenerate.
140 * po/opcodes.pot: Regenerate.
141
6a2375c6
JB		 1422005-10-24 Jan Beulich <jbeulich@novell.com>
143
144 * ia64-asmtab.c: Regenerate.
145
a1a280bb
DD		 1462005-10-21 DJ Delorie <dj@redhat.com>
147
148 * m32c-asm.c: Regenerate.
149 * m32c-desc.c: Regenerate.
150 * m32c-desc.h: Regenerate.
151 * m32c-dis.c: Regenerate.
152 * m32c-ibld.c: Regenerate.
153 * m32c-opc.c: Regenerate.
154 * m32c-opc.h: Regenerate.
155
b7d48530
NC		 1562005-10-21 Nick Clifton <nickc@redhat.com>
157
158 * bfin-dis.c: Tidy up code, removing redundant constructs.
159
8dd744b6
MS		 1602005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
161
162 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
163 instructions.
164
e74eb924
NC		 1652005-10-18 Nick Clifton <nickc@redhat.com>
166
167 * m32r-asm.c: Regenerate after updating m32r.opc.
168
471e4e36
JZ		 1692005-10-18 Jie Zhang <jie.zhang@analog.com>
170
171 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
172 reading instruction from memory.
173
5e03663f
NC		 1742005-10-18 Nick Clifton <nickc@redhat.com>
175
176 * m32r-asm.c: Regenerate after updating m32r.opc.
177
ab7c9a26
NC		 1782005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
179
180 * m32r-asm.c: Regenerate after updating m32r.opc.
181
19590ef7
RE		 1822005-10-08 James Lemke <jim@wasabisystems.com>
183
184 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
185 operations.
186
6edfbbad
DJ		 1872005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
188
189 * ppc-dis.c (struct dis_private): Remove.
190 (powerpc_dialect): Avoid aliasing warnings.
191 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
192
095f2843
NC		 1932005-09-30 Nick Clifton <nickc@redhat.com>
194
195 * po/ga.po: New Irish translation.
196 * configure.in (ALL_LINGUAS): Add "ga".
197 * configure: Regenerate.
198
fdd3b9b3
L		 1992005-09-30 H.J. Lu <hongjiu.lu@intel.com>
200
201 * Makefile.am: Run "make dep-am".
202 * Makefile.in: Regenerated.
203 * aclocal.m4: Likewise.
204 * configure: Likewise.
205
4b7f6baa
CM		 2062005-09-30 Catherine Moore <clm@cm00re.com>
207
208 * Makefile.am: Bfin support.
209 * Makefile.in: Regenerated.
210 * aclocal.m4: Regenerated.
211 * bfin-dis.c: New file.
212 * configure.in: Bfin support.
213 * configure: Regenerated.
214 * disassemble.c (ARCH_bfin): Define.
215 (disassembler): Add case for bfd_arch_bfin.
216
1a114b12
JB		 2172005-09-28 Jan Beulich <jbeulich@novell.com>
218
219 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
220 (indirEv): Use it.
221 (stackEv): New.
222 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
223 (dis386): Document and use new 'V' meta character. Use it for
224 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
225 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
226 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
227 data prefix as used whenever DFLAG was examined. Handle 'V'.
228 (intel_operand_size): Use stack_v_mode.
229 (OP_E): Use stack_v_mode, but handle only the special case of
230 64-bit mode without operand size override here; fall through to
231 v_mode case otherwise.
232 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
233 and no operand size override is present.
234 (OP_J): Use get32s for obtaining the displacement also when rex64
235 is present.
236
3eb17e6b
PB		 2372005-09-08 Paul Brook <paul@codesourcery.com>
238
239 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
240
61cc0267
CF		 2412005-09-06 Chao-ying Fu <fu@mips.com>
242
243 * mips-opc.c (MT32): New define.
244 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
245 bottom to avoid opcode collision with "mftr" and "mttr".
246 Add MT instructions.
247 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
248 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
249 formats.
250
b13dd07a
PB		 2512005-09-02 Paul Brook <paul@codesourcery.com>
252
253 * arm-dis.c (coprocessor_opcodes): Add null terminator.
254
8f06b2d8
PB		 2552005-09-02 Paul Brook <paul@codesourcery.com>
256
257 * arm-dis.c (coprocessor_opcodes): New.
258 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
259 (print_insn_coprocessor): New function.
260 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
261 format characters.
262 (print_insn_thumb32): Use print_insn_coprocessor.
263
a2dfd01f
PB		 2642005-08-30 Paul Brook <paul@codesourcery.com>
265
266 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
267
3f31e633
JB		 2682005-08-26 Jan Beulich <jbeulich@novell.com>
269
270 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
271 re-use.
272 (OP_E): Call intel_operand_size, move call site out of mode
273 dependent code.
274 (OP_OFF): Call intel_operand_size if suffix_always. Remove
275 ATTRIBUTE_UNUSED from parameters.
276 (OP_OFF64): Likewise.
277 (OP_ESreg): Call intel_operand_size.
278 (OP_DSreg): Likewise.
279 (OP_DIR): Use colon rather than semicolon as separator of far
280 jump/call operands.
281
fd25c5a9
CF		 2822005-08-25 Chao-ying Fu <fu@mips.com>
283
284 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
285 (mips_builtin_opcodes): Add DSP instructions.
286 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
287 mips64, mips64r2.
288 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
289 operand formats.
290
dd8b7c22
DU		 2912005-08-23 David Ung <davidu@mips.com>
292
293 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
3e7d61b2 294 instructions to the table.
dd8b7c22 295
c17ae8a2
AM		 2962005-08-18 Alan Modra <amodra@bigpond.net.au>
297
848cf006 298 * a29k-dis.c: Delete.
c17ae8a2
AM		 299 * Makefile.am: Remove a29k support.
300 * configure.in: Likewise.
301 * disassemble.c: Likewise.
302 * Makefile.in: Regenerate.
303 * configure: Regenerate.
304 * po/POTFILES.in: Regenerate.
305
36ae0db3
DJ		 3062005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
307
308 * ppc-dis.c (powerpc_dialect): Handle e300.
309 (print_ppc_disassembler_options): Likewise.
310 * ppc-opc.c (PPCE300): Define.
311 (powerpc_opcodes): Mark icbt as available for the e300.
312
63a3357b
DA		 3132005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
314
315 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
316 Use "rp" instead of "%r2" in "b,l" insns.
317
ad101263
MS		 3182005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
319
320 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
321 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
322 (main): Likewise.
323 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
324 and 4 bit optional masks.
325 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
326 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
327 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
328 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
329 (s390_opformats): Likewise.
330 * s390-opc.txt: Add new instructions for cpu type z9-109.
331
f1fa1093
DA		 3322005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
333
334 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
335
e9f89963
PB		 3362005-07-29 Paul Brook <paul@codesourcery.com>
337
338 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
339
92e90b6e
PB		 3402005-07-29 Paul Brook <paul@codesourcery.com>
341
342 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
343 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
344
fd54057a
DD		 3452005-07-25 DJ Delorie <dj@redhat.com>
346
347 * m32c-asm.c Regenerate.
348 * m32c-dis.c Regenerate.
349
760c0f6a
DD		 3502005-07-20 DJ Delorie <dj@redhat.com>
351
352 * disassemble.c (disassemble_init_for_target): M32C ISAs are
353 enums, so convert them to bit masks, which attributes are.
354
85da3a56
NC		 3552005-07-18 Nick Clifton <nickc@redhat.com>
356
357 * configure.in: Restore alpha ordering to list of arches.
358 * configure: Regenerate.
359 * disassemble.c: Restore alpha ordering to list of arches.
360
3612005-07-18 Nick Clifton <nickc@redhat.com>
362
363 * m32c-asm.c: Regenerate.
364 * m32c-desc.c: Regenerate.
365 * m32c-desc.h: Regenerate.
366 * m32c-dis.c: Regenerate.
367 * m32c-ibld.h: Regenerate.
368 * m32c-opc.c: Regenerate.
369 * m32c-opc.h: Regenerate.
370
22cbf2e7
L		 3712005-07-18 H.J. Lu <hongjiu.lu@intel.com>
372
373 * i386-dis.c (PNI_Fixup): Update comment.
374 (VMX_Fixup): Properly handle the suffix check.
375
0aea0460
DA		 3762005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
377
378 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
379 mfctl disassembly.
380
0f82ff91
AM		 3812005-07-16 Alan Modra <amodra@bigpond.net.au>
382
383 * Makefile.am: Run "make dep-am".
384 (stamp-m32c): Fix cpu dependencies.
385 * Makefile.in: Regenerate.
386 * ip2k-dis.c: Regenerate.
387
90700ea2
L		 3882007-07-15 H.J. Lu <hongjiu.lu@intel.com>
389
390 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
391 (VMX_Fixup): New. Fix up Intel VMX Instructions.
392 (Em): New.
393 (Gm): New.
394 (VM): New.
395 (dis386_twobyte): Updated entries 0x78 and 0x79.
396 (twobyte_has_modrm): Likewise.
397 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
398 (OP_G): Handle m_mode.
399
49f58d10
JB		 4002005-07-14 Jim Blandy <jimb@redhat.com>
401
402 Add support for the Renesas M32C and M16C.
403 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
404 * m32c-desc.h, m32c-opc.h: New.
405 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
406 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
407 m32c-opc.c.
408 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
409 m32c-ibld.lo, m32c-opc.lo.
410 (CLEANFILES): List stamp-m32c.
411 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
412 (CGEN_CPUS): Add m32c.
413 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
414 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
415 (m32c_opc_h): New variable.
416 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
417 (m32c-opc.lo): New rules.
418 * Makefile.in: Regenerated.
419 * configure.in: Add case for bfd_m32c_arch.
420 * configure: Regenerated.
421 * disassemble.c (ARCH_m32c): New.
422 [ARCH_m32c]: #include "m32c-desc.h".
423 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
424 (disassemble_init_for_target) [ARCH_m32c]: Same.
425
426 * cgen-ops.h, cgen-types.h: New files.
427 * Makefile.am (HFILES): List them.
428 * Makefile.in: Regenerated.
3e7d61b2 429
0fd3a477
JW		 4302005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
431
432 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
433 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
434 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
435 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
436 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
437 v850-dis.c: Fix format bugs.
438 * ia64-gen.c (fail, warn): Add format attribute.
439 * or32-opc.c (debug): Likewise.
440
22f8fcbd
NC		 4412005-07-07 Khem Raj <kraj@mvista.com>
442
443 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
444 disassembly pattern.
445
d125c27b
AM		 4462005-07-06 Alan Modra <amodra@bigpond.net.au>
447
448 * Makefile.am (stamp-m32r): Fix path to cpu files.
449 (stamp-m32r, stamp-iq2000): Likewise.
450 * Makefile.in: Regenerate.
451 * m32r-asm.c: Regenerate.
452 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
453 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
454
3ec2b351
NC		 4552005-07-05 Nick Clifton <nickc@redhat.com>
456
457 * iq2000-asm.c: Regenerate.
458 * ms1-asm.c: Regenerate.
459
30123838
JB		 4602005-07-05 Jan Beulich <jbeulich@novell.com>
461
462 * i386-dis.c (SVME_Fixup): New.
463 (grps): Use it for the lidt entry.
464 (PNI_Fixup): Call OP_M rather than OP_E.
465 (INVLPG_Fixup): Likewise.
466
b0eec63e
L		 4672005-07-04 H.J. Lu <hongjiu.lu@intel.com>
468
469 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
470
47b0e7ad
NC		 4712005-07-01 Nick Clifton <nickc@redhat.com>
472
473 * a29k-dis.c: Update to ISO C90 style function declarations and
474 fix formatting.
475 * alpha-opc.c: Likewise.
476 * arc-dis.c: Likewise.
477 * arc-opc.c: Likewise.
478 * avr-dis.c: Likewise.
479 * cgen-asm.in: Likewise.
480 * cgen-dis.in: Likewise.
481 * cgen-ibld.in: Likewise.
482 * cgen-opc.c: Likewise.
483 * cris-dis.c: Likewise.
484 * d10v-dis.c: Likewise.
485 * d30v-dis.c: Likewise.
486 * d30v-opc.c: Likewise.
487 * dis-buf.c: Likewise.
488 * dlx-dis.c: Likewise.
489 * h8300-dis.c: Likewise.
490 * h8500-dis.c: Likewise.
491 * hppa-dis.c: Likewise.
492 * i370-dis.c: Likewise.
493 * i370-opc.c: Likewise.
494 * m10200-dis.c: Likewise.
495 * m10300-dis.c: Likewise.
496 * m68k-dis.c: Likewise.
497 * m88k-dis.c: Likewise.
498 * mips-dis.c: Likewise.
499 * mmix-dis.c: Likewise.
500 * msp430-dis.c: Likewise.
501 * ns32k-dis.c: Likewise.
502 * or32-dis.c: Likewise.
503 * or32-opc.c: Likewise.
504 * pdp11-dis.c: Likewise.
505 * pj-dis.c: Likewise.
506 * s390-dis.c: Likewise.
507 * sh-dis.c: Likewise.
508 * sh64-dis.c: Likewise.
509 * sparc-dis.c: Likewise.
510 * sparc-opc.c: Likewise.
511 * sysdep.h: Likewise.
512 * tic30-dis.c: Likewise.
513 * tic4x-dis.c: Likewise.
514 * tic80-dis.c: Likewise.
515 * v850-dis.c: Likewise.
516 * v850-opc.c: Likewise.
517 * vax-dis.c: Likewise.
518 * w65-dis.c: Likewise.
519 * z8kgen.c: Likewise.
3e7d61b2 520
47b0e7ad
NC		 521 * fr30-*: Regenerate.
522 * frv-*: Regenerate.
523 * ip2k-*: Regenerate.
524 * iq2000-*: Regenerate.
525 * m32r-*: Regenerate.
526 * ms1-*: Regenerate.
527 * openrisc-*: Regenerate.
528 * xstormy16-*: Regenerate.
529
cc16ba8c
BE		 5302005-06-23 Ben Elliston <bje@gnu.org>
531
532 * m68k-dis.c: Use ISC C90.
533 * m68k-opc.c: Formatting fixes.
534
4b185e97
DU		 5352005-06-16 David Ung <davidu@mips.com>
536
3e7d61b2
AM		 537 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
538 instructions to the table; seb/seh/sew/zeb/zeh/zew.
4b185e97 539
ac188222
DB		 5402005-06-15 Dave Brolley <brolley@redhat.com>
541
542 Contribute Morpho ms1 on behalf of Red Hat
3e7d61b2 543 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
ac188222
DB		 544 ms1-opc.h: New files, Morpho ms1 target.
545
546 2004-05-14 Stan Cox <scox@redhat.com>
547
548 * disassemble.c (ARCH_ms1): Define.
549 (disassembler): Handle bfd_arch_ms1
550
551 2004-05-13 Michael Snyder <msnyder@redhat.com>
552
553 * Makefile.am, Makefile.in: Add ms1 target.
554 * configure.in: Ditto.
555
6b5d3a4d
ZW		 5562005-06-08 Zack Weinberg <zack@codesourcery.com>
557
558 * arm-opc.h: Delete; fold contents into ...
559 * arm-dis.c: ... here. Move includes of internal COFF headers
560 next to includes of internal ELF headers.
561 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
562 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
563 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
564 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
565 (iwmmxt_wwnames, iwmmxt_wwssnames):
566 Make const.
567 (regnames): Remove iWMMXt coprocessor register sets.
568 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
569 (get_arm_regnames): Adjust fourth argument to match above changes.
570 (set_iwmmxt_regnames): Delete.
571 (print_insn_arm): Constify 'c'. Use ISO syntax for function
572 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
573 and iwmmxt_cregnames, not set_iwmmxt_regnames.
574 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
575 ISO syntax for function pointer calls.
576
4a5329c6
ZW		 5772005-06-07 Zack Weinberg <zack@codesourcery.com>
578
579 * arm-dis.c: Split up the comments describing the format codes, so
580 that the ARM and 16-bit Thumb opcode tables each have comments
581 preceding them that describe all the codes, and only the codes,
582 valid in those tables. (32-bit Thumb table is already like this.)
583 Reorder the lists in all three comments to match the order in
584 which the codes are implemented.
585 Remove all forward declarations of static functions. Convert all
586 function definitions to ISO C format.
587 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
588 Return nothing.
589 (print_insn_thumb16): Remove unused case 'I'.
590 (print_insn): Update for changed calling convention of subroutines.
591
3d456fa1
JB		 5922005-05-25 Jan Beulich <jbeulich@novell.com>
593
594 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
595 hex (but retain it being displayed as signed). Remove redundant
596 checks. Add handling of displacements for 16-bit addressing in Intel
597 mode.
598
2888cb7a
JB		 5992005-05-25 Jan Beulich <jbeulich@novell.com>
600
601 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
602 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
603 masking of 'rm' in 16-bit memory address handling.
604
1ed8e1e4
AM		 6052005-05-19 Anton Blanchard <anton@samba.org>
606
607 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
608 (print_ppc_disassembler_options): Document it.
609 * ppc-opc.c (SVC_LEV): Define.
610 (LEV): Allow optional operand.
611 (POWER5): Define.
612 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
613 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
614
49cc2e69
KC		 6152005-05-19 Kelley Cook <kcook@gcc.gnu.org>
616
617 * Makefile.in: Regenerate.
618
c19d1205
ZW		 6192005-05-17 Zack Weinberg <zack@codesourcery.com>
620
621 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
622 instructions. Adjust disassembly of some opcodes to match
623 unified syntax.
624 (thumb32_opcodes): New table.
625 (print_insn_thumb): Rename print_insn_thumb16; don't handle
626 two-halfword branches here.
627 (print_insn_thumb32): New function.
628 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
629 and print_insn_thumb32. Be consistent about order of
630 halfwords when printing 32-bit instructions.
631
003519a7
L		 6322005-05-07 H.J. Lu <hongjiu.lu@intel.com>
633
634 PR 843
635 * i386-dis.c (branch_v_mode): New.
636 (indirEv): Use branch_v_mode instead of v_mode.
637 (OP_E): Handle branch_v_mode.
638
920a34a7
L		 6392005-05-07 H.J. Lu <hongjiu.lu@intel.com>
640
641 * d10v-dis.c (dis_2_short): Support 64bit host.
642
5de773c1
NC		 6432005-05-07 Nick Clifton <nickc@redhat.com>
644
645 * po/nl.po: Updated translation.
646
f4321104
NC		 6472005-05-07 Nick Clifton <nickc@redhat.com>
648
649 * Update the address and phone number of the FSF organization in
650 the GPL notices in the following files:
651 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
652 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
653 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
654 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
655 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
656 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
657 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
658 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
659 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
660 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
661 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
662 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
663 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
664 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
665 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
666 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
667 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
668 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
669 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
670 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
671 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
672 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
673 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
674 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
675 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
676 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
677 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
678 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
679 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
680 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
681 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
682 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
683 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
684
10b076a2
JW		 6852005-05-05 James E Wilson <wilson@specifixinc.com>
686
687 * ia64-opc.c: Include sysdep.h before libiberty.h.
688
022716b6
NC		 6892005-05-05 Nick Clifton <nickc@redhat.com>
690
691 * configure.in (ALL_LINGUAS): Add vi.
692 * configure: Regenerate.
693 * po/vi.po: New.
694
db5152b4
JG		 6952005-04-26 Jerome Guitton <guitton@gnat.com>
696
697 * configure.in: Fix the check for basename declaration.
698 * configure: Regenerate.
699
eed0d89a
AM		 7002005-04-19 Alan Modra <amodra@bigpond.net.au>
701
702 * ppc-opc.c (RTO): Define.
703 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
704 entries to suit PPC440.
705
791fe849
MK		 7062005-04-18 Mark Kettenis <kettenis@gnu.org>
707
708 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
709 Add xcrypt-ctr.
710
ffe58f7c
NC		 7112005-04-14 Nick Clifton <nickc@redhat.com>
712
713 * po/fi.po: New translation: Finnish.
714 * configure.in (ALL_LINGUAS): Add fi.
715 * configure: Regenerate.
716
9e9b66a9
AM		 7172005-04-14 Alan Modra <amodra@bigpond.net.au>
718
719 * Makefile.am (NO_WERROR): Define.
720 * configure.in: Invoke AM_BINUTILS_WARNINGS.
721 * Makefile.in: Regenerate.
722 * aclocal.m4: Regenerate.
723 * configure: Regenerate.
724
9494d739
NC		 7252005-04-04 Nick Clifton <nickc@redhat.com>
726
727 * fr30-asm.c: Regenerate.
728 * frv-asm.c: Regenerate.
729 * iq2000-asm.c: Regenerate.
730 * m32r-asm.c: Regenerate.
731 * openrisc-asm.c: Regenerate.
732
6128c599
JB		 7332005-04-01 Jan Beulich <jbeulich@novell.com>
734
735 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
736 visible operands in Intel mode. The first operand of monitor is
737 %rax in 64-bit mode.
738
373ff435
JB		 7392005-04-01 Jan Beulich <jbeulich@novell.com>
740
741 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
742 easier future additions.
743
4bd60896
JG		 7442005-03-31 Jerome Guitton <guitton@gnat.com>
745
746 * configure.in: Check for basename.
747 * configure: Regenerate.
748 * config.in: Ditto.
749
4cc91dba
L		 7502005-03-29 H.J. Lu <hongjiu.lu@intel.com>
751
752 * i386-dis.c (SEG_Fixup): New.
753 (Sv): New.
754 (dis386): Use "Sv" for 0x8c and 0x8e.
755
ec72cfe5
NC		 7562005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
757 Nick Clifton <nickc@redhat.com>
c19d1205 758
ec72cfe5
NC		 759 * vax-dis.c: (entry_addr): New varible: An array of user supplied
760 function entry mask addresses.
761 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 762 elements in entry_addr.
ec72cfe5
NC		 763 (entry_addr_total_slots): New variable: The total number of
764 elements in entry_addr.
765 (parse_disassembler_options): New function. Fills in the entry_addr
766 array.
767 (free_entry_array): New function. Release the memory used by the
768 entry addr array. Suppressed because there is no way to call it.
769 (is_function_entry): Check if a given address is a function's
770 start address by looking at supplied entry mask addresses and
771 symbol information, if available.
772 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
773
85064c79
L		 7742005-03-23 H.J. Lu <hongjiu.lu@intel.com>
775
776 * cris-dis.c (print_with_operands): Use ~31L for long instead
777 of ~31.
778
de7141c7
L		 7792005-03-20 H.J. Lu <hongjiu.lu@intel.com>
780
781 * mmix-opc.c (O): Revert the last change.
782 (Z): Likewise.
783
e493ab45
L		 7842005-03-19 H.J. Lu <hongjiu.lu@intel.com>
785
786 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
787 (Z): Likewise.
788
d8d7c459
HPN		 7892005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
790
791 * mmix-opc.c (O, Z): Force expression as unsigned long.
792
ebdb0383
NC		 7932005-03-18 Nick Clifton <nickc@redhat.com>
794
795 * ip2k-asm.c: Regenerate.
796 * op/opcodes.pot: Regenerate.
797
1ad12f97
NC		 7982005-03-16 Nick Clifton <nickc@redhat.com>
799 Ben Elliston <bje@au.ibm.com>
800
569acd2c 801 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 802 compiler command line. Enabled by default. Disable via
569acd2c 803 --disable-werror.
1ad12f97
NC		 804 * configure: Regenerate.
805
4eb30afc
AM		 8062005-03-16 Alan Modra <amodra@bigpond.net.au>
807
808 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
809 BOOKE.
810
ea8409f7
AM		 8112005-03-15 Alan Modra <amodra@bigpond.net.au>
812
729ae8d2
AM		 813 * po/es.po: Commit new Spanish translation.
814
ea8409f7
AM		 815 * po/fr.po: Commit new French translation.
816
4f495e61
NC		 8172005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
818
819 * vax-dis.c: Fix spelling error
820 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
821 of just "Entry mask: < r1 ... >"
822
0a003adc
ZW		 8232005-03-12 Zack Weinberg <zack@codesourcery.com>
824
825 * arm-dis.c (arm_opcodes): Document %E and %V.
826 Add entries for v6T2 ARM instructions:
827 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
828 (print_insn_arm): Add support for %E and %V.
885fc257 829 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 830
da99ee72
AM		 8312005-03-10 Jeff Baker <jbaker@qnx.com>
832 Alan Modra <amodra@bigpond.net.au>
833
834 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
835 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
836 (SPRG_MASK): Delete.
837 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 838 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 839 mfsprg4..7 after msprg and consolidate.
840
220abb21
AM		 8412005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
842
843 * vax-dis.c (entry_mask_bit): New array.
844 (print_insn_vax): Decode function entry mask.
845
0e06657a
AH		 8462005-03-07 Aldy Hernandez <aldyh@redhat.com>
847
848 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
849
06647dfd
AM		 8502005-03-05 Alan Modra <amodra@bigpond.net.au>
851
852 * po/opcodes.pot: Regenerate.
853
82b829a7
RR		 8542005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
855
220abb21 856 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 857 (dsmOneArcInst): Use the enum values for the decoding class.
858 Remove redundant case in the switch for decodingClass value 11.
82b829a7 859
c4a530c5
JB		 8602005-03-02 Jan Beulich <jbeulich@novell.com>
861
862 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
863 accesses.
864 (OP_C): Consider lock prefix in non-64-bit modes.
865
47d8304e
AM		 8662005-02-24 Alan Modra <amodra@bigpond.net.au>
867
868 * cris-dis.c (format_hex): Remove ineffective warning fix.
869 * crx-dis.c (make_instruction): Warning fix.
870 * frv-asm.c: Regenerate.
871
ec36c4a4
NC		 8722005-02-23 Nick Clifton <nickc@redhat.com>
873
33b71eeb
NC		 874 * cgen-dis.in: Use bfd_byte for buffers that are passed to
875 read_memory.
06647dfd 876
33b71eeb 877 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 878
ec36c4a4
NC		 879 * crx-dis.c (make_instruction): Move argument structure into inner
880 scope and ensure that all of its fields are initialised before
881 they are used.
882
33b71eeb
NC		 883 * fr30-asm.c: Regenerate.
884 * fr30-dis.c: Regenerate.
885 * frv-asm.c: Regenerate.
886 * frv-dis.c: Regenerate.
887 * ip2k-asm.c: Regenerate.
888 * ip2k-dis.c: Regenerate.
889 * iq2000-asm.c: Regenerate.
890 * iq2000-dis.c: Regenerate.
891 * m32r-asm.c: Regenerate.
892 * m32r-dis.c: Regenerate.
893 * openrisc-asm.c: Regenerate.
894 * openrisc-dis.c: Regenerate.
895 * xstormy16-asm.c: Regenerate.
896 * xstormy16-dis.c: Regenerate.
897
53c9ebc5
AM		 8982005-02-22 Alan Modra <amodra@bigpond.net.au>
899
900 * arc-ext.c: Warning fixes.
901 * arc-ext.h: Likewise.
902 * cgen-opc.c: Likewise.
903 * ia64-gen.c: Likewise.
904 * maxq-dis.c: Likewise.
905 * ns32k-dis.c: Likewise.
906 * w65-dis.c: Likewise.
907 * ia64-asmtab.c: Regenerate.
908
610ad19b
AM		 9092005-02-22 Alan Modra <amodra@bigpond.net.au>
910
911 * fr30-desc.c: Regenerate.
912 * fr30-desc.h: Regenerate.
913 * fr30-opc.c: Regenerate.
914 * fr30-opc.h: Regenerate.
915 * frv-desc.c: Regenerate.
916 * frv-desc.h: Regenerate.
917 * frv-opc.c: Regenerate.
918 * frv-opc.h: Regenerate.
919 * ip2k-desc.c: Regenerate.
920 * ip2k-desc.h: Regenerate.
921 * ip2k-opc.c: Regenerate.
922 * ip2k-opc.h: Regenerate.
923 * iq2000-desc.c: Regenerate.
924 * iq2000-desc.h: Regenerate.
925 * iq2000-opc.c: Regenerate.
926 * iq2000-opc.h: Regenerate.
927 * m32r-desc.c: Regenerate.
928 * m32r-desc.h: Regenerate.
929 * m32r-opc.c: Regenerate.
930 * m32r-opc.h: Regenerate.
931 * m32r-opinst.c: Regenerate.
932 * openrisc-desc.c: Regenerate.
933 * openrisc-desc.h: Regenerate.
934 * openrisc-opc.c: Regenerate.
935 * openrisc-opc.h: Regenerate.
936 * xstormy16-desc.c: Regenerate.
937 * xstormy16-desc.h: Regenerate.
938 * xstormy16-opc.c: Regenerate.
939 * xstormy16-opc.h: Regenerate.
940
db9db6f2
AM		 9412005-02-21 Alan Modra <amodra@bigpond.net.au>
942
943 * Makefile.am: Run "make dep-am"
944 * Makefile.in: Regenerate.
945
bf143b25
NC		 9462005-02-15 Nick Clifton <nickc@redhat.com>
947
948 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
949 compile time warnings.
950 (print_keyword): Likewise.
951 (default_print_insn): Likewise.
952
953 * fr30-desc.c: Regenerated.
954 * fr30-desc.h: Regenerated.
955 * fr30-dis.c: Regenerated.
956 * fr30-opc.c: Regenerated.
957 * fr30-opc.h: Regenerated.
958 * frv-desc.c: Regenerated.
959 * frv-dis.c: Regenerated.
960 * frv-opc.c: Regenerated.
961 * ip2k-asm.c: Regenerated.
962 * ip2k-desc.c: Regenerated.
963 * ip2k-desc.h: Regenerated.
964 * ip2k-dis.c: Regenerated.
965 * ip2k-opc.c: Regenerated.
966 * ip2k-opc.h: Regenerated.
967 * iq2000-desc.c: Regenerated.
968 * iq2000-dis.c: Regenerated.
969 * iq2000-opc.c: Regenerated.
970 * m32r-asm.c: Regenerated.
971 * m32r-desc.c: Regenerated.
972 * m32r-desc.h: Regenerated.
973 * m32r-dis.c: Regenerated.
974 * m32r-opc.c: Regenerated.
975 * m32r-opc.h: Regenerated.
976 * m32r-opinst.c: Regenerated.
977 * openrisc-desc.c: Regenerated.
978 * openrisc-desc.h: Regenerated.
979 * openrisc-dis.c: Regenerated.
980 * openrisc-opc.c: Regenerated.
981 * openrisc-opc.h: Regenerated.
982 * xstormy16-desc.c: Regenerated.
983 * xstormy16-desc.h: Regenerated.
984 * xstormy16-dis.c: Regenerated.
985 * xstormy16-opc.c: Regenerated.
986 * xstormy16-opc.h: Regenerated.
987
d6098898
L		 9882005-02-14 H.J. Lu <hongjiu.lu@intel.com>
989
990 * dis-buf.c (perror_memory): Use sprintf_vma to print out
991 address.
992
5a84f3e0
NC		 9932005-02-11 Nick Clifton <nickc@redhat.com>
994
bc18c937
NC		 995 * iq2000-asm.c: Regenerate.
996
5a84f3e0
NC		 997 * frv-dis.c: Regenerate.
998
0a40490e
JB		 9992005-02-07 Jim Blandy <jimb@redhat.com>
1000
1001 * Makefile.am (CGEN): Load guile.scm before calling the main
1002 application script.
1003 * Makefile.in: Regenerated.
1004 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1005 Simply pass the cgen-opc.scm path to ${cgen} as its first
1006 argument; ${cgen} itself now contains the '-s', or whatever is
1007 appropriate for the Scheme being used.
1008
c46f8c51
AC		 10092005-01-31 Andrew Cagney <cagney@gnu.org>
1010
1011 * configure: Regenerate to track ../gettext.m4.
1012
60b9a617
JB		 10132005-01-31 Jan Beulich <jbeulich@novell.com>
1014
1015 * ia64-gen.c (NELEMS): Define.
1016 (shrink): Generate alias with missing second predicate register when
1017 opcode has two outputs and these are both predicates.
1018 * ia64-opc-i.c (FULL17): Define.
1019 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1020 here to generate output template.
1021 (TBITCM, TNATCM): Undefine after use.
1022 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1023 first input. Add ld16 aliases without ar.csd as second output. Add
1024 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1025 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1026 ar.ccv as third/fourth inputs. Consolidate through...
1027 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1028 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1029 * ia64-asmtab.c: Regenerate.
1030
a53bf506
AC		 10312005-01-27 Andrew Cagney <cagney@gnu.org>
1032
1033 * configure: Regenerate to track ../gettext.m4 change.
1034
90219bd0
AO		 10352005-01-25 Alexandre Oliva <aoliva@redhat.com>
1036
1037 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1038 * frv-asm.c: Rebuilt.
1039 * frv-desc.c: Rebuilt.
1040 * frv-desc.h: Rebuilt.
1041 * frv-dis.c: Rebuilt.
1042 * frv-ibld.c: Rebuilt.
1043 * frv-opc.c: Rebuilt.
1044 * frv-opc.h: Rebuilt.
1045
45181ed1
AC		 10462005-01-24 Andrew Cagney <cagney@gnu.org>
1047
1048 * configure: Regenerate, ../gettext.m4 was updated.
1049
9e836e3d
FF		 10502005-01-21 Fred Fish <fnf@specifixinc.com>
1051
1052 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1053 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1054 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1055 * mips-dis.c: Ditto.
1056
5e8cb021
AM		 10572005-01-20 Alan Modra <amodra@bigpond.net.au>
1058
1059 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1060
986e18a5
FF		 10612005-01-19 Fred Fish <fnf@specifixinc.com>
1062
1063 * mips-dis.c (no_aliases): New disassembly option flag.
1064 (set_default_mips_dis_options): Init no_aliases to zero.
1065 (parse_mips_dis_option): Handle no-aliases option.
1066 (print_insn_mips): Ignore table entries that are aliases
1067 if no_aliases is set.
1068 (print_insn_mips16): Ditto.
1069 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1070 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1071 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1072 * mips16-opc.c (mips16_opcodes): Ditto.
1073
e38bc3b5
NC		 10742005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1075
1076 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1077 (inheritance diagram): Add missing edge.
1078 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1079 easier for the testsuite.
1080 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1081 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 1082 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 1083 arch_sh2a_or_sh4_up child.
1084 (sh_table): Do renaming as above.
1085 Correct comment for ldc.l for gas testsuite to read.
1086 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1087 Correct comments for movy.w and movy.l for gas testsuite to read.
1088 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1089
9df48ba9
L		 10902005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1091
1092 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1093
2033b4b9
L		 10942005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1095
1096 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1097
0bcb06d2
AS		 10982005-01-10 Andreas Schwab <schwab@suse.de>
1099
1100 * disassemble.c (disassemble_init_for_target) <case
1101 bfd_arch_ia64>: Set skip_zeroes to 16.
1102 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1103
47add74d
TL		 11042004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1105
1106 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1107
246f4c05
SS		 11082004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1109
1110 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1111 memory references. Convert avr_operand() to C90 formatting.
1112
0e1200e5
TL		 11132004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1114
1115 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1116
89a649f7
TL		 11172004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1118
1119 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1120 (no_op_insn): Initialize array with instructions that have no
1121 operands.
1122 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1123
6255809c
RE		 11242004-11-29 Richard Earnshaw <rearnsha@arm.com>
1125
1126 * arm-dis.c: Correct top-level comment.
1127
2fbad815
RE		 11282004-11-27 Richard Earnshaw <rearnsha@arm.com>
1129
1130 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1131 architecuture defining the insn.
1132 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 1133 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1134 field.
2fbad815
RE		 1135 Also include opcode/arm.h.
1136 * Makefile.am (arm-dis.lo): Update dependency list.
1137 * Makefile.in: Regenerate.
1138
d81acc42
NC		 11392004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1140
1141 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1142 reflect the change to the short immediate syntax.
1143
ca4f2377
AM		 11442004-11-19 Alan Modra <amodra@bigpond.net.au>
1145
5da8bf1b
AM		 1146 * or32-opc.c (debug): Warning fix.
1147 * po/POTFILES.in: Regenerate.
1148
ca4f2377
AM		 1149 * maxq-dis.c: Formatting.
1150 (print_insn): Warning fix.
1151
b7693d02
DJ		 11522004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1153
1154 * arm-dis.c (WORD_ADDRESS): Define.
1155 (print_insn): Use it. Correct big-endian end-of-section handling.
1156
300dac7e
NC		 11572004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1158 Vineet Sharma <vineets@noida.hcltech.com>
1159
1160 * maxq-dis.c: New file.
1161 * disassemble.c (ARCH_maxq): Define.
610ad19b 1162 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 1163 instructions..
1164 * configure.in: Add case for bfd_maxq_arch.
1165 * configure: Regenerate.
1166 * Makefile.am: Add support for maxq-dis.c
1167 * Makefile.in: Regenerate.
1168 * aclocal.m4: Regenerate.
1169
42048ee7
TL		 11702004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1171
1172 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1173 mode.
1174 * crx-dis.c: Likewise.
1175
bd21e58e
HPN		 11762004-11-04 Hans-Peter Nilsson <hp@axis.com>
1177
1178 Generally, handle CRISv32.
1179 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1180 (struct cris_disasm_data): New type.
1181 (format_reg, format_hex, cris_constraint, print_flags)
1182 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1183 callers changed.
1184 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1185 (print_insn_crisv32_without_register_prefix)
1186 (print_insn_crisv10_v32_with_register_prefix)
1187 (print_insn_crisv10_v32_without_register_prefix)
1188 (cris_parse_disassembler_options): New functions.
1189 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1190 parameter. All callers changed.
1191 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1192 failure.
1193 (cris_constraint) <case 'Y', 'U'>: New cases.
1194 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1195 for constraint 'n'.
1196 (print_with_operands) <case 'Y'>: New case.
1197 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1198 <case 'N', 'Y', 'Q'>: New cases.
1199 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1200 (print_insn_cris_with_register_prefix)
1201 (print_insn_cris_without_register_prefix): Call
1202 cris_parse_disassembler_options.
1203 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1204 for CRISv32 and the size of immediate operands. New v32-only
1205 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1206 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1207 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1208 Change brp to be v3..v10.
1209 (cris_support_regs): New vector.
1210 (cris_opcodes): Update head comment. New format characters '[',
1211 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1212 Add new opcodes for v32 and adjust existing opcodes to accommodate
1213 differences to earlier variants.
1214 (cris_cond15s): New vector.
1215
9306ca4a
JB		 12162004-11-04 Jan Beulich <jbeulich@novell.com>
1217
1218 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1219 (indirEb): Remove.
1220 (Mp): Use f_mode rather than none at all.
1221 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1222 replaces what previously was x_mode; x_mode now means 128-bit SSE
1223 operands.
1224 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1225 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1226 pinsrw's second operand is Edqw.
1227 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1228 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1229 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1230 mode when an operand size override is present or always suffixing.
1231 More instructions will need to be added to this group.
1232 (putop): Handle new macro chars 'C' (short/long suffix selector),
1233 'I' (Intel mode override for following macro char), and 'J' (for
1234 adding the 'l' prefix to far branches in AT&T mode). When an
1235 alternative was specified in the template, honor macro character when
1236 specified for Intel mode.
1237 (OP_E): Handle new *_mode values. Correct pointer specifications for
1238 memory operands. Consolidate output of index register.
1239 (OP_G): Handle new *_mode values.
1240 (OP_I): Handle const_1_mode.
1241 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1242 respective opcode prefix bits have been consumed.
1243 (OP_EM, OP_EX): Provide some default handling for generating pointer
1244 specifications.
1245
f39c96a9
TL		 12462004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1247
1248 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1249 COP_INST macro.
1250
812337be
TL		 12512004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1252
1253 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1254 (getregliststring): Support HI/LO and user registers.
610ad19b 1255 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 1256 rearrangement done in CRX opcode header file.
1257 (crx_regtab): Likewise.
1258 (crx_optab): Likewise.
610ad19b 1259 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 1260 formats.
1261 support new Co-Processor instruction 'cpi'.
1262
4030fa5a
NC		 12632004-10-27 Nick Clifton <nickc@redhat.com>
1264
1265 * opcodes/iq2000-asm.c: Regenerate.
1266 * opcodes/iq2000-desc.c: Regenerate.
1267 * opcodes/iq2000-desc.h: Regenerate.
1268 * opcodes/iq2000-dis.c: Regenerate.
1269 * opcodes/iq2000-ibld.c: Regenerate.
1270 * opcodes/iq2000-opc.c: Regenerate.
1271 * opcodes/iq2000-opc.h: Regenerate.
1272
fc3d45e8
TL		 12732004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1274
1275 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1276 us4, us5 (respectively).
1277 Remove unsupported 'popa' instruction.
1278 Reverse operands order in store co-processor instructions.
1279
3c55da70
AM		 12802004-10-15 Alan Modra <amodra@bigpond.net.au>
1281
1282 * Makefile.am: Run "make dep-am"
1283 * Makefile.in: Regenerate.
1284
7fa3d080
BW		 12852004-10-12 Bob Wilson <bob.wilson@acm.org>
1286
1287 * xtensa-dis.c: Use ISO C90 formatting.
1288
e612bb4d
AM		 12892004-10-09 Alan Modra <amodra@bigpond.net.au>
1290
1291 * ppc-opc.c: Revert 2004-09-09 change.
1292
43cd72b9
BW		 12932004-10-07 Bob Wilson <bob.wilson@acm.org>
1294
1295 * xtensa-dis.c (state_names): Delete.
1296 (fetch_data): Use xtensa_isa_maxlength.
1297 (print_xtensa_operand): Replace operand parameter with opcode/operand
1298 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1299 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1300 instruction bundles. Use xmalloc instead of malloc.
1301
bbac1f2a
NC		 13022004-10-07 David Gibson <david@gibson.dropbear.id.au>
1303
1304 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1305 initializers.
1306
48c9f030
NC		 13072004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1308
1309 * crx-opc.c (crx_instruction): Support Co-processor insns.
1310 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1311 (getregliststring): Change function to use the above enum.
1312 (print_arg): Handle CO-Processor insns.
1313 (crx_cinvs): Add 'b' option to invalidate the branch-target
1314 cache.
1315
12c64a4e
AH		 13162004-10-06 Aldy Hernandez <aldyh@redhat.com>
1317
1318 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1319 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1320 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1321 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1322 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1323
14127cc4
NC		 13242004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1325
1326 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1327 rather than add it.
1328
0dd132b6
NC		 13292004-09-30 Paul Brook <paul@codesourcery.com>
1330
1331 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1332 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1333
3f85e526
L		 13342004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1335
1336 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1337 (CONFIG_STATUS_DEPENDENCIES): New.
1338 (Makefile): Removed.
1339 (config.status): Likewise.
1340 * Makefile.in: Regenerated.
1341
8ae85421
AM		 13422004-09-17 Alan Modra <amodra@bigpond.net.au>
1343
1344 * Makefile.am: Run "make dep-am".
1345 * Makefile.in: Regenerate.
1346 * aclocal.m4: Regenerate.
1347 * configure: Regenerate.
1348 * po/POTFILES.in: Regenerate.
1349 * po/opcodes.pot: Regenerate.
1350
24443139
AS		 13512004-09-11 Andreas Schwab <schwab@suse.de>
1352
1353 * configure: Rebuild.
1354
2a309db0
AM		 13552004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1356
1357 * ppc-opc.c (L): Make this field not optional.
1358
42851540
NC		 13592004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1360
1361 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1362 Fix parameter to 'm[t|f]csr' insns.
1363
979273e3
NN		 13642004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1365
1366 * configure.in: Autoupdate to autoconf 2.59.
1367 * aclocal.m4: Rebuild with aclocal 1.4p6.
1368 * configure: Rebuild with autoconf 2.59.
1369 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1370 bfd changes for autoconf 2.59 on the way).
1371 * config.in: Rebuild with autoheader 2.59.
1372
ac28a1cb
RS		 13732004-08-27 Richard Sandiford <rsandifo@redhat.com>
1374
1375 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1376
30d1c836
ML		 13772004-07-30 Michal Ludvig <mludvig@suse.cz>
1378
1379 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1380 (GRPPADLCK2): New define.
1381 (twobyte_has_modrm): True for 0xA6.
1382 (grps): GRPPADLCK2 for opcode 0xA6.
1383
0b0ac059
AO		 13842004-07-29 Alexandre Oliva <aoliva@redhat.com>
1385
1386 Introduce SH2a support.
1387 * sh-opc.h (arch_sh2a_base): Renumber.
1388 (arch_sh2a_nofpu_base): Remove.
1389 (arch_sh_base_mask): Adjust.
1390 (arch_opann_mask): New.
1391 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1392 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1393 (sh_table): Adjust whitespace.
1394 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1395 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1396 instruction list throughout.
1397 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1398 of arch_sh2a in instruction list throughout.
1399 (arch_sh2e_up): Accomodate above changes.
1400 (arch_sh2_up): Ditto.
1401 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1402 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1403 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1404 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1405 * sh-opc.h (arch_sh2a_nofpu): New.
1406 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1407 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1408 instruction.
1409 2004-01-20 DJ Delorie <dj@redhat.com>
1410 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1411 2003-12-29 DJ Delorie <dj@redhat.com>
1412 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1413 sh_opcode_info, sh_table): Add sh2a support.
1414 (arch_op32): New, to tag 32-bit opcodes.
1415 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1416 2003-12-02 Michael Snyder <msnyder@redhat.com>
1417 * sh-opc.h (arch_sh2a): Add.
1418 * sh-dis.c (arch_sh2a): Handle.
1419 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1420
670ec21d
NC		 14212004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1422
1423 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1424
ed049af3
NC		 14252004-07-22 Nick Clifton <nickc@redhat.com>
1426
1427 PR/280
1428 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1429 insns - this is done by objdump itself.
1430 * h8500-dis.c (print_insn_h8500): Likewise.
1431
20f0a1fc
NC		 14322004-07-21 Jan Beulich <jbeulich@novell.com>
1433
1434 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1435 regardless of address size prefix in effect.
1436 (ptr_reg): Size or address registers does not depend on rex64, but
1437 on the presence of an address size override.
1438 (OP_MMX): Use rex.x only for xmm registers.
1439 (OP_EM): Use rex.z only for xmm registers.
1440
6f14957b
MR		 14412004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1442
1443 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1444 move/branch operations to the bottom so that VR5400 multimedia
1445 instructions take precedence in disassembly.
1446
1586d91e
MR		 14472004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1448
1449 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1450 ISA-specific "break" encoding.
1451
982de27a
NC		 14522004-07-13 Elvis Chiang <elvisfb@gmail.com>
1453
1454 * arm-opc.h: Fix typo in comment.
1455
4300ab10
AS		 14562004-07-11 Andreas Schwab <schwab@suse.de>
1457
1458 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1459
8577e690
AS		 14602004-07-09 Andreas Schwab <schwab@suse.de>
1461
1462 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1463
1fe1f39c
NC		 14642004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1465
1466 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1467 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1468 (crx-dis.lo): New target.
1469 (crx-opc.lo): Likewise.
1470 * Makefile.in: Regenerate.
1471 * configure.in: Handle bfd_crx_arch.
1472 * configure: Regenerate.
1473 * crx-dis.c: New file.
1474 * crx-opc.c: New file.
1475 * disassemble.c (ARCH_crx): Define.
1476 (disassembler): Handle ARCH_crx.
1477
7a33b495
JW		 14782004-06-29 James E Wilson <wilson@specifixinc.com>
1479
1480 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1481 * ia64-asmtab.c: Regnerate.
1482
98e69875
AM		 14832004-06-28 Alan Modra <amodra@bigpond.net.au>
1484
1485 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1486 (extract_fxm): Don't test dialect.
1487 (XFXFXM_MASK): Include the power4 bit.
1488 (XFXM): Add p4 param.
1489 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1490
a53b85e2
AO		 14912004-06-27 Alexandre Oliva <aoliva@redhat.com>
1492
1493 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1494 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1495
d0618d1c
AM		 14962004-06-26 Alan Modra <amodra@bigpond.net.au>
1497
1498 * ppc-opc.c (BH, XLBH_MASK): Define.
1499 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1500
1d9f512f
AM		 15012004-06-24 Alan Modra <amodra@bigpond.net.au>
1502
1503 * i386-dis.c (x_mode): Comment.
1504 (two_source_ops): File scope.
1505 (float_mem): Correct fisttpll and fistpll.
1506 (float_mem_mode): New table.
1507 (dofloat): Use it.
1508 (OP_E): Correct intel mode PTR output.
1509 (ptr_reg): Use open_char and close_char.
1510 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1511 operands. Set two_source_ops.
1512
52886d70
AM		 15132004-06-15 Alan Modra <amodra@bigpond.net.au>
1514
1515 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1516 instead of _raw_size.
1517
bad9ceea
JJ		 15182004-06-08 Jakub Jelinek <jakub@redhat.com>
1519
1520 * ia64-gen.c (in_iclass): Handle more postinc st
1521 and ld variants.
1522 * ia64-asmtab.c: Rebuilt.
1523
0451f5df
MS		 15242004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1525
1526 * s390-opc.txt: Correct architecture mask for some opcodes.
1527 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1528 in the esa mode as well.
1529
f6f9408f
JR		 15302004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1531
1532 * sh-dis.c (target_arch): Make unsigned.
1533 (print_insn_sh): Replace (most of) switch with a call to
1534 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1535 * sh-opc.h: Redefine architecture flags values.
1536 Add sh3-nommu architecture.
1537 Reorganise <arch>_up macros so they make more visual sense.
1538 (SH_MERGE_ARCH_SET): Define new macro.
1539 (SH_VALID_BASE_ARCH_SET): Likewise.
1540 (SH_VALID_MMU_ARCH_SET): Likewise.
1541 (SH_VALID_CO_ARCH_SET): Likewise.
1542 (SH_VALID_ARCH_SET): Likewise.
1543 (SH_MERGE_ARCH_SET_VALID): Likewise.
1544 (SH_ARCH_SET_HAS_FPU): Likewise.
1545 (SH_ARCH_SET_HAS_DSP): Likewise.
1546 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1547 (sh_get_arch_from_bfd_mach): Add prototype.
1548 (sh_get_arch_up_from_bfd_mach): Likewise.
1549 (sh_get_bfd_mach_from_arch_set): Likewise.
1550 (sh_merge_bfd_arc): Likewise.
1551
be8c092b
NC		 15522004-05-24 Peter Barada <peter@the-baradas.com>
1553
1554 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1555 into new match_insn_m68k function. Loop over canidate
1556 matches and select first that completely matches.
be8c092b
NC		 1557 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1558 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1559 to verify addressing for MAC/EMAC.
be8c092b
NC		 1560 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1561 reigster halves since 'fpu' and 'spl' look misleading.
1562 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1563 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1564 first, tighten up match masks.
1565 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1566 'size' from special case code in print_insn_m68k to
1567 determine decode size of insns.
1568
a30e9cc4
AM		 15692004-05-19 Alan Modra <amodra@bigpond.net.au>
1570
1571 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1572 well as when -mpower4.
1573
9598fbe5
NC		 15742004-05-13 Nick Clifton <nickc@redhat.com>
1575
1576 * po/fr.po: Updated French translation.
1577
6b6e92f4
NC		 15782004-05-05 Peter Barada <peter@the-baradas.com>
1579
1580 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1581 variants in arch_mask. Only set m68881/68851 for 68k chips.
1582 * m68k-op.c: Switch from ColdFire chips to core variants.
1583
a404d431
AM		 15842004-05-05 Alan Modra <amodra@bigpond.net.au>
1585
a30e9cc4 1586 PR 147.
a404d431
AM		 1587 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1588
f3806e43
BE		 15892004-04-29 Ben Elliston <bje@au.ibm.com>
1590
520ceea4
BE		 1591 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1592 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1593
1f1799d5
KK		 15942004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1595
1596 * sh-dis.c (print_insn_sh): Print the value in constant pool
1597 as a symbol if it looks like a symbol.
1598
fd99574b
NC		 15992004-04-22 Peter Barada <peter@the-baradas.com>
1600
1601 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1602 appropriate ColdFire architectures.
1603 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1604 mask addressing.
1605 Add EMAC instructions, fix MAC instructions. Remove
1606 macmw/macml/msacmw/msacml instructions since mask addressing now
1607 supported.
1608
b4781d44
JJ		 16092004-04-20 Jakub Jelinek <jakub@redhat.com>
1610
1611 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1612 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1613 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1614 macro. Adjust all users.
1615
91809fda 16162004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1617
91809fda
NC		 1618 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1619 separately.
1620
f4453dfa
NC		 16212004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1622
1623 * m32r-asm.c: Regenerate.
1624
9b0de91a
SS		 16252004-03-29 Stan Shebs <shebs@apple.com>
1626
1627 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1628 used.
1629
e20c0b3d
AM		 16302004-03-19 Alan Modra <amodra@bigpond.net.au>
1631
1632 * aclocal.m4: Regenerate.
1633 * config.in: Regenerate.
1634 * configure: Regenerate.
1635 * po/POTFILES.in: Regenerate.
1636 * po/opcodes.pot: Regenerate.
1637
fdd12ef3
AM		 16382004-03-16 Alan Modra <amodra@bigpond.net.au>
1639
1640 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1641 PPC_OPERANDS_GPR_0.
1642 * ppc-opc.c (RA0): Define.
1643 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1644 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1645 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1646
2dc111b3 16472004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1648
1649 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1650
7bfeee7b
AM		 16512004-03-15 Alan Modra <amodra@bigpond.net.au>
1652
1653 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1654
7ffdda93
ML		 16552004-03-12 Michal Ludvig <mludvig@suse.cz>
1656
1657 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1658 (grps): Delete GRPPLOCK entry.
7ffdda93 1659
cc0ec051
AM		 16602004-03-12 Alan Modra <amodra@bigpond.net.au>
1661
1662 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1663 (M, Mp): Use OP_M.
1664 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1665 (GRPPADLCK): Define.
1666 (dis386): Use NOP_Fixup on "nop".
1667 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1668 (twobyte_has_modrm): Set for 0xa7.
1669 (padlock_table): Delete. Move to..
1670 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1671 and clflush.
1672 (print_insn): Revert PADLOCK_SPECIAL code.
1673 (OP_E): Delete sfence, lfence, mfence checks.
1674
4fd61dcb
JJ		 16752004-03-12 Jakub Jelinek <jakub@redhat.com>
1676
1677 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1678 (INVLPG_Fixup): New function.
1679 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1680
0f10071e
ML		 16812004-03-12 Michal Ludvig <mludvig@suse.cz>
1682
1683 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1684 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1685 (padlock_table): New struct with PadLock instructions.
1686 (print_insn): Handle PADLOCK_SPECIAL.
1687
c02908d2
AM		 16882004-03-12 Alan Modra <amodra@bigpond.net.au>
1689
1690 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1691 (OP_E): Twiddle clflush to sfence here.
1692
d5bb7600
NC		 16932004-03-08 Nick Clifton <nickc@redhat.com>
1694
1695 * po/de.po: Updated German translation.
1696
ae51a426
JR		 16972003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1698
1699 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1700 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1701 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1702 accordingly.
1703
676a64f4
RS		 17042004-03-01 Richard Sandiford <rsandifo@redhat.com>
1705
1706 * frv-asm.c: Regenerate.
1707 * frv-desc.c: Regenerate.
1708 * frv-desc.h: Regenerate.
1709 * frv-dis.c: Regenerate.
1710 * frv-ibld.c: Regenerate.
1711 * frv-opc.c: Regenerate.
1712 * frv-opc.h: Regenerate.
1713
c7a48b9a
RS		 17142004-03-01 Richard Sandiford <rsandifo@redhat.com>
1715
1716 * frv-desc.c, frv-opc.c: Regenerate.
1717
8ae0baa2
RS		 17182004-03-01 Richard Sandiford <rsandifo@redhat.com>
1719
1720 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1721
ce11586c
JR		 17222004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1723
1724 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1725 Also correct mistake in the comment.
1726
6a5709a5
JR		 17272004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1728
1729 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1730 ensure that double registers have even numbers.
1731 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1732 that reserved instruction 0xfffd does not decode the same
1733 as 0xfdfd (ftrv).
1734 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1735 REG_N refers to a double register.
1736 Add REG_N_B01 nibble type and use it instead of REG_NM
1737 in ftrv.
1738 Adjust the bit patterns in a few comments.
1739
e5d2b64f 17402004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1741
1742 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1743
1f04b05f
AH		 17442004-02-20 Aldy Hernandez <aldyh@redhat.com>
1745
1746 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1747
2f3b8700
AH		 17482004-02-20 Aldy Hernandez <aldyh@redhat.com>
1749
1750 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1751
f0b26da6 17522004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1753
1754 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1755 mtivor32, mtivor33, mtivor34.
f0b26da6 1756
23d59c56 17572004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1758
1759 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1760
34920d91
NC		 17612004-02-10 Petko Manolov <petkan@nucleusys.com>
1762
1763 * arm-opc.h Maverick accumulator register opcode fixes.
1764
44d86481
BE		 17652004-02-13 Ben Elliston <bje@wasabisystems.com>
1766
1767 * m32r-dis.c: Regenerate.
1768
17707c23
MS		 17692004-01-27 Michael Snyder <msnyder@redhat.com>
1770
1771 * sh-opc.h (sh_table): "fsrra", not "fssra".
1772
fe3a9bc4
NC		 17732004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1774
1775 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1776 contraints.
1777
ff24f124
JJ		 17782004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1779
1780 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1781
a02a862a
AM		 17822004-01-19 Alan Modra <amodra@bigpond.net.au>
1783
1784 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1785 1. Don't print scale factor on AT&T mode when index missing.
1786
d164ea7f
AO		 17872004-01-16 Alexandre Oliva <aoliva@redhat.com>
1788
1789 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1790 when loaded into XR registers.
1791
cb10e79a
RS		 17922004-01-14 Richard Sandiford <rsandifo@redhat.com>
1793
1794 * frv-desc.h: Regenerate.
1795 * frv-desc.c: Regenerate.
1796 * frv-opc.c: Regenerate.
1797
f532f3fa
MS		 17982004-01-13 Michael Snyder <msnyder@redhat.com>
1799
1800 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1801
e45d0630
PB		 18022004-01-09 Paul Brook <paul@codesourcery.com>
1803
1804 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1805 specific opcodes.
1806
3ba7a1aa
DJ		 18072004-01-07 Daniel Jacobowitz <drow@mvista.com>
1808
1809 * Makefile.am (libopcodes_la_DEPENDENCIES)
1810 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1811 comment about the problem.
1812 * Makefile.in: Regenerate.
1813
ba2d3f07
AO		 18142004-01-06 Alexandre Oliva <aoliva@redhat.com>
1815
1816 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1817 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1818 cut&paste errors in shifting/truncating numerical operands.
1819 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1820 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1821 (parse_uslo16): Likewise.
1822 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1823 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1824 (parse_s12): Likewise.
1825 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1826 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1827 (parse_uslo16): Likewise.
1828 (parse_uhi16): Parse gothi and gotfuncdeschi.
1829 (parse_d12): Parse got12 and gotfuncdesc12.
1830 (parse_s12): Likewise.
1831
3ab48931
NC		 18322004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1833
1834 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1835 instruction which looks similar to an 'rla' instruction.
a0bd404e 1836
c9e214e5 1837For older changes see ChangeLog-0203
252b5132
RH		 1838\f
1839Local Variables:
2f6d2f85
NC		 1840mode: change-log
1841left-margin: 8
1842fill-column: 74
252b5132
RH		 1843version-control: never
1844End:
GDB Binutils - Deliverables
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