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* emultempl/elf32.em (gld${EMULATION_NAME}_layout_sections_again):
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
85064c79
L		 12005-03-23 H.J. Lu <hongjiu.lu@intel.com>
2
3 * cris-dis.c (print_with_operands): Use ~31L for long instead
4 of ~31.
5
de7141c7
L		 62005-03-20 H.J. Lu <hongjiu.lu@intel.com>
7
8 * mmix-opc.c (O): Revert the last change.
9 (Z): Likewise.
10
e493ab45
L		 112005-03-19 H.J. Lu <hongjiu.lu@intel.com>
12
13 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
14 (Z): Likewise.
15
d8d7c459
HPN		 162005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
17
18 * mmix-opc.c (O, Z): Force expression as unsigned long.
19
ebdb0383
NC		 202005-03-18 Nick Clifton <nickc@redhat.com>
21
22 * ip2k-asm.c: Regenerate.
23 * op/opcodes.pot: Regenerate.
24
1ad12f97
NC		 252005-03-16 Nick Clifton <nickc@redhat.com>
26 Ben Elliston <bje@au.ibm.com>
27
569acd2c 28 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 29 compiler command line. Enabled by default. Disable via
569acd2c 30 --disable-werror.
1ad12f97
NC		 31 * configure: Regenerate.
32
4eb30afc
AM		 332005-03-16 Alan Modra <amodra@bigpond.net.au>
34
35 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
36 BOOKE.
37
ea8409f7
AM		 382005-03-15 Alan Modra <amodra@bigpond.net.au>
39
729ae8d2
AM		 40 * po/es.po: Commit new Spanish translation.
41
ea8409f7
AM		 42 * po/fr.po: Commit new French translation.
43
4f495e61
NC		 442005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
45
46 * vax-dis.c: Fix spelling error
47 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
48 of just "Entry mask: < r1 ... >"
49
0a003adc
ZW		 502005-03-12 Zack Weinberg <zack@codesourcery.com>
51
52 * arm-dis.c (arm_opcodes): Document %E and %V.
53 Add entries for v6T2 ARM instructions:
54 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
55 (print_insn_arm): Add support for %E and %V.
885fc257 56 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 57
da99ee72
AM		 582005-03-10 Jeff Baker <jbaker@qnx.com>
59 Alan Modra <amodra@bigpond.net.au>
60
61 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
62 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
63 (SPRG_MASK): Delete.
64 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 65 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 66 mfsprg4..7 after msprg and consolidate.
67
220abb21
AM		 682005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
69
70 * vax-dis.c (entry_mask_bit): New array.
71 (print_insn_vax): Decode function entry mask.
72
0e06657a
AH		 732005-03-07 Aldy Hernandez <aldyh@redhat.com>
74
75 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
76
06647dfd
AM		 772005-03-05 Alan Modra <amodra@bigpond.net.au>
78
79 * po/opcodes.pot: Regenerate.
80
82b829a7
RR		 812005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
82
220abb21 83 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 84 (dsmOneArcInst): Use the enum values for the decoding class.
85 Remove redundant case in the switch for decodingClass value 11.
82b829a7 86
c4a530c5
JB		 872005-03-02 Jan Beulich <jbeulich@novell.com>
88
89 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
90 accesses.
91 (OP_C): Consider lock prefix in non-64-bit modes.
92
47d8304e
AM		 932005-02-24 Alan Modra <amodra@bigpond.net.au>
94
95 * cris-dis.c (format_hex): Remove ineffective warning fix.
96 * crx-dis.c (make_instruction): Warning fix.
97 * frv-asm.c: Regenerate.
98
ec36c4a4
NC		 992005-02-23 Nick Clifton <nickc@redhat.com>
100
33b71eeb
NC		 101 * cgen-dis.in: Use bfd_byte for buffers that are passed to
102 read_memory.
06647dfd 103
33b71eeb 104 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 105
ec36c4a4
NC		 106 * crx-dis.c (make_instruction): Move argument structure into inner
107 scope and ensure that all of its fields are initialised before
108 they are used.
109
33b71eeb
NC		 110 * fr30-asm.c: Regenerate.
111 * fr30-dis.c: Regenerate.
112 * frv-asm.c: Regenerate.
113 * frv-dis.c: Regenerate.
114 * ip2k-asm.c: Regenerate.
115 * ip2k-dis.c: Regenerate.
116 * iq2000-asm.c: Regenerate.
117 * iq2000-dis.c: Regenerate.
118 * m32r-asm.c: Regenerate.
119 * m32r-dis.c: Regenerate.
120 * openrisc-asm.c: Regenerate.
121 * openrisc-dis.c: Regenerate.
122 * xstormy16-asm.c: Regenerate.
123 * xstormy16-dis.c: Regenerate.
124
53c9ebc5
AM		 1252005-02-22 Alan Modra <amodra@bigpond.net.au>
126
127 * arc-ext.c: Warning fixes.
128 * arc-ext.h: Likewise.
129 * cgen-opc.c: Likewise.
130 * ia64-gen.c: Likewise.
131 * maxq-dis.c: Likewise.
132 * ns32k-dis.c: Likewise.
133 * w65-dis.c: Likewise.
134 * ia64-asmtab.c: Regenerate.
135
610ad19b
AM		 1362005-02-22 Alan Modra <amodra@bigpond.net.au>
137
138 * fr30-desc.c: Regenerate.
139 * fr30-desc.h: Regenerate.
140 * fr30-opc.c: Regenerate.
141 * fr30-opc.h: Regenerate.
142 * frv-desc.c: Regenerate.
143 * frv-desc.h: Regenerate.
144 * frv-opc.c: Regenerate.
145 * frv-opc.h: Regenerate.
146 * ip2k-desc.c: Regenerate.
147 * ip2k-desc.h: Regenerate.
148 * ip2k-opc.c: Regenerate.
149 * ip2k-opc.h: Regenerate.
150 * iq2000-desc.c: Regenerate.
151 * iq2000-desc.h: Regenerate.
152 * iq2000-opc.c: Regenerate.
153 * iq2000-opc.h: Regenerate.
154 * m32r-desc.c: Regenerate.
155 * m32r-desc.h: Regenerate.
156 * m32r-opc.c: Regenerate.
157 * m32r-opc.h: Regenerate.
158 * m32r-opinst.c: Regenerate.
159 * openrisc-desc.c: Regenerate.
160 * openrisc-desc.h: Regenerate.
161 * openrisc-opc.c: Regenerate.
162 * openrisc-opc.h: Regenerate.
163 * xstormy16-desc.c: Regenerate.
164 * xstormy16-desc.h: Regenerate.
165 * xstormy16-opc.c: Regenerate.
166 * xstormy16-opc.h: Regenerate.
167
db9db6f2
AM		 1682005-02-21 Alan Modra <amodra@bigpond.net.au>
169
170 * Makefile.am: Run "make dep-am"
171 * Makefile.in: Regenerate.
172
bf143b25
NC		 1732005-02-15 Nick Clifton <nickc@redhat.com>
174
175 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
176 compile time warnings.
177 (print_keyword): Likewise.
178 (default_print_insn): Likewise.
179
180 * fr30-desc.c: Regenerated.
181 * fr30-desc.h: Regenerated.
182 * fr30-dis.c: Regenerated.
183 * fr30-opc.c: Regenerated.
184 * fr30-opc.h: Regenerated.
185 * frv-desc.c: Regenerated.
186 * frv-dis.c: Regenerated.
187 * frv-opc.c: Regenerated.
188 * ip2k-asm.c: Regenerated.
189 * ip2k-desc.c: Regenerated.
190 * ip2k-desc.h: Regenerated.
191 * ip2k-dis.c: Regenerated.
192 * ip2k-opc.c: Regenerated.
193 * ip2k-opc.h: Regenerated.
194 * iq2000-desc.c: Regenerated.
195 * iq2000-dis.c: Regenerated.
196 * iq2000-opc.c: Regenerated.
197 * m32r-asm.c: Regenerated.
198 * m32r-desc.c: Regenerated.
199 * m32r-desc.h: Regenerated.
200 * m32r-dis.c: Regenerated.
201 * m32r-opc.c: Regenerated.
202 * m32r-opc.h: Regenerated.
203 * m32r-opinst.c: Regenerated.
204 * openrisc-desc.c: Regenerated.
205 * openrisc-desc.h: Regenerated.
206 * openrisc-dis.c: Regenerated.
207 * openrisc-opc.c: Regenerated.
208 * openrisc-opc.h: Regenerated.
209 * xstormy16-desc.c: Regenerated.
210 * xstormy16-desc.h: Regenerated.
211 * xstormy16-dis.c: Regenerated.
212 * xstormy16-opc.c: Regenerated.
213 * xstormy16-opc.h: Regenerated.
214
d6098898
L		 2152005-02-14 H.J. Lu <hongjiu.lu@intel.com>
216
217 * dis-buf.c (perror_memory): Use sprintf_vma to print out
218 address.
219
5a84f3e0
NC		 2202005-02-11 Nick Clifton <nickc@redhat.com>
221
bc18c937
NC		 222 * iq2000-asm.c: Regenerate.
223
5a84f3e0
NC		 224 * frv-dis.c: Regenerate.
225
0a40490e
JB		 2262005-02-07 Jim Blandy <jimb@redhat.com>
227
228 * Makefile.am (CGEN): Load guile.scm before calling the main
229 application script.
230 * Makefile.in: Regenerated.
231 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
232 Simply pass the cgen-opc.scm path to ${cgen} as its first
233 argument; ${cgen} itself now contains the '-s', or whatever is
234 appropriate for the Scheme being used.
235
c46f8c51
AC		 2362005-01-31 Andrew Cagney <cagney@gnu.org>
237
238 * configure: Regenerate to track ../gettext.m4.
239
60b9a617
JB		 2402005-01-31 Jan Beulich <jbeulich@novell.com>
241
242 * ia64-gen.c (NELEMS): Define.
243 (shrink): Generate alias with missing second predicate register when
244 opcode has two outputs and these are both predicates.
245 * ia64-opc-i.c (FULL17): Define.
246 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
247 here to generate output template.
248 (TBITCM, TNATCM): Undefine after use.
249 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
250 first input. Add ld16 aliases without ar.csd as second output. Add
251 st16 aliases without ar.csd as second input. Add cmpxchg aliases
252 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
253 ar.ccv as third/fourth inputs. Consolidate through...
254 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
255 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
256 * ia64-asmtab.c: Regenerate.
257
a53bf506
AC		 2582005-01-27 Andrew Cagney <cagney@gnu.org>
259
260 * configure: Regenerate to track ../gettext.m4 change.
261
90219bd0
AO		 2622005-01-25 Alexandre Oliva <aoliva@redhat.com>
263
264 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
265 * frv-asm.c: Rebuilt.
266 * frv-desc.c: Rebuilt.
267 * frv-desc.h: Rebuilt.
268 * frv-dis.c: Rebuilt.
269 * frv-ibld.c: Rebuilt.
270 * frv-opc.c: Rebuilt.
271 * frv-opc.h: Rebuilt.
272
45181ed1
AC		 2732005-01-24 Andrew Cagney <cagney@gnu.org>
274
275 * configure: Regenerate, ../gettext.m4 was updated.
276
9e836e3d
FF		 2772005-01-21 Fred Fish <fnf@specifixinc.com>
278
279 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
280 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
281 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
282 * mips-dis.c: Ditto.
283
5e8cb021
AM		 2842005-01-20 Alan Modra <amodra@bigpond.net.au>
285
286 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
287
986e18a5
FF		 2882005-01-19 Fred Fish <fnf@specifixinc.com>
289
290 * mips-dis.c (no_aliases): New disassembly option flag.
291 (set_default_mips_dis_options): Init no_aliases to zero.
292 (parse_mips_dis_option): Handle no-aliases option.
293 (print_insn_mips): Ignore table entries that are aliases
294 if no_aliases is set.
295 (print_insn_mips16): Ditto.
296 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
297 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
298 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
299 * mips16-opc.c (mips16_opcodes): Ditto.
300
e38bc3b5
NC		 3012005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
302
303 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
304 (inheritance diagram): Add missing edge.
305 (arch_sh1_up): Rename arch_sh_up to match external name to make life
306 easier for the testsuite.
307 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
308 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 309 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 310 arch_sh2a_or_sh4_up child.
311 (sh_table): Do renaming as above.
312 Correct comment for ldc.l for gas testsuite to read.
313 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
314 Correct comments for movy.w and movy.l for gas testsuite to read.
315 Correct comments for fmov.d and fmov.s for gas testsuite to read.
316
9df48ba9
L		 3172005-01-12 H.J. Lu <hongjiu.lu@intel.com>
318
319 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
320
2033b4b9
L		 3212005-01-12 H.J. Lu <hongjiu.lu@intel.com>
322
323 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
324
0bcb06d2
AS		 3252005-01-10 Andreas Schwab <schwab@suse.de>
326
327 * disassemble.c (disassemble_init_for_target) <case
328 bfd_arch_ia64>: Set skip_zeroes to 16.
329 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
330
47add74d
TL		 3312004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
332
333 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
334
246f4c05
SS		 3352004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
336
337 * avr-dis.c: Prettyprint. Added printing of symbol names in all
338 memory references. Convert avr_operand() to C90 formatting.
339
0e1200e5
TL		 3402004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
341
342 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
343
89a649f7
TL		 3442004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
345
346 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
347 (no_op_insn): Initialize array with instructions that have no
348 operands.
349 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
350
6255809c
RE		 3512004-11-29 Richard Earnshaw <rearnsha@arm.com>
352
353 * arm-dis.c: Correct top-level comment.
354
2fbad815
RE		 3552004-11-27 Richard Earnshaw <rearnsha@arm.com>
356
357 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
358 architecuture defining the insn.
359 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 360 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
361 field.
2fbad815
RE		 362 Also include opcode/arm.h.
363 * Makefile.am (arm-dis.lo): Update dependency list.
364 * Makefile.in: Regenerate.
365
d81acc42
NC		 3662004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
367
368 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
369 reflect the change to the short immediate syntax.
370
ca4f2377
AM		 3712004-11-19 Alan Modra <amodra@bigpond.net.au>
372
5da8bf1b
AM		 373 * or32-opc.c (debug): Warning fix.
374 * po/POTFILES.in: Regenerate.
375
ca4f2377
AM		 376 * maxq-dis.c: Formatting.
377 (print_insn): Warning fix.
378
b7693d02
DJ		 3792004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
380
381 * arm-dis.c (WORD_ADDRESS): Define.
382 (print_insn): Use it. Correct big-endian end-of-section handling.
383
300dac7e
NC		 3842004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
385 Vineet Sharma <vineets@noida.hcltech.com>
386
387 * maxq-dis.c: New file.
388 * disassemble.c (ARCH_maxq): Define.
610ad19b 389 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 390 instructions..
391 * configure.in: Add case for bfd_maxq_arch.
392 * configure: Regenerate.
393 * Makefile.am: Add support for maxq-dis.c
394 * Makefile.in: Regenerate.
395 * aclocal.m4: Regenerate.
396
42048ee7
TL		 3972004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
398
399 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
400 mode.
401 * crx-dis.c: Likewise.
402
bd21e58e
HPN		 4032004-11-04 Hans-Peter Nilsson <hp@axis.com>
404
405 Generally, handle CRISv32.
406 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
407 (struct cris_disasm_data): New type.
408 (format_reg, format_hex, cris_constraint, print_flags)
409 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
410 callers changed.
411 (format_sup_reg, print_insn_crisv32_with_register_prefix)
412 (print_insn_crisv32_without_register_prefix)
413 (print_insn_crisv10_v32_with_register_prefix)
414 (print_insn_crisv10_v32_without_register_prefix)
415 (cris_parse_disassembler_options): New functions.
416 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
417 parameter. All callers changed.
418 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
419 failure.
420 (cris_constraint) <case 'Y', 'U'>: New cases.
421 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
422 for constraint 'n'.
423 (print_with_operands) <case 'Y'>: New case.
424 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
425 <case 'N', 'Y', 'Q'>: New cases.
426 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
427 (print_insn_cris_with_register_prefix)
428 (print_insn_cris_without_register_prefix): Call
429 cris_parse_disassembler_options.
430 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
431 for CRISv32 and the size of immediate operands. New v32-only
432 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
433 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
434 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
435 Change brp to be v3..v10.
436 (cris_support_regs): New vector.
437 (cris_opcodes): Update head comment. New format characters '[',
438 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
439 Add new opcodes for v32 and adjust existing opcodes to accommodate
440 differences to earlier variants.
441 (cris_cond15s): New vector.
442
9306ca4a
JB		 4432004-11-04 Jan Beulich <jbeulich@novell.com>
444
445 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
446 (indirEb): Remove.
447 (Mp): Use f_mode rather than none at all.
448 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
449 replaces what previously was x_mode; x_mode now means 128-bit SSE
450 operands.
451 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
452 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
453 pinsrw's second operand is Edqw.
454 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
455 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
456 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
457 mode when an operand size override is present or always suffixing.
458 More instructions will need to be added to this group.
459 (putop): Handle new macro chars 'C' (short/long suffix selector),
460 'I' (Intel mode override for following macro char), and 'J' (for
461 adding the 'l' prefix to far branches in AT&T mode). When an
462 alternative was specified in the template, honor macro character when
463 specified for Intel mode.
464 (OP_E): Handle new *_mode values. Correct pointer specifications for
465 memory operands. Consolidate output of index register.
466 (OP_G): Handle new *_mode values.
467 (OP_I): Handle const_1_mode.
468 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
469 respective opcode prefix bits have been consumed.
470 (OP_EM, OP_EX): Provide some default handling for generating pointer
471 specifications.
472
f39c96a9
TL		 4732004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
474
475 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
476 COP_INST macro.
477
812337be
TL		 4782004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
479
480 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
481 (getregliststring): Support HI/LO and user registers.
610ad19b 482 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 483 rearrangement done in CRX opcode header file.
484 (crx_regtab): Likewise.
485 (crx_optab): Likewise.
610ad19b 486 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 487 formats.
488 support new Co-Processor instruction 'cpi'.
489
4030fa5a
NC		 4902004-10-27 Nick Clifton <nickc@redhat.com>
491
492 * opcodes/iq2000-asm.c: Regenerate.
493 * opcodes/iq2000-desc.c: Regenerate.
494 * opcodes/iq2000-desc.h: Regenerate.
495 * opcodes/iq2000-dis.c: Regenerate.
496 * opcodes/iq2000-ibld.c: Regenerate.
497 * opcodes/iq2000-opc.c: Regenerate.
498 * opcodes/iq2000-opc.h: Regenerate.
499
fc3d45e8
TL		 5002004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
501
502 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
503 us4, us5 (respectively).
504 Remove unsupported 'popa' instruction.
505 Reverse operands order in store co-processor instructions.
506
3c55da70
AM		 5072004-10-15 Alan Modra <amodra@bigpond.net.au>
508
509 * Makefile.am: Run "make dep-am"
510 * Makefile.in: Regenerate.
511
7fa3d080
BW		 5122004-10-12 Bob Wilson <bob.wilson@acm.org>
513
514 * xtensa-dis.c: Use ISO C90 formatting.
515
e612bb4d
AM		 5162004-10-09 Alan Modra <amodra@bigpond.net.au>
517
518 * ppc-opc.c: Revert 2004-09-09 change.
519
43cd72b9
BW		 5202004-10-07 Bob Wilson <bob.wilson@acm.org>
521
522 * xtensa-dis.c (state_names): Delete.
523 (fetch_data): Use xtensa_isa_maxlength.
524 (print_xtensa_operand): Replace operand parameter with opcode/operand
525 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
526 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
527 instruction bundles. Use xmalloc instead of malloc.
528
bbac1f2a
NC		 5292004-10-07 David Gibson <david@gibson.dropbear.id.au>
530
531 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
532 initializers.
533
48c9f030
NC		 5342004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
535
536 * crx-opc.c (crx_instruction): Support Co-processor insns.
537 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
538 (getregliststring): Change function to use the above enum.
539 (print_arg): Handle CO-Processor insns.
540 (crx_cinvs): Add 'b' option to invalidate the branch-target
541 cache.
542
12c64a4e
AH		 5432004-10-06 Aldy Hernandez <aldyh@redhat.com>
544
545 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
546 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
547 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
548 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
549 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
550
14127cc4
NC		 5512004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
552
553 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
554 rather than add it.
555
0dd132b6
NC		 5562004-09-30 Paul Brook <paul@codesourcery.com>
557
558 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
559 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
560
3f85e526
L		 5612004-09-17 H.J. Lu <hongjiu.lu@intel.com>
562
563 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
564 (CONFIG_STATUS_DEPENDENCIES): New.
565 (Makefile): Removed.
566 (config.status): Likewise.
567 * Makefile.in: Regenerated.
568
8ae85421
AM		 5692004-09-17 Alan Modra <amodra@bigpond.net.au>
570
571 * Makefile.am: Run "make dep-am".
572 * Makefile.in: Regenerate.
573 * aclocal.m4: Regenerate.
574 * configure: Regenerate.
575 * po/POTFILES.in: Regenerate.
576 * po/opcodes.pot: Regenerate.
577
24443139
AS		 5782004-09-11 Andreas Schwab <schwab@suse.de>
579
580 * configure: Rebuild.
581
2a309db0
AM		 5822004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
583
584 * ppc-opc.c (L): Make this field not optional.
585
42851540
NC		 5862004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
587
588 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
589 Fix parameter to 'm[t|f]csr' insns.
590
979273e3
NN		 5912004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
592
593 * configure.in: Autoupdate to autoconf 2.59.
594 * aclocal.m4: Rebuild with aclocal 1.4p6.
595 * configure: Rebuild with autoconf 2.59.
596 * Makefile.in: Rebuild with automake 1.4p6 (picking up
597 bfd changes for autoconf 2.59 on the way).
598 * config.in: Rebuild with autoheader 2.59.
599
ac28a1cb
RS		 6002004-08-27 Richard Sandiford <rsandifo@redhat.com>
601
602 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
603
30d1c836
ML		 6042004-07-30 Michal Ludvig <mludvig@suse.cz>
605
606 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
607 (GRPPADLCK2): New define.
608 (twobyte_has_modrm): True for 0xA6.
609 (grps): GRPPADLCK2 for opcode 0xA6.
610
0b0ac059
AO		 6112004-07-29 Alexandre Oliva <aoliva@redhat.com>
612
613 Introduce SH2a support.
614 * sh-opc.h (arch_sh2a_base): Renumber.
615 (arch_sh2a_nofpu_base): Remove.
616 (arch_sh_base_mask): Adjust.
617 (arch_opann_mask): New.
618 (arch_sh2a, arch_sh2a_nofpu): Adjust.
619 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
620 (sh_table): Adjust whitespace.
621 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
622 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
623 instruction list throughout.
624 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
625 of arch_sh2a in instruction list throughout.
626 (arch_sh2e_up): Accomodate above changes.
627 (arch_sh2_up): Ditto.
628 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
629 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
630 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
631 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
632 * sh-opc.h (arch_sh2a_nofpu): New.
633 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
634 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
635 instruction.
636 2004-01-20 DJ Delorie <dj@redhat.com>
637 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
638 2003-12-29 DJ Delorie <dj@redhat.com>
639 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
640 sh_opcode_info, sh_table): Add sh2a support.
641 (arch_op32): New, to tag 32-bit opcodes.
642 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
643 2003-12-02 Michael Snyder <msnyder@redhat.com>
644 * sh-opc.h (arch_sh2a): Add.
645 * sh-dis.c (arch_sh2a): Handle.
646 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
647
670ec21d
NC		 6482004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
649
650 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
651
ed049af3
NC		 6522004-07-22 Nick Clifton <nickc@redhat.com>
653
654 PR/280
655 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
656 insns - this is done by objdump itself.
657 * h8500-dis.c (print_insn_h8500): Likewise.
658
20f0a1fc
NC		 6592004-07-21 Jan Beulich <jbeulich@novell.com>
660
661 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
662 regardless of address size prefix in effect.
663 (ptr_reg): Size or address registers does not depend on rex64, but
664 on the presence of an address size override.
665 (OP_MMX): Use rex.x only for xmm registers.
666 (OP_EM): Use rex.z only for xmm registers.
667
6f14957b
MR		 6682004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
669
670 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
671 move/branch operations to the bottom so that VR5400 multimedia
672 instructions take precedence in disassembly.
673
1586d91e
MR		 6742004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
675
676 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
677 ISA-specific "break" encoding.
678
982de27a
NC		 6792004-07-13 Elvis Chiang <elvisfb@gmail.com>
680
681 * arm-opc.h: Fix typo in comment.
682
4300ab10
AS		 6832004-07-11 Andreas Schwab <schwab@suse.de>
684
685 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
686
8577e690
AS		 6872004-07-09 Andreas Schwab <schwab@suse.de>
688
689 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
690
1fe1f39c
NC		 6912004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
692
693 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
694 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
695 (crx-dis.lo): New target.
696 (crx-opc.lo): Likewise.
697 * Makefile.in: Regenerate.
698 * configure.in: Handle bfd_crx_arch.
699 * configure: Regenerate.
700 * crx-dis.c: New file.
701 * crx-opc.c: New file.
702 * disassemble.c (ARCH_crx): Define.
703 (disassembler): Handle ARCH_crx.
704
7a33b495
JW		 7052004-06-29 James E Wilson <wilson@specifixinc.com>
706
707 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
708 * ia64-asmtab.c: Regnerate.
709
98e69875
AM		 7102004-06-28 Alan Modra <amodra@bigpond.net.au>
711
712 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
713 (extract_fxm): Don't test dialect.
714 (XFXFXM_MASK): Include the power4 bit.
715 (XFXM): Add p4 param.
716 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
717
a53b85e2
AO		 7182004-06-27 Alexandre Oliva <aoliva@redhat.com>
719
720 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
721 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
722
d0618d1c
AM		 7232004-06-26 Alan Modra <amodra@bigpond.net.au>
724
725 * ppc-opc.c (BH, XLBH_MASK): Define.
726 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
727
1d9f512f
AM		 7282004-06-24 Alan Modra <amodra@bigpond.net.au>
729
730 * i386-dis.c (x_mode): Comment.
731 (two_source_ops): File scope.
732 (float_mem): Correct fisttpll and fistpll.
733 (float_mem_mode): New table.
734 (dofloat): Use it.
735 (OP_E): Correct intel mode PTR output.
736 (ptr_reg): Use open_char and close_char.
737 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
738 operands. Set two_source_ops.
739
52886d70
AM		 7402004-06-15 Alan Modra <amodra@bigpond.net.au>
741
742 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
743 instead of _raw_size.
744
bad9ceea
JJ		 7452004-06-08 Jakub Jelinek <jakub@redhat.com>
746
747 * ia64-gen.c (in_iclass): Handle more postinc st
748 and ld variants.
749 * ia64-asmtab.c: Rebuilt.
750
0451f5df
MS		 7512004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
752
753 * s390-opc.txt: Correct architecture mask for some opcodes.
754 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
755 in the esa mode as well.
756
f6f9408f
JR		 7572004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
758
759 * sh-dis.c (target_arch): Make unsigned.
760 (print_insn_sh): Replace (most of) switch with a call to
761 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
762 * sh-opc.h: Redefine architecture flags values.
763 Add sh3-nommu architecture.
764 Reorganise <arch>_up macros so they make more visual sense.
765 (SH_MERGE_ARCH_SET): Define new macro.
766 (SH_VALID_BASE_ARCH_SET): Likewise.
767 (SH_VALID_MMU_ARCH_SET): Likewise.
768 (SH_VALID_CO_ARCH_SET): Likewise.
769 (SH_VALID_ARCH_SET): Likewise.
770 (SH_MERGE_ARCH_SET_VALID): Likewise.
771 (SH_ARCH_SET_HAS_FPU): Likewise.
772 (SH_ARCH_SET_HAS_DSP): Likewise.
773 (SH_ARCH_UNKNOWN_ARCH): Likewise.
774 (sh_get_arch_from_bfd_mach): Add prototype.
775 (sh_get_arch_up_from_bfd_mach): Likewise.
776 (sh_get_bfd_mach_from_arch_set): Likewise.
777 (sh_merge_bfd_arc): Likewise.
778
be8c092b
NC		 7792004-05-24 Peter Barada <peter@the-baradas.com>
780
781 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 782 into new match_insn_m68k function. Loop over canidate
783 matches and select first that completely matches.
be8c092b
NC		 784 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
785 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 786 to verify addressing for MAC/EMAC.
be8c092b
NC		 787 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
788 reigster halves since 'fpu' and 'spl' look misleading.
789 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
790 * m68k-opc.c: Rearragne mac/emac cases to use longest for
791 first, tighten up match masks.
792 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
793 'size' from special case code in print_insn_m68k to
794 determine decode size of insns.
795
a30e9cc4
AM		 7962004-05-19 Alan Modra <amodra@bigpond.net.au>
797
798 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
799 well as when -mpower4.
800
9598fbe5
NC		 8012004-05-13 Nick Clifton <nickc@redhat.com>
802
803 * po/fr.po: Updated French translation.
804
6b6e92f4
NC		 8052004-05-05 Peter Barada <peter@the-baradas.com>
806
807 * m68k-dis.c(print_insn_m68k): Add new chips, use core
808 variants in arch_mask. Only set m68881/68851 for 68k chips.
809 * m68k-op.c: Switch from ColdFire chips to core variants.
810
a404d431
AM		 8112004-05-05 Alan Modra <amodra@bigpond.net.au>
812
a30e9cc4 813 PR 147.
a404d431
AM		 814 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
815
f3806e43
BE		 8162004-04-29 Ben Elliston <bje@au.ibm.com>
817
520ceea4
BE		 818 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
819 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 820
1f1799d5
KK		 8212004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
822
823 * sh-dis.c (print_insn_sh): Print the value in constant pool
824 as a symbol if it looks like a symbol.
825
fd99574b
NC		 8262004-04-22 Peter Barada <peter@the-baradas.com>
827
828 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
829 appropriate ColdFire architectures.
830 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
831 mask addressing.
832 Add EMAC instructions, fix MAC instructions. Remove
833 macmw/macml/msacmw/msacml instructions since mask addressing now
834 supported.
835
b4781d44
JJ		 8362004-04-20 Jakub Jelinek <jakub@redhat.com>
837
838 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
839 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
840 suffix. Use fmov*x macros, create all 3 fpsize variants in one
841 macro. Adjust all users.
842
91809fda 8432004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 844
91809fda
NC		 845 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
846 separately.
847
f4453dfa
NC		 8482004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
849
850 * m32r-asm.c: Regenerate.
851
9b0de91a
SS		 8522004-03-29 Stan Shebs <shebs@apple.com>
853
854 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
855 used.
856
e20c0b3d
AM		 8572004-03-19 Alan Modra <amodra@bigpond.net.au>
858
859 * aclocal.m4: Regenerate.
860 * config.in: Regenerate.
861 * configure: Regenerate.
862 * po/POTFILES.in: Regenerate.
863 * po/opcodes.pot: Regenerate.
864
fdd12ef3
AM		 8652004-03-16 Alan Modra <amodra@bigpond.net.au>
866
867 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
868 PPC_OPERANDS_GPR_0.
869 * ppc-opc.c (RA0): Define.
870 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
871 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 872 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 873
2dc111b3 8742004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 875
876 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 877
7bfeee7b
AM		 8782004-03-15 Alan Modra <amodra@bigpond.net.au>
879
880 * sparc-dis.c (print_insn_sparc): Update getword prototype.
881
7ffdda93
ML		 8822004-03-12 Michal Ludvig <mludvig@suse.cz>
883
884 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 885 (grps): Delete GRPPLOCK entry.
7ffdda93 886
cc0ec051
AM		 8872004-03-12 Alan Modra <amodra@bigpond.net.au>
888
889 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
890 (M, Mp): Use OP_M.
891 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
892 (GRPPADLCK): Define.
893 (dis386): Use NOP_Fixup on "nop".
894 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
895 (twobyte_has_modrm): Set for 0xa7.
896 (padlock_table): Delete. Move to..
897 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
898 and clflush.
899 (print_insn): Revert PADLOCK_SPECIAL code.
900 (OP_E): Delete sfence, lfence, mfence checks.
901
4fd61dcb
JJ		 9022004-03-12 Jakub Jelinek <jakub@redhat.com>
903
904 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
905 (INVLPG_Fixup): New function.
906 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
907
0f10071e
ML		 9082004-03-12 Michal Ludvig <mludvig@suse.cz>
909
910 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
911 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
912 (padlock_table): New struct with PadLock instructions.
913 (print_insn): Handle PADLOCK_SPECIAL.
914
c02908d2
AM		 9152004-03-12 Alan Modra <amodra@bigpond.net.au>
916
917 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
918 (OP_E): Twiddle clflush to sfence here.
919
d5bb7600
NC		 9202004-03-08 Nick Clifton <nickc@redhat.com>
921
922 * po/de.po: Updated German translation.
923
ae51a426
JR		 9242003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
925
926 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
927 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
928 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
929 accordingly.
930
676a64f4
RS		 9312004-03-01 Richard Sandiford <rsandifo@redhat.com>
932
933 * frv-asm.c: Regenerate.
934 * frv-desc.c: Regenerate.
935 * frv-desc.h: Regenerate.
936 * frv-dis.c: Regenerate.
937 * frv-ibld.c: Regenerate.
938 * frv-opc.c: Regenerate.
939 * frv-opc.h: Regenerate.
940
c7a48b9a
RS		 9412004-03-01 Richard Sandiford <rsandifo@redhat.com>
942
943 * frv-desc.c, frv-opc.c: Regenerate.
944
8ae0baa2
RS		 9452004-03-01 Richard Sandiford <rsandifo@redhat.com>
946
947 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
948
ce11586c
JR		 9492004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
950
951 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
952 Also correct mistake in the comment.
953
6a5709a5
JR		 9542004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
955
956 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
957 ensure that double registers have even numbers.
958 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
959 that reserved instruction 0xfffd does not decode the same
960 as 0xfdfd (ftrv).
961 * sh-opc.h: Add REG_N_D nibble type and use it whereever
962 REG_N refers to a double register.
963 Add REG_N_B01 nibble type and use it instead of REG_NM
964 in ftrv.
965 Adjust the bit patterns in a few comments.
966
e5d2b64f 9672004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 968
969 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 970
1f04b05f
AH		 9712004-02-20 Aldy Hernandez <aldyh@redhat.com>
972
973 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
974
2f3b8700
AH		 9752004-02-20 Aldy Hernandez <aldyh@redhat.com>
976
977 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
978
f0b26da6 9792004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 980
981 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
982 mtivor32, mtivor33, mtivor34.
f0b26da6 983
23d59c56 9842004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 985
986 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 987
34920d91
NC		 9882004-02-10 Petko Manolov <petkan@nucleusys.com>
989
990 * arm-opc.h Maverick accumulator register opcode fixes.
991
44d86481
BE		 9922004-02-13 Ben Elliston <bje@wasabisystems.com>
993
994 * m32r-dis.c: Regenerate.
995
17707c23
MS		 9962004-01-27 Michael Snyder <msnyder@redhat.com>
997
998 * sh-opc.h (sh_table): "fsrra", not "fssra".
999
fe3a9bc4
NC		 10002004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1001
1002 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1003 contraints.
1004
ff24f124
JJ		 10052004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1006
1007 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1008
a02a862a
AM		 10092004-01-19 Alan Modra <amodra@bigpond.net.au>
1010
1011 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1012 1. Don't print scale factor on AT&T mode when index missing.
1013
d164ea7f
AO		 10142004-01-16 Alexandre Oliva <aoliva@redhat.com>
1015
1016 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1017 when loaded into XR registers.
1018
cb10e79a
RS		 10192004-01-14 Richard Sandiford <rsandifo@redhat.com>
1020
1021 * frv-desc.h: Regenerate.
1022 * frv-desc.c: Regenerate.
1023 * frv-opc.c: Regenerate.
1024
f532f3fa
MS		 10252004-01-13 Michael Snyder <msnyder@redhat.com>
1026
1027 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1028
e45d0630
PB		 10292004-01-09 Paul Brook <paul@codesourcery.com>
1030
1031 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1032 specific opcodes.
1033
3ba7a1aa
DJ		 10342004-01-07 Daniel Jacobowitz <drow@mvista.com>
1035
1036 * Makefile.am (libopcodes_la_DEPENDENCIES)
1037 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1038 comment about the problem.
1039 * Makefile.in: Regenerate.
1040
ba2d3f07
AO		 10412004-01-06 Alexandre Oliva <aoliva@redhat.com>
1042
1043 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1044 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1045 cut&paste errors in shifting/truncating numerical operands.
1046 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1047 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1048 (parse_uslo16): Likewise.
1049 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1050 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1051 (parse_s12): Likewise.
1052 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1053 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1054 (parse_uslo16): Likewise.
1055 (parse_uhi16): Parse gothi and gotfuncdeschi.
1056 (parse_d12): Parse got12 and gotfuncdesc12.
1057 (parse_s12): Likewise.
1058
3ab48931
NC		 10592004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1060
1061 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1062 instruction which looks similar to an 'rla' instruction.
a0bd404e 1063
c9e214e5 1064For older changes see ChangeLog-0203
252b5132
RH		 1065\f
1066Local Variables:
2f6d2f85
NC		 1067mode: change-log
1068left-margin: 8
1069fill-column: 74
252b5132
RH		 1070version-control: never
1071End:
GDB Binutils - Deliverables
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