gas/
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12007-03-28 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
4 movq. Remove InvMem from sldt, smsw and str.
5
6 * i386-opc.h (InvMem): Renamed to ...
7 (RegMem): Update comments.
8 (AnyMem): Remove InvMem.
9
831480e9 102007-03-27 Paul Brook <paul@codesourcery.com>
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12 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
13
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142007-03-24 Paul Brook <paul@codesourcery.com>
15
16 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
17 (print_insn_coprocessor): Handle %<bitfield>x.
18
b6702015 192007-03-24 Paul Brook <paul@codesourcery.com>
e72cf3ec 20 Mark Shinwell <shinwell@codesourcery.com>
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21
22 * arm-dis.c (arm_opcodes): Print SRS base register.
23
831480e9 242007-03-23 H.J. Lu <hongjiu.lu@intel.com>
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25
26 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
27
28 * i386-opc.c (i386_optab): Add rex.wrxb.
29
831480e9 302007-03-21 H.J. Lu <hongjiu.lu@intel.com>
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31
32 * i386-dis.c (REX_MODE64): Remove definition.
33 (REX_EXTX): Likewise.
34 (REX_EXTY): Likewise.
35 (REX_EXTZ): Likewise.
36 (USED_REX): Use REX_OPCODE instead of 0x40.
37 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
38 REX_R, REX_X and REX_B respectively.
39
831480e9 402007-03-21 H.J. Lu <hongjiu.lu@intel.com>
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41
42 PR binutils/4218
43 * i386-dis.c (PREGRP38): New.
44 (dis386): Use PREGRP38 for 0x90.
45 (prefix_user_table): Add PREGRP38.
46 (print_insn): Set uses_REPZ_prefix to 1 for pause.
47 (NOP_Fixup1): Properly handle REX bits.
48 (NOP_Fixup2): Likewise.
49
50 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
51 Allow register with nop.
52
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532007-03-20 DJ Delorie <dj@redhat.com>
54
55 * m32c-asm.c: Regenerate.
56 * m32c-desc.c: Regenerate.
57 * m32c-desc.h: Regenerate.
58 * m32c-dis.h: Regenerate.
59 * m32c-ibld.c: Regenerate.
60 * m32c-opc.c: Regenerate.
61 * m32c-opc.h: Regenerate.
62
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632007-03-15 H.J. Lu <hongjiu.lu@intel.com>
64
65 * i386-opc.c: Include "libiberty.h".
66 (i386_regtab): Remove the last entry.
67 (i386_regtab_size): New.
68 (i386_float_regtab_size): Likewise.
69
70 * i386-opc.h (i386_regtab_size): New.
71 (i386_float_regtab_size): Likewise.
72
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732007-03-15 H.J. Lu <hongjiu.lu@intel.com>
74
75 * Makefile.am (CFILES): Add i386-opc.c.
76 (ALL_MACHINES): Add i386-opc.lo.
77 Run "make dep-am".
78 * Makefile.in: Regenerated.
79
80 * configure.in: Add i386-opc.lo for bfd_i386_arch.
81 * configure: Regenerated.
82
83 * i386-dis.c: Include "opcode/i386.h".
84 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
85 (FWAIT_OPCODE): Remove definition.
86 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
87 (MAX_OPERANDS): Remove definition.
88
89 * i386-opc.c: New file.
90 * i386-opc.h: Likewise.
91
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922007-03-15 H.J. Lu <hongjiu.lu@intel.com>
93
94 * Makefile.in: Regenerated.
95
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962007-03-09 H.J. Lu <hongjiu.lu@intel.com>
97
98 * i386-dis.c (OP_Rd): Renamed to ...
99 (OP_R): This.
100 (Rd): Updated.
101 (Rm): Likewise.
102
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1032007-03-08 Alan Modra <amodra@bigpond.net.au>
104
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105 * fr30-asm.c: Regenerate.
106 * frv-asm.c: Regenerate.
107 * ip2k-asm.c: Regenerate.
108 * iq2000-asm.c: Regenerate.
109 * m32c-asm.c: Regenerate.
110 * m32r-asm.c: Regenerate.
111 * m32r-dis.c: Regenerate.
112 * mt-asm.c: Regenerate.
113 * mt-ibld.c: Regenerate.
114 * mt-opc.c: Regenerate.
115 * openrisc-asm.c: Regenerate.
116 * xc16x-asm.c: Regenerate.
117 * xstormy16-asm.c: Regenerate.
118
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119 * Makefile.am: Run "make dep-am".
120 * Makefile.in: Regenerate.
121 * po/POTFILES.in: Regenerate.
122
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1232007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
124
125 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
126 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
127 instruction formats added.
128 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
129 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
130 masks added.
131 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
132 instructions added.
133 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
134 (main): z9-ec cpu type option added.
135 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
136
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1372007-02-22 DJ Delorie <dj@redhat.com>
138
139 * s390-opc.c (INSTR_SS_L2RDRD): New.
140 (MASK_SS_L2RDRD): New.
141 * s390-opc.txt (pka): Use it.
142
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1432007-02-20 Thiemo Seufer <ths@mips.com>
144 Chao-Ying Fu <fu@mips.com>
145
146 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
147 (print_insn_args): Add support for balign instruction.
148 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
149 (mips_builtin_opcodes): Add DSP R2 instructions.
150
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1512007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
152
153 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
154 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
155 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
156 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
157
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1582007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
159
160 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
161 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
162 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
163 and sfpc.
164
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1652007-02-16 Nick Clifton <nickc@redhat.com>
166
167 PR binutils/4045
168 * avr-dis.c (comment_start): New variable, contains the prefix to
169 use when printing addresses in comments.
170 (print_insn_avr): Set comment_start to an empty space if there is
171 no symbol table available as the generic address printing code
172 will prefix the numeric value of the address with 0x.
173
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1742007-02-13 H.J. Lu <hongjiu.lu@intel.com>
175
176 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
177 in struct dis386.
178
bd2f2e55 1792007-02-05 Dave Brolley <brolley@redhat.com>
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180 Richard Sandiford <rsandifo@redhat.com>
181 DJ Delorie <dj@redhat.com>
182 Graydon Hoare <graydon@redhat.com>
183 Frank Ch. Eigler <fche@redhat.com>
184 Ben Elliston <bje@redhat.com>
185
186 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
187 (CFILES): Add mep-*.c
188 (ALL_MACHINES): Add mep-*.lo.
189 (CLEANFILES): Add stamp-mep.
190 (CGEN_CPUS): Add mep.
191 (MEP_DEPS): New variable.
192 (mep-*): New targets.
193 * configure.in: Handle bfd_mep_arch.
194 * disassemble.c (ARCH_mep): New macro.
195 (disassembler): Handle bfd_arch_mep.
196 (disassemble_init_for_target): Likewise.
197 * mep-*: New files for Toshiba Media Processor (MeP).
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198 * Makefile.in: Regenerated.
199 * configure: Regenerated.
200
eb7834a6 2012007-02-05 H.J. Lu <hongjiu.lu@intel.com>
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202
203 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
204 wrap around within the same segment in 16bit mode.
205
eb7834a6 2062007-02-02 H.J. Lu <hongjiu.lu@intel.com>
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207
208 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
209 prefix.
210
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2112007-02-02 H.J. Lu <hongjiu.lu@intel.com>
212
213 * avr-dis.c (avr_operand): Correct PR number in comment.
214
fc523535 2152007-02-02 H.J. Lu <hongjiu.lu@intel.com>
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216
217 * disassemble.c (disassembler_usage): Call
218 print_i386_disassembler_options for i386 disassembler.
219
220 * i386-dis.c (print_i386_disassembler_options): New.
221 (print_insn): Support the new addr64 option.
222
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2232007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
224
225 * ppc-dis.c (powerpc_dialect): Handle ppc440.
226 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
227 be used.
228
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2292007-02-02 Alan Modra <amodra@bigpond.net.au>
230
231 * ppc-opc.c (insert_bdm): -Many comment.
232 (valid_bo): Add "extract" param. Accept both powerpc and power4
233 BO fields when disassembling with -Many.
234 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
235
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2362007-01-08 Kazu Hirata <kazu@codesourcery.com>
237
238 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
239 cpu32 | fido_a except on tbl instructions.
240
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2412007-01-04 Paul Brook <paul@codesourcery.com>
242
243 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
244
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2452007-01-04 Andreas Schwab <schwab@suse.de>
246
247 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
248
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2492007-01-04 Julian Brown <julian@codesourcery.com>
250
251 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
252 vqrshl instructions.
253
10a2343e 254For older changes see ChangeLog-2006
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255\f
256Local Variables:
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257mode: change-log
258left-margin: 8
259fill-column: 74
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260version-control: never
261End:
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