Commit | Line | Data |
---|---|---|
4b4c407a L |
1 | 2014-09-10 H.J. Lu <hongjiu.lu@intel.com> |
2 | ||
3 | * i386-dis.c (dis386): Replace "P" with "%LP" for iret and sysret. | |
4 | (putop): Handle "%LP". | |
5 | ||
df7b4545 JW |
6 | 2014-09-03 Jiong Wang <jiong.wang@arm.com> |
7 | ||
8 | * aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr. | |
9 | * aarch64-dis-2.c: Update auto-generated file. | |
10 | ||
ee804238 JW |
11 | 2014-09-03 Jiong Wang <jiong.wang@arm.com> |
12 | ||
13 | * aarch64-tbl.h (QL_R4NIL): New qualifiers. | |
14 | (aarch64_feature_lse): New feature added. | |
15 | (LSE): New Added. | |
16 | (aarch64_opcode_table): New LSE instructions added. Improve | |
17 | descriptions for ldarb/ldarh/ldar. | |
18 | (aarch64_opcode_table): Describe PAIRREG. | |
19 | * aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz. | |
20 | * aarch64-opc.c (fields): Add entry for F_LSE_SZ. | |
21 | (aarch64_print_operand): Recognize PAIRREG. | |
22 | (operand_general_constraint_met_p): Check reg pair constraints for CASP | |
23 | instructions. | |
24 | * aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg. | |
25 | (do_special_decoding): Recognize F_LSE_SZ. | |
26 | * aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ. | |
27 | ||
5575639b MR |
28 | 2014-08-26 Maciej W. Rozycki <macro@codesourcery.com> |
29 | ||
30 | * micromips-opc.c (decode_micromips_operand): Rename `B' to `+J'. | |
31 | (micromips_opcodes): Use "+J" in place of "B" for "hypcall", | |
32 | "sdbbp", "syscall" and "wait". | |
33 | ||
84919466 MR |
34 | 2014-08-21 Nathan Sidwell <nathan@codesourcery.com> |
35 | Maciej W. Rozycki <macro@codesourcery.com> | |
36 | ||
37 | * arm-dis.c (print_arm_address): Negate the GPR-relative offset | |
38 | returned if the U bit is set. | |
39 | ||
a6c70539 MR |
40 | 2014-08-21 Maciej W. Rozycki <macro@codesourcery.com> |
41 | ||
42 | * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out | |
43 | 48-bit "li" encoding. | |
44 | ||
9ace48f3 AA |
45 | 2014-08-19 Andreas Arnez <arnez@linux.vnet.ibm.com> |
46 | ||
47 | * s390-dis.c (s390_insn_length, s390_insn_matches_opcode) | |
48 | (s390_print_insn_with_opcode, opcode_mask_more_specific): New | |
49 | static functions, code was moved from... | |
50 | (print_insn_s390): ...here. | |
51 | (s390_extract_operand): Adjust comment. Change type of first | |
52 | parameter from 'unsigned char *' to 'const bfd_byte *'. | |
53 | (union operand_value): New. | |
54 | (s390_extract_operand): Change return type to union operand_value. | |
55 | Also avoid integer overflow in sign-extension. | |
56 | (s390_print_insn_with_opcode): Adjust to changed return value from | |
57 | s390_extract_operand(). Change "%i" printf format to "%u" for | |
58 | unsigned values. | |
59 | (init_disasm): Simplify initialization of opc_index[]. This also | |
60 | fixes an access after the last element of s390_opcodes[]. | |
61 | (print_insn_s390): Simplify the opcode search loop. | |
62 | Check architecture mask against all searched opcodes, not just the | |
63 | first matching one. | |
64 | (s390_print_insn_with_opcode): Drop function pointer dereferences | |
65 | without effect. | |
66 | (print_insn_s390): Likewise. | |
67 | (s390_insn_length): Simplify formula for return value. | |
68 | (s390_print_insn_with_opcode): Avoid special handling for the | |
69 | separator before the first operand. Use new local variable | |
70 | 'flags' in place of 'operand->flags'. | |
71 | ||
60ac5798 MF |
72 | 2014-08-14 Mike Frysinger <vapier@gentoo.org> |
73 | ||
74 | * bfin-dis.c (struct private): Change int's to bfd_boolean's. | |
75 | (decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0, | |
76 | decode_dagMODik_0, decode_LDIMMhalf_0, decode_linkage_0): | |
77 | Change assignment of 1 to priv->comment to TRUE. | |
78 | (print_insn_bfin): Change legal to a bfd_boolean. Change | |
79 | assignment of 0/1 with priv comment and parallel and legal | |
80 | to FALSE/TRUE. | |
81 | ||
b3f3b4b0 MF |
82 | 2014-08-14 Mike Frysinger <vapier@gentoo.org> |
83 | ||
84 | * bfin-dis.c (OUT): Define. | |
85 | (decode_CC2stat_0): Declare new op_names array. | |
86 | Replace multiple if statements with a single one. | |
87 | ||
a4e600b2 MF |
88 | 2014-08-14 Mike Frysinger <vapier@gentoo.org> |
89 | ||
90 | * bfin-dis.c (struct private): Add iw0. | |
91 | (_print_insn_bfin): Assign iw0 to priv.iw0. | |
92 | (print_insn_bfin): Drop ifetch and use priv.iw0. | |
93 | ||
703ec4e8 MF |
94 | 2014-08-13 Mike Frysinger <vapier@gentoo.org> |
95 | ||
96 | * bfin-dis.c (comment, parallel): Move from global scope ... | |
97 | (struct private): ... to this new struct. | |
98 | (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0, | |
99 | decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0, | |
100 | decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0, | |
101 | decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0, | |
102 | decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0, | |
103 | decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0, | |
104 | decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin, | |
105 | print_insn_bfin): Declare private struct. Use priv's comment and | |
106 | parallel members. | |
107 | ||
ed2c4879 MF |
108 | 2014-08-13 Mike Frysinger <vapier@gentoo.org> |
109 | ||
110 | * bfin-dis.c (ifetch): Do not align pc to 2 bytes. | |
111 | (_print_insn_bfin): Add check for unaligned pc. | |
112 | ||
ba329817 MF |
113 | 2014-08-13 Mike Frysinger <vapier@gentoo.org> |
114 | ||
115 | * bfin-dis.c (ifetch): New function. | |
116 | (_print_insn_bfin, print_insn_bfin): Call new ifetch and return | |
117 | -1 when it errors. | |
118 | ||
43885403 MF |
119 | 2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com> |
120 | ||
121 | * micromips-opc.c (COD): Rename throughout to... | |
122 | (CM): New define, update to use INSN_COPROC_MOVE. | |
123 | (LCD): Rename throughout to... | |
124 | (LC): New define, update to use INSN_LOAD_COPROC. | |
125 | * mips-opc.c: Likewise. | |
126 | ||
351cdf24 MF |
127 | 2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com> |
128 | ||
129 | * micromips-opc.c (COD, LCD) New macros. | |
130 | (cfc1, ctc1): Remove FP_S attribute. | |
131 | (dmfc1, mfc1, mfhc1): Add LCD attribute. | |
132 | (dmtc1, mtc1, mthc1): Add COD attribute. | |
133 | * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute. | |
134 | ||
90a915bf IT |
135 | 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com> |
136 | Alexander Ivchenko <alexander.ivchenko@intel.com> | |
137 | Maxim Kuznetsov <maxim.kuznetsov@intel.com> | |
138 | Sergey Lega <sergey.s.lega@intel.com> | |
139 | Anna Tikhonova <anna.tikhonova@intel.com> | |
140 | Ilya Tocar <ilya.tocar@intel.com> | |
141 | Andrey Turetskiy <andrey.turetskiy@intel.com> | |
142 | Ilya Verbin <ilya.verbin@intel.com> | |
143 | Kirill Yukhin <kirill.yukhin@intel.com> | |
144 | Michael Zolotukhin <michael.v.zolotukhin@intel.com> | |
145 | ||
146 | * i386-dis-evex.h: Updated. | |
147 | * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, | |
148 | PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16, | |
149 | PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51, | |
150 | PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66, | |
151 | PREFIX_EVEX_0F3A67. | |
152 | (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2, | |
153 | VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0. | |
154 | (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0, | |
155 | EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, | |
156 | EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2, | |
157 | EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1, | |
158 | EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2, | |
159 | EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2, | |
160 | EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2. | |
161 | (prefix_table): Add entries for new instructions. | |
162 | (vex_len_table): Ditto. | |
163 | (vex_w_table): Ditto. | |
164 | (OP_E_memory): Update xmmq_mode handling. | |
165 | * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS. | |
166 | (cpu_flags): Add CpuAVX512DQ. | |
167 | * i386-init.h: Regenerared. | |
168 | * i386-opc.h (CpuAVX512DQ): New. | |
169 | (i386_cpu_flags): Add cpuavx512dq. | |
170 | * i386-opc.tbl: Add AVX512DQ instructions. | |
171 | * i386-tbl.h: Regenerate. | |
172 | ||
1ba585e8 IT |
173 | 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com> |
174 | Alexander Ivchenko <alexander.ivchenko@intel.com> | |
175 | Maxim Kuznetsov <maxim.kuznetsov@intel.com> | |
176 | Sergey Lega <sergey.s.lega@intel.com> | |
177 | Anna Tikhonova <anna.tikhonova@intel.com> | |
178 | Ilya Tocar <ilya.tocar@intel.com> | |
179 | Andrey Turetskiy <andrey.turetskiy@intel.com> | |
180 | Ilya Verbin <ilya.verbin@intel.com> | |
181 | Kirill Yukhin <kirill.yukhin@intel.com> | |
182 | Michael Zolotukhin <michael.v.zolotukhin@intel.com> | |
183 | ||
184 | * i386-dis-evex.h: Add new instructions (prefixes bellow). | |
185 | * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE. | |
186 | (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71. | |
187 | (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31, | |
188 | PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63, | |
189 | PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68, | |
190 | PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4, | |
191 | PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7, | |
192 | PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5, | |
193 | PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, | |
194 | PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE, | |
195 | PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4, | |
196 | PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, | |
197 | PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1, | |
198 | PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9, | |
199 | PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, | |
200 | PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D, | |
201 | PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830, | |
202 | PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866, | |
203 | PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A, | |
204 | PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F, | |
205 | PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E, | |
206 | PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42. | |
207 | (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2, | |
208 | VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0, | |
209 | VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2, | |
210 | VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0, | |
211 | VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1, | |
212 | VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1, | |
213 | VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1, | |
214 | VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0, | |
215 | VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0, | |
216 | VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0, | |
217 | VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0. | |
218 | (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3, | |
219 | EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2, | |
220 | EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1, | |
221 | EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2, | |
222 | EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2, | |
223 | EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, | |
224 | EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2. | |
225 | (prefix_table): Add entries for new instructions. | |
226 | (vex_table) : Ditto. | |
227 | (vex_len_table): Ditto. | |
228 | (vex_w_table): Ditto. | |
229 | (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode, | |
230 | mask_bd_mode handling. | |
231 | (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode | |
232 | handling. | |
233 | (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode | |
234 | handling. | |
235 | (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling. | |
236 | (OP_EX): Add dqw_swap_mode handling. | |
237 | (OP_VEX): Add mask_bd_mode handling. | |
238 | (OP_Mask): Add mask_bd_mode handling. | |
239 | * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS. | |
240 | (cpu_flags): Add CpuAVX512BW. | |
241 | * i386-init.h: Regenerated. | |
242 | * i386-opc.h (CpuAVX512BW): New. | |
243 | (i386_cpu_flags): Add cpuavx512bw. | |
244 | * i386-opc.tbl: Add AVX512BW instructions. | |
245 | * i386-tbl.h: Regenerate. | |
246 | ||
99282af6 IT |
247 | 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com> |
248 | Alexander Ivchenko <alexander.ivchenko@intel.com> | |
249 | Maxim Kuznetsov <maxim.kuznetsov@intel.com> | |
250 | Sergey Lega <sergey.s.lega@intel.com> | |
251 | Anna Tikhonova <anna.tikhonova@intel.com> | |
252 | Ilya Tocar <ilya.tocar@intel.com> | |
253 | Andrey Turetskiy <andrey.turetskiy@intel.com> | |
254 | Ilya Verbin <ilya.verbin@intel.com> | |
255 | Kirill Yukhin <kirill.yukhin@intel.com> | |
256 | Michael Zolotukhin <michael.v.zolotukhin@intel.com> | |
257 | ||
258 | * i386-opc.tbl: Add AVX512VL and AVX512CD instructions. | |
259 | * i386-tbl.h: Regenerate. | |
260 | ||
b28d1bda IT |
261 | 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com> |
262 | Alexander Ivchenko <alexander.ivchenko@intel.com> | |
263 | Maxim Kuznetsov <maxim.kuznetsov@intel.com> | |
264 | Sergey Lega <sergey.s.lega@intel.com> | |
265 | Anna Tikhonova <anna.tikhonova@intel.com> | |
266 | Ilya Tocar <ilya.tocar@intel.com> | |
267 | Andrey Turetskiy <andrey.turetskiy@intel.com> | |
268 | Ilya Verbin <ilya.verbin@intel.com> | |
269 | Kirill Yukhin <kirill.yukhin@intel.com> | |
270 | Michael Zolotukhin <michael.v.zolotukhin@intel.com> | |
271 | ||
272 | * i386-dis.c (intel_operand_size): Support 128/256 length in | |
273 | vex_vsib_q_w_dq_mode. | |
274 | (OP_E_memory): Add ymmq_mode handling, handle new broadcast. | |
275 | * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS. | |
276 | (cpu_flags): Add CpuAVX512VL. | |
277 | * i386-init.h: Regenerated. | |
278 | * i386-opc.h (CpuAVX512VL): New. | |
279 | (i386_cpu_flags): Add cpuavx512vl. | |
280 | (BROADCAST_1TO4, BROADCAST_1TO2): Define. | |
281 | * i386-opc.tbl: Add AVX512VL instructions. | |
282 | * i386-tbl.h: Regenerate. | |
283 | ||
018dc9be SK |
284 | 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
285 | ||
286 | * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h, | |
287 | * or1k-opinst.c: Regenerate. | |
288 | ||
792f7758 IT |
289 | 2014-07-08 Ilya Tocar <ilya.tocar@intel.com> |
290 | ||
291 | * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss. | |
292 | (EVEX_W_0F10_P_3_M_1): Fix vmovsd. | |
293 | ||
35eafcc7 AM |
294 | 2014-07-04 Alan Modra <amodra@gmail.com> |
295 | ||
296 | * configure.ac: Rename from configure.in. | |
297 | * Makefile.in: Regenerate. | |
298 | * config.in: Regenerate. | |
299 | ||
2e98a7bd AM |
300 | 2014-07-04 Alan Modra <amodra@gmail.com> |
301 | ||
302 | * configure.in: Include bfd/version.m4. | |
303 | (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. | |
304 | (BFD_VERSION): Delete. | |
305 | * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. | |
306 | * configure: Regenerate. | |
307 | * Makefile.in: Regenerate. | |
308 | ||
f36e8886 BS |
309 | 2014-07-01 Barney Stratford <barney_stratford@fastmail.fm> |
310 | Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> | |
311 | Pitchumani Sivanupandi <pitchumani.s@atmel.com> | |
312 | Soundararajan <Sounderarajan.D@atmel.com> | |
313 | ||
314 | * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. | |
2e98a7bd AM |
315 | (print_insn_avr): Do not select opcode if insn ISA is avrtiny and |
316 | machine is not avrtiny. | |
f36e8886 | 317 | |
6ddf779d PDM |
318 | 2014-06-26 Philippe De Muyter <phdm@macqel.be> |
319 | ||
320 | * or1k-desc.h (spr_field_masks): Add U suffix to the end of long | |
321 | constants. | |
322 | ||
c151b1c6 AM |
323 | 2014-06-12 Alan Modra <amodra@gmail.com> |
324 | ||
325 | * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c, | |
326 | * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate. | |
327 | ||
d9949a36 L |
328 | 2014-06-10 H.J. Lu <hongjiu.lu@intel.com> |
329 | ||
330 | * i386-dis.c (fwait_prefix): New. | |
331 | (ckprefix): Set fwait_prefix. | |
332 | (print_insn): Properly print prefixes before fwait. | |
333 | ||
a47622ac AM |
334 | 2014-06-07 Alan Modra <amodra@gmail.com> |
335 | ||
336 | * ppc-opc.c (UISIGNOPT): Define and use with cmpli. | |
337 | ||
270c9937 JB |
338 | 2014-06-05 Joel Brobecker <brobecker@adacore.com> |
339 | ||
340 | * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on | |
341 | bfd's development.sh. | |
342 | * Makefile.in, configure: Regenerate. | |
343 | ||
9f445129 NC |
344 | 2014-06-03 Nick Clifton <nickc@redhat.com> |
345 | ||
346 | * msp430-dis.c (msp430_doubleoperand): Use extension_word to | |
347 | decide when extended addressing is being used. | |
348 | ||
ec9a8169 EB |
349 | 2014-06-02 Eric Botcazou <ebotcazou@adacore.com> |
350 | ||
351 | * sparc-opc.c (cas): Disable for LEON. | |
352 | (casl): Likewise. | |
353 | ||
cdf2a8b7 AM |
354 | 2014-05-20 Alan Modra <amodra@gmail.com> |
355 | ||
356 | * m68k-dis.c: Don't include setjmp.h. | |
357 | ||
df18fdba L |
358 | 2014-05-09 H.J. Lu <hongjiu.lu@intel.com> |
359 | ||
360 | * i386-dis.c (ADDR16_PREFIX): Removed. | |
361 | (ADDR32_PREFIX): Likewise. | |
362 | (DATA16_PREFIX): Likewise. | |
363 | (DATA32_PREFIX): Likewise. | |
364 | (prefix_name): Updated. | |
365 | (print_insn): Simplify data and address size prefixes processing. | |
366 | ||
999b995d SK |
367 | 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
368 | ||
369 | * or1k-desc.c: Regenerated. | |
370 | * or1k-desc.h: Likewise. | |
371 | * or1k-opc.c: Likewise. | |
372 | * or1k-opc.h: Likewise. | |
373 | * or1k-opinst.c: Likewise. | |
374 | ||
ae52f483 AB |
375 | 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com> |
376 | ||
377 | * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction. | |
378 | (I34): New define. | |
379 | (I36): New define. | |
380 | (I66): New define. | |
381 | (I68): New define. | |
382 | * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and | |
383 | mips64r5. | |
384 | (parse_mips_dis_option): Update MSA and virtualization support to | |
9f445129 | 385 | allow mips64r3 and mips64r5. |
ae52f483 | 386 | |
f7730599 AB |
387 | 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com> |
388 | ||
389 | * mips-opc.c (G3): Remove I4. | |
390 | ||
285ca992 L |
391 | 2014-05-05 H.J. Lu <hongjiu.lu@intel.com> |
392 | ||
393 | PR binutils/16893 | |
394 | * i386-dis.c (twobyte_has_mandatory_prefix): New variable. | |
395 | (end_codep): Likewise. | |
396 | (mandatory_prefix): Likewise. | |
397 | (active_seg_prefix): Likewise. | |
398 | (ckprefix): Set active_seg_prefix to the active segment register | |
399 | prefix. | |
400 | (seg_prefix): Removed. | |
401 | (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ | |
402 | for prefix index. Ignore the index if it is invalid and the | |
403 | mandatory prefix isn't required. | |
404 | (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is | |
405 | mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits | |
406 | in used_prefixes here. Don't print unused prefixes. Check | |
407 | active_seg_prefix for the active segment register prefix. | |
408 | Restore the DFLAG bit in sizeflag if the data size prefix is | |
409 | unused. Check the unused mandatory PREFIX_XXX prefixes | |
410 | (append_seg): Only print the segment register which gets used. | |
411 | (OP_E_memory): Check active_seg_prefix for the segment register | |
412 | prefix. | |
413 | (OP_OFF): Likewise. | |
414 | (OP_OFF64): Likewise. | |
415 | (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset. | |
416 | ||
8df14d78 L |
417 | 2014-05-02 H.J. Lu <hongjiu.lu@intel.com> |
418 | ||
419 | PR binutils/16886 | |
420 | * config.in: Regenerated. | |
421 | * configure: Likewise. | |
422 | * configure.in: Check if sigsetjmp is available. | |
423 | * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. | |
424 | (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. | |
425 | (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP. | |
426 | * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF. | |
427 | (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. | |
428 | (print_insn): Replace setjmp with OPCODES_SIGSETJMP. | |
429 | * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. | |
430 | (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. | |
431 | (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP. | |
432 | * sysdep.h (OPCODES_SIGJMP_BUF): New macro. | |
433 | (OPCODES_SIGSETJMP): Likewise. | |
434 | (OPCODES_SIGLONGJMP): Likewise. | |
435 | * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. | |
436 | (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. | |
437 | (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP. | |
438 | * xtensa-dis.c (dis_private): Replace jmp_buf with | |
439 | OPCODES_SIGJMP_BUF. | |
440 | (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. | |
441 | (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP. | |
442 | * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF. | |
443 | (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. | |
444 | (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP. | |
445 | ||
86a80a50 L |
446 | 2014-05-01 H.J. Lu <hongjiu.lu@intel.com> |
447 | ||
448 | PR binutils/16891 | |
449 | * i386-dis.c (print_insn): Handle prefixes before fwait. | |
450 | ||
a9e18c6a AM |
451 | 2014-04-26 Alan Modra <amodra@gmail.com> |
452 | ||
453 | * po/POTFILES.in: Regenerate. | |
454 | ||
7d64c587 AB |
455 | 2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com> |
456 | ||
457 | * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2 | |
458 | to allow the MIPS XPA ASE. | |
459 | (parse_mips_dis_option): Process the -Mxpa option. | |
460 | * mips-opc.c (XPA): New define. | |
461 | (mips_builtin_opcodes): Add MIPS XPA instructions and move the | |
462 | locations of the ctc0 and cfc0 instructions. | |
463 | ||
73589c9d CS |
464 | 2014-04-22 Christian Svensson <blue@cmd.nu> |
465 | ||
466 | * Makefile.am: Remove openrisc and or32 support. Add support for or1k. | |
467 | * configure.in: Likewise. | |
468 | * disassemble.c: Likewise. | |
469 | * or1k-asm.c: New file. | |
470 | * or1k-desc.c: New file. | |
471 | * or1k-desc.h: New file. | |
472 | * or1k-dis.c: New file. | |
473 | * or1k-ibld.c: New file. | |
474 | * or1k-opc.c: New file. | |
475 | * or1k-opc.h: New file. | |
476 | * or1k-opinst.c: New file. | |
477 | * Makefile.in: Regenerate. | |
478 | * configure: Regenerate. | |
479 | * openrisc-asm.c: Delete. | |
480 | * openrisc-desc.c: Delete. | |
481 | * openrisc-desc.h: Delete. | |
482 | * openrisc-dis.c: Delete. | |
483 | * openrisc-ibld.c: Delete. | |
484 | * openrisc-opc.c: Delete. | |
485 | * openrisc-opc.h: Delete. | |
486 | * or32-dis.c: Delete. | |
487 | * or32-opc.c: Delete. | |
488 | ||
2cf200a4 IT |
489 | 2014-04-04 Ilya Tocar <ilya.tocar@intel.com> |
490 | ||
491 | * i386-dis.c (rm_table): Add encls, enclu. | |
492 | * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS, | |
493 | (cpu_flags): Add CpuSE1. | |
494 | * i386-opc.h (enum): Add CpuSE1. | |
495 | (i386_cpu_flags): Add cpuse1. | |
496 | * i386-opc.tbl: Add encls, enclu. | |
497 | * i386-init.h: Regenerated. | |
498 | * i386-tbl.h: Likewise. | |
499 | ||
31c981bc AG |
500 | 2014-04-02 Anthony Green <green@moxielogic.com> |
501 | ||
502 | * moxie-opc.c (moxie_form1_opc_info): Add sign-extension | |
503 | instructions, sex.b and sex.s. | |
504 | ||
76dfed02 YZ |
505 | 2014-03-26 Jiong Wang <jiong.wang@arm.com> |
506 | ||
507 | * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined | |
508 | instructions. | |
509 | ||
5fc35d96 IT |
510 | 2014-03-20 Ilya Tocar <ilya.tocar@intel.com> |
511 | ||
512 | * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps, | |
513 | vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd, | |
514 | vscatterqps. | |
515 | * i386-tbl.h: Regenerate. | |
516 | ||
ec92c392 JM |
517 | 2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com> |
518 | ||
519 | * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and | |
520 | %hstick_enable added. | |
521 | ||
b8985e5c NC |
522 | 2014-03-19 Nick Clifton <nickc@redhat.com> |
523 | ||
524 | * rx-decode.opc (bwl): Allow for bogus instructions with a size | |
525 | field of 3. | |
b41c812c | 526 | (sbwl, ubwl, SCALE): Likewise. |
b8985e5c NC |
527 | * rx-decode.c: Regenerate. |
528 | ||
fa47fa92 AM |
529 | 2014-03-12 Alan Modra <amodra@gmail.com> |
530 | ||
531 | * Makefile.in: Regenerate. | |
532 | ||
4b95cf5c AM |
533 | 2014-03-05 Alan Modra <amodra@gmail.com> |
534 | ||
535 | Update copyright years. | |
536 | ||
cd0c81e9 | 537 | 2014-03-04 Heiher <r@hev.cc> |
4ba154f5 RS |
538 | |
539 | * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A. | |
540 | ||
079b5aec RS |
541 | 2014-03-04 Richard Sandiford <rdsandiford@googlemail.com> |
542 | ||
543 | * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions | |
544 | so that they come after the Loongson extensions. | |
545 | ||
2c80b753 AM |
546 | 2014-03-03 Alan Modra <amodra@gmail.com> |
547 | ||
548 | * i386-gen.c (process_copyright): Emit copyright notice on one line. | |
549 | ||
b721f1fa AM |
550 | 2014-02-28 Alan Modra <amodra@gmail.com> |
551 | ||
552 | * msp430-decode.c: Regenerate. | |
553 | ||
f17c8bfc YZ |
554 | 2014-02-27 Jiong Wang <jiong.wang@arm.com> |
555 | ||
556 | * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with | |
557 | FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle. | |
558 | ||
a58549dd YZ |
559 | 2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com> |
560 | ||
561 | * aarch64-opc.c (print_register_offset_address): Call | |
562 | get_int_reg_name to prepare the register name. | |
563 | ||
d6e9dd78 IT |
564 | 2014-02-25 Ilya Tocar <ilya.tocar@intel.com> |
565 | ||
566 | * i386-opc.tbl: Remove wrong variant of vcvtps2ph | |
567 | * i386-tbl.h: Regenerate. | |
568 | ||
569 | 2014-02-20 Ilya Tocar <ilya.tocar@intel.com> | |
dcf893b5 IT |
570 | |
571 | * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/ | |
572 | (cpu_flags): Add CpuPREFETCHWT1. | |
573 | * i386-init.h: Regenerate. | |
574 | * i386-opc.h (CpuPREFETCHWT1): New. | |
575 | (i386_cpu_flags): Add cpuprefetchwt1. | |
576 | * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1. | |
577 | * i386-tbl.h: Regenerate. | |
578 | ||
957d0955 IT |
579 | 2014-02-20 Ilya Tocar <ilya.tocar@intel.com> |
580 | ||
581 | * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD, | |
582 | to CpuAVX512F. | |
583 | * i386-tbl.h: Regenerate. | |
584 | ||
10632b79 L |
585 | 2014-02-19 H.J. Lu <hongjiu.lu@intel.com> |
586 | ||
587 | * i386-gen.c (output_cpu_flags): Don't output trailing space. | |
588 | (output_opcode_modifier): Likewise. | |
589 | (output_operand_type): Likewise. | |
590 | * i386-init.h: Regenerated. | |
591 | * i386-tbl.h: Likewise. | |
592 | ||
963f3586 IT |
593 | 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> |
594 | ||
595 | * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4, | |
596 | MOD_0FC7_REG_5. | |
597 | (PREFIX enum): Add PREFIX_0FAE_REG_7. | |
598 | (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5. | |
599 | (prefix_table): Add clflusopt. | |
600 | (mod_table): Add xrstors, xsavec, xsaves. | |
601 | * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS, | |
602 | CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS. | |
603 | (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC. | |
604 | * i386-init.h: Regenerate. | |
605 | * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves, | |
606 | xsaves64, xsavec, xsavec64. | |
607 | * i386-tbl.h: Regenerate. | |
608 | ||
c1c69e83 AM |
609 | 2014-02-10 Alan Modra <amodra@gmail.com> |
610 | ||
611 | * po/POTFILES.in: Regenerate. | |
612 | * po/opcodes.pot: Regenerate. | |
613 | ||
eaa9d1ad MZ |
614 | 2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> |
615 | Jan Beulich <jbeulich@suse.com> | |
616 | ||
617 | PR binutils/16490 | |
618 | * i386-dis.c (OP_E_memory): Fix shift computation for | |
619 | vex_vsib_q_w_dq_mode. | |
620 | ||
e2e6193d RM |
621 | 2014-01-09 Bradley Nelson <bradnelson@google.com> |
622 | Roland McGrath <mcgrathr@google.com> | |
623 | ||
624 | * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when | |
625 | last_rex_prefix is -1. | |
626 | ||
221fd5d5 L |
627 | 2014-01-08 H.J. Lu <hongjiu.lu@intel.com> |
628 | ||
629 | * i386-gen.c (process_copyright): Update copyright year to 2014. | |
630 | ||
b0b0c9fc MR |
631 | 2014-01-03 Maciej W. Rozycki <macro@codesourcery.com> |
632 | ||
633 | * nds32-asm.c (parse_operand): Fix out-of-range integer constant. | |
634 | ||
5fb776a6 | 635 | For older changes see ChangeLog-2013 |
252b5132 | 636 | \f |
5fb776a6 | 637 | Copyright (C) 2014 Free Software Foundation, Inc. |
752937aa NC |
638 | |
639 | Copying and distribution of this file, with or without modification, | |
640 | are permitted in any medium without royalty provided the copyright | |
641 | notice and this notice are preserved. | |
642 | ||
252b5132 | 643 | Local Variables: |
2f6d2f85 NC |
644 | mode: change-log |
645 | left-margin: 8 | |
646 | fill-column: 74 | |
252b5132 RH |
647 | version-control: never |
648 | End: |