Commit | Line | Data |
---|---|---|
0e336180 NC |
1 | 2008-02-14 Nick Clifton <nickc@redhat.com> |
2 | ||
3 | PR binutils/5524 | |
4 | * configure.in (SHARED_LIBADD): Select the correct host specific | |
5 | file extension for shared libraries. | |
6 | * configure: Regenerate. | |
7 | ||
b7240065 JB |
8 | 2008-02-13 Jan Beulich <jbeulich@novell.com> |
9 | ||
10 | * i386-opc.h (RegFlat): New. | |
11 | * i386-reg.tbl (flat): Add. | |
12 | * i386-tbl.h: Re-generate. | |
13 | ||
34b772a6 JB |
14 | 2008-02-13 Jan Beulich <jbeulich@novell.com> |
15 | ||
16 | * i386-dis.c (a_mode): New. | |
17 | (cond_jump_mode): Adjust. | |
18 | (Ma): Change to a_mode. | |
19 | (intel_operand_size): Handle a_mode. | |
20 | * i386-opc.tbl: Allow Dword and Qword for bound. | |
21 | * i386-tbl.h: Re-generate. | |
22 | ||
a60de03c JB |
23 | 2008-02-13 Jan Beulich <jbeulich@novell.com> |
24 | ||
25 | * i386-gen.c (process_i386_registers): Process new fields. | |
26 | * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to | |
27 | unsigned char. Add dw2_regnum and Dw2Inval. | |
28 | * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo | |
29 | register names. | |
30 | * i386-tbl.h: Re-generate. | |
31 | ||
f03fe4c1 L |
32 | 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> |
33 | ||
4b6bc8eb | 34 | * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS. |
f03fe4c1 L |
35 | * i386-init.h: Updated. |
36 | ||
475a2301 L |
37 | 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> |
38 | ||
39 | * i386-gen.c (cpu_flags): Add CpuXsave. | |
40 | ||
41 | * i386-opc.h (CpuXsave): New. | |
4b6bc8eb | 42 | (CpuLM): Updated. |
475a2301 L |
43 | (i386_cpu_flags): Add cpuxsave. |
44 | ||
45 | * i386-dis.c (MOD_0FAE_REG_4): New. | |
46 | (RM_0F01_REG_2): Likewise. | |
47 | (MOD_0FAE_REG_5): Updated. | |
48 | (RM_0F01_REG_3): Likewise. | |
49 | (reg_table): Use MOD_0FAE_REG_4. | |
50 | (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated | |
51 | for xrstor. | |
52 | (rm_table): Add RM_0F01_REG_2. | |
53 | ||
54 | * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv. | |
55 | * i386-init.h: Regenerated. | |
56 | * i386-tbl.h: Likewise. | |
57 | ||
595785c6 | 58 | 2008-02-11 Jan Beulich <jbeulich@novell.com> |
041179fc | 59 | |
595785c6 JB |
60 | * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove |
61 | Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz). | |
62 | * i386-tbl.h: Re-generate. | |
63 | ||
bb8541b9 L |
64 | 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> |
65 | ||
66 | PR 5715 | |
67 | * configure: Regenerated. | |
68 | ||
57b592a3 AN |
69 | 2008-02-04 Adam Nemet <anemet@caviumnetworks.com> |
70 | ||
71 | * mips-dis.c: Update copyright. | |
72 | (mips_arch_choices): Add Octeon. | |
73 | * mips-opc.c: Update copyright. | |
74 | (IOCT): New macro. | |
75 | (mips_builtin_opcodes): Add Octeon instruction synciobdma. | |
76 | ||
930bb4cf AM |
77 | 2008-01-29 Alan Modra <amodra@bigpond.net.au> |
78 | ||
79 | * ppc-opc.c: Support optional L form mtmsr. | |
80 | ||
82c18208 L |
81 | 2008-01-24 H.J. Lu <hongjiu.lu@intel.com> |
82 | ||
83 | * i386-dis.c (OP_E_extended): Handle r12 like rsp. | |
84 | ||
599121aa L |
85 | 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> |
86 | ||
87 | * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS. | |
88 | * i386-init.h: Regenerated. | |
89 | ||
80098f51 TG |
90 | 2008-01-23 Tristan Gingold <gingold@adacore.com> |
91 | ||
92 | * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr, | |
93 | ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr. | |
94 | ||
115c7c25 L |
95 | 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> |
96 | ||
97 | * i386-gen.c (cpu_flag_init): Remove CpuMMX2. | |
98 | (cpu_flags): Likewise. | |
99 | ||
100 | * i386-opc.h (CpuMMX2): Removed. | |
101 | (CpuSSE): Updated. | |
102 | ||
103 | * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA. | |
104 | * i386-init.h: Regenerated. | |
105 | * i386-tbl.h: Likewise. | |
106 | ||
6305a203 L |
107 | 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> |
108 | ||
109 | * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and | |
110 | CPU_SMX_FLAGS. | |
111 | * i386-init.h: Regenerated. | |
112 | ||
fd07a1c8 L |
113 | 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> |
114 | ||
115 | * i386-opc.tbl: Use Qword on movddup. | |
116 | * i386-tbl.h: Regenerated. | |
117 | ||
321fd21e L |
118 | 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> |
119 | ||
120 | * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax. | |
121 | * i386-tbl.h: Regenerated. | |
122 | ||
4ee52178 L |
123 | 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> |
124 | ||
125 | * i386-dis.c (Mx): New. | |
126 | (PREFIX_0FC3): Likewise. | |
127 | (PREFIX_0FC7_REG_6): Updated. | |
128 | (dis386_twobyte): Use PREFIX_0FC3. | |
129 | (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd. | |
130 | Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on | |
131 | movntss. | |
132 | ||
5c07affc L |
133 | 2008-01-14 H.J. Lu <hongjiu.lu@intel.com> |
134 | ||
135 | * i386-gen.c (opcode_modifiers): Add IntelSyntax. | |
136 | (operand_types): Add Mem. | |
137 | ||
138 | * i386-opc.h (IntelSyntax): New. | |
139 | * i386-opc.h (Mem): New. | |
140 | (Byte): Updated. | |
141 | (Opcode_Modifier_Max): Updated. | |
142 | (i386_opcode_modifier): Add intelsyntax. | |
143 | (i386_operand_type): Add mem. | |
144 | ||
145 | * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more | |
146 | instructions. | |
147 | ||
148 | * i386-reg.tbl: Add size for accumulator. | |
149 | ||
150 | * i386-init.h: Regenerated. | |
151 | * i386-tbl.h: Likewise. | |
152 | ||
0d6a2f58 L |
153 | 2008-01-13 H.J. Lu <hongjiu.lu@intel.com> |
154 | ||
155 | * i386-opc.h (Byte): Fix a typo. | |
156 | ||
7d5e4556 L |
157 | 2008-01-12 H.J. Lu <hongjiu.lu@intel.com> |
158 | ||
159 | PR gas/5534 | |
160 | * i386-gen.c (operand_type_init): Add Dword to | |
161 | OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64. | |
162 | (opcode_modifiers): Remove CheckSize, Byte, Word, Dword, | |
163 | Qword and Xmmword. | |
164 | (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte, | |
165 | Xmmword, Unspecified and Anysize. | |
166 | (set_bitfield): Make Mmword an alias of Qword. Make Oword | |
167 | an alias of Xmmword. | |
168 | ||
169 | * i386-opc.h (CheckSize): Removed. | |
170 | (Byte): Updated. | |
171 | (Word): Likewise. | |
172 | (Dword): Likewise. | |
173 | (Qword): Likewise. | |
174 | (Xmmword): Likewise. | |
175 | (FWait): Updated. | |
176 | (OTMax): Likewise. | |
177 | (i386_opcode_modifier): Remove checksize, byte, word, dword, | |
178 | qword and xmmword. | |
179 | (Fword): New. | |
180 | (TBYTE): Likewise. | |
181 | (Unspecified): Likewise. | |
182 | (Anysize): Likewise. | |
183 | (i386_operand_type): Add byte, word, dword, fword, qword, | |
184 | tbyte xmmword, unspecified and anysize. | |
185 | ||
186 | * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword, | |
187 | Tbyte, Xmmword, Unspecified and Anysize. | |
188 | ||
189 | * i386-reg.tbl: Add size for accumulator. | |
190 | ||
191 | * i386-init.h: Regenerated. | |
192 | * i386-tbl.h: Likewise. | |
193 | ||
b5b1fc4f L |
194 | 2008-01-10 H.J. Lu <hongjiu.lu@intel.com> |
195 | ||
196 | * i386-dis.c (REG_0F0E): Renamed to REG_0F0D. | |
197 | (REG_0F18): Updated. | |
198 | (reg_table): Updated. | |
199 | (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e. | |
200 | (twobyte_has_modrm): Set 1 for 0x19 to 0x1e. | |
201 | ||
50e8458f L |
202 | 2008-01-08 H.J. Lu <hongjiu.lu@intel.com> |
203 | ||
204 | * i386-gen.c (set_bitfield): Use fail () on error. | |
205 | ||
3d4d5afa L |
206 | 2008-01-08 H.J. Lu <hongjiu.lu@intel.com> |
207 | ||
208 | * i386-gen.c (lineno): New. | |
209 | (filename): Likewise. | |
210 | (set_bitfield): Report filename and line numer on error. | |
211 | (process_i386_opcodes): Set filename and update lineno. | |
212 | (process_i386_registers): Likewise. | |
213 | ||
e1d4d893 L |
214 | 2008-01-05 H.J. Lu <hongjiu.lu@intel.com> |
215 | ||
216 | * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to | |
217 | ATTSyntax. | |
218 | ||
219 | * i386-opc.h (IntelMnemonic): Renamed to .. | |
220 | (ATTSyntax): This | |
221 | (Opcode_Modifier_Max): Updated. | |
222 | (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax | |
223 | and intelsyntax. | |
224 | ||
225 | * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax | |
226 | on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp. | |
227 | * i386-tbl.h: Regenerated. | |
228 | ||
6f143e4d L |
229 | 2008-01-04 H.J. Lu <hongjiu.lu@intel.com> |
230 | ||
231 | * i386-gen.c: Update copyright to 2008. | |
232 | * i386-opc.h: Likewise. | |
233 | * i386-opc.tbl: Likewise. | |
234 | ||
235 | * i386-init.h: Regenerated. | |
236 | * i386-tbl.h: Likewise. | |
237 | ||
c6add537 L |
238 | 2008-01-04 H.J. Lu <hongjiu.lu@intel.com> |
239 | ||
240 | * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps, | |
241 | pextrb, pextrw, pinsrb, pinsrw and pmovmskb. | |
242 | * i386-tbl.h: Regenerated. | |
243 | ||
3629bb00 L |
244 | 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> |
245 | ||
246 | * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and | |
247 | CpuSSE4_2_Or_ABM. | |
248 | (cpu_flags): Likewise. | |
249 | ||
250 | * i386-opc.h (CpuSSE4_1_Or_5): Removed. | |
251 | (CpuSSE4_2_Or_ABM): Likewise. | |
252 | (CpuLM): Updated. | |
253 | (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm. | |
254 | ||
255 | * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and | |
256 | Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2 | |
257 | and CpuPadLock, respectively. | |
258 | * i386-init.h: Regenerated. | |
259 | * i386-tbl.h: Likewise. | |
260 | ||
24995bd6 L |
261 | 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> |
262 | ||
263 | * i386-gen.c (opcode_modifiers): Remove No_xSuf. | |
264 | ||
265 | * i386-opc.h (No_xSuf): Removed. | |
266 | (CheckSize): Updated. | |
267 | ||
268 | * i386-tbl.h: Regenerated. | |
269 | ||
e0329a22 L |
270 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
271 | ||
272 | * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to | |
273 | CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and | |
274 | CPU_SSE5_FLAGS. | |
275 | (cpu_flags): Add CpuSSE4_2_Or_ABM. | |
276 | ||
277 | * i386-opc.h (CpuSSE4_2_Or_ABM): New. | |
278 | (CpuLM): Updated. | |
279 | (i386_cpu_flags): Add cpusse4_2_or_abm. | |
280 | ||
281 | * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of | |
282 | CpuABM|CpuSSE4_2 on popcnt. | |
283 | * i386-init.h: Regenerated. | |
284 | * i386-tbl.h: Likewise. | |
285 | ||
f2a9c676 L |
286 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
287 | ||
288 | * i386-opc.h: Update comments. | |
289 | ||
d978b5be L |
290 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
291 | ||
292 | * i386-gen.c (opcode_modifiers): Use Qword instead of QWord. | |
293 | * i386-opc.h: Likewise. | |
294 | * i386-opc.tbl: Likewise. | |
295 | ||
582d5edd L |
296 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
297 | ||
298 | PR gas/5534 | |
299 | * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize, | |
300 | Byte, Word, Dword, QWord and Xmmword. | |
301 | ||
302 | * i386-opc.h (No_xSuf): New. | |
303 | (CheckSize): Likewise. | |
304 | (Byte): Likewise. | |
305 | (Word): Likewise. | |
306 | (Dword): Likewise. | |
307 | (QWord): Likewise. | |
308 | (Xmmword): Likewise. | |
309 | (FWait): Updated. | |
310 | (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word, | |
311 | Dword, QWord and Xmmword. | |
312 | ||
313 | * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is | |
314 | used. | |
315 | * i386-tbl.h: Regenerated. | |
316 | ||
3fe15143 MK |
317 | 2008-01-02 Mark Kettenis <kettenis@gnu.org> |
318 | ||
319 | * m88k-dis.c (instructions): Fix fcvt.* instructions. | |
320 | From Miod Vallat. | |
321 | ||
6c7ac64e | 322 | For older changes see ChangeLog-2007 |
252b5132 RH |
323 | \f |
324 | Local Variables: | |
2f6d2f85 NC |
325 | mode: change-log |
326 | left-margin: 8 | |
327 | fill-column: 74 | |
252b5132 RH |
328 | version-control: never |
329 | End: |