opcodes: blackfin: do not force align the PC
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
ed2c4879
MF
12014-08-13 Mike Frysinger <vapier@gentoo.org>
2
3 * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
4 (_print_insn_bfin): Add check for unaligned pc.
5
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62014-08-13 Mike Frysinger <vapier@gentoo.org>
7
8 * bfin-dis.c (ifetch): New function.
9 (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
10 -1 when it errors.
11
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MF
122014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
13
14 * micromips-opc.c (COD): Rename throughout to...
15 (CM): New define, update to use INSN_COPROC_MOVE.
16 (LCD): Rename throughout to...
17 (LC): New define, update to use INSN_LOAD_COPROC.
18 * mips-opc.c: Likewise.
19
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MF
202014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
21
22 * micromips-opc.c (COD, LCD) New macros.
23 (cfc1, ctc1): Remove FP_S attribute.
24 (dmfc1, mfc1, mfhc1): Add LCD attribute.
25 (dmtc1, mtc1, mthc1): Add COD attribute.
26 * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
27
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282014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
29 Alexander Ivchenko <alexander.ivchenko@intel.com>
30 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
31 Sergey Lega <sergey.s.lega@intel.com>
32 Anna Tikhonova <anna.tikhonova@intel.com>
33 Ilya Tocar <ilya.tocar@intel.com>
34 Andrey Turetskiy <andrey.turetskiy@intel.com>
35 Ilya Verbin <ilya.verbin@intel.com>
36 Kirill Yukhin <kirill.yukhin@intel.com>
37 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
38
39 * i386-dis-evex.h: Updated.
40 * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
41 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
42 PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
43 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
44 PREFIX_EVEX_0F3A67.
45 (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
46 VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
47 (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
48 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
49 EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
50 EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
51 EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
52 EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
53 EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
54 (prefix_table): Add entries for new instructions.
55 (vex_len_table): Ditto.
56 (vex_w_table): Ditto.
57 (OP_E_memory): Update xmmq_mode handling.
58 * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
59 (cpu_flags): Add CpuAVX512DQ.
60 * i386-init.h: Regenerared.
61 * i386-opc.h (CpuAVX512DQ): New.
62 (i386_cpu_flags): Add cpuavx512dq.
63 * i386-opc.tbl: Add AVX512DQ instructions.
64 * i386-tbl.h: Regenerate.
65
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662014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
67 Alexander Ivchenko <alexander.ivchenko@intel.com>
68 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
69 Sergey Lega <sergey.s.lega@intel.com>
70 Anna Tikhonova <anna.tikhonova@intel.com>
71 Ilya Tocar <ilya.tocar@intel.com>
72 Andrey Turetskiy <andrey.turetskiy@intel.com>
73 Ilya Verbin <ilya.verbin@intel.com>
74 Kirill Yukhin <kirill.yukhin@intel.com>
75 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
76
77 * i386-dis-evex.h: Add new instructions (prefixes bellow).
78 * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
79 (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
80 (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
81 PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
82 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
83 PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
84 PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
85 PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
86 PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
87 PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
88 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
89 PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
90 PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
91 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
92 PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
93 PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
94 PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
95 PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
96 PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
97 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
98 PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
99 PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
100 (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
101 VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
102 VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
103 VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
104 VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
105 VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
106 VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
107 VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
108 VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
109 VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
110 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
111 (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
112 EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
113 EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
114 EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
115 EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
116 EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
117 EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
118 (prefix_table): Add entries for new instructions.
119 (vex_table) : Ditto.
120 (vex_len_table): Ditto.
121 (vex_w_table): Ditto.
122 (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
123 mask_bd_mode handling.
124 (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
125 handling.
126 (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
127 handling.
128 (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
129 (OP_EX): Add dqw_swap_mode handling.
130 (OP_VEX): Add mask_bd_mode handling.
131 (OP_Mask): Add mask_bd_mode handling.
132 * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
133 (cpu_flags): Add CpuAVX512BW.
134 * i386-init.h: Regenerated.
135 * i386-opc.h (CpuAVX512BW): New.
136 (i386_cpu_flags): Add cpuavx512bw.
137 * i386-opc.tbl: Add AVX512BW instructions.
138 * i386-tbl.h: Regenerate.
139
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1402014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
141 Alexander Ivchenko <alexander.ivchenko@intel.com>
142 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
143 Sergey Lega <sergey.s.lega@intel.com>
144 Anna Tikhonova <anna.tikhonova@intel.com>
145 Ilya Tocar <ilya.tocar@intel.com>
146 Andrey Turetskiy <andrey.turetskiy@intel.com>
147 Ilya Verbin <ilya.verbin@intel.com>
148 Kirill Yukhin <kirill.yukhin@intel.com>
149 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
150
151 * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
152 * i386-tbl.h: Regenerate.
153
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1542014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
155 Alexander Ivchenko <alexander.ivchenko@intel.com>
156 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
157 Sergey Lega <sergey.s.lega@intel.com>
158 Anna Tikhonova <anna.tikhonova@intel.com>
159 Ilya Tocar <ilya.tocar@intel.com>
160 Andrey Turetskiy <andrey.turetskiy@intel.com>
161 Ilya Verbin <ilya.verbin@intel.com>
162 Kirill Yukhin <kirill.yukhin@intel.com>
163 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
164
165 * i386-dis.c (intel_operand_size): Support 128/256 length in
166 vex_vsib_q_w_dq_mode.
167 (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
168 * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
169 (cpu_flags): Add CpuAVX512VL.
170 * i386-init.h: Regenerated.
171 * i386-opc.h (CpuAVX512VL): New.
172 (i386_cpu_flags): Add cpuavx512vl.
173 (BROADCAST_1TO4, BROADCAST_1TO2): Define.
174 * i386-opc.tbl: Add AVX512VL instructions.
175 * i386-tbl.h: Regenerate.
176
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1772014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
178
179 * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
180 * or1k-opinst.c: Regenerate.
181
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1822014-07-08 Ilya Tocar <ilya.tocar@intel.com>
183
184 * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
185 (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
186
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1872014-07-04 Alan Modra <amodra@gmail.com>
188
189 * configure.ac: Rename from configure.in.
190 * Makefile.in: Regenerate.
191 * config.in: Regenerate.
192
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1932014-07-04 Alan Modra <amodra@gmail.com>
194
195 * configure.in: Include bfd/version.m4.
196 (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
197 (BFD_VERSION): Delete.
198 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
199 * configure: Regenerate.
200 * Makefile.in: Regenerate.
201
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2022014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
203 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
204 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
205 Soundararajan <Sounderarajan.D@atmel.com>
206
207 * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
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AM
208 (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
209 machine is not avrtiny.
f36e8886 210
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2112014-06-26 Philippe De Muyter <phdm@macqel.be>
212
213 * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
214 constants.
215
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2162014-06-12 Alan Modra <amodra@gmail.com>
217
218 * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
219 * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
220
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2212014-06-10 H.J. Lu <hongjiu.lu@intel.com>
222
223 * i386-dis.c (fwait_prefix): New.
224 (ckprefix): Set fwait_prefix.
225 (print_insn): Properly print prefixes before fwait.
226
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2272014-06-07 Alan Modra <amodra@gmail.com>
228
229 * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
230
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2312014-06-05 Joel Brobecker <brobecker@adacore.com>
232
233 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
234 bfd's development.sh.
235 * Makefile.in, configure: Regenerate.
236
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2372014-06-03 Nick Clifton <nickc@redhat.com>
238
239 * msp430-dis.c (msp430_doubleoperand): Use extension_word to
240 decide when extended addressing is being used.
241
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2422014-06-02 Eric Botcazou <ebotcazou@adacore.com>
243
244 * sparc-opc.c (cas): Disable for LEON.
245 (casl): Likewise.
246
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2472014-05-20 Alan Modra <amodra@gmail.com>
248
249 * m68k-dis.c: Don't include setjmp.h.
250
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2512014-05-09 H.J. Lu <hongjiu.lu@intel.com>
252
253 * i386-dis.c (ADDR16_PREFIX): Removed.
254 (ADDR32_PREFIX): Likewise.
255 (DATA16_PREFIX): Likewise.
256 (DATA32_PREFIX): Likewise.
257 (prefix_name): Updated.
258 (print_insn): Simplify data and address size prefixes processing.
259
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2602014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
261
262 * or1k-desc.c: Regenerated.
263 * or1k-desc.h: Likewise.
264 * or1k-opc.c: Likewise.
265 * or1k-opc.h: Likewise.
266 * or1k-opinst.c: Likewise.
267
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2682014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
269
270 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
271 (I34): New define.
272 (I36): New define.
273 (I66): New define.
274 (I68): New define.
275 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
276 mips64r5.
277 (parse_mips_dis_option): Update MSA and virtualization support to
9f445129 278 allow mips64r3 and mips64r5.
ae52f483 279
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2802014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
281
282 * mips-opc.c (G3): Remove I4.
283
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2842014-05-05 H.J. Lu <hongjiu.lu@intel.com>
285
286 PR binutils/16893
287 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
288 (end_codep): Likewise.
289 (mandatory_prefix): Likewise.
290 (active_seg_prefix): Likewise.
291 (ckprefix): Set active_seg_prefix to the active segment register
292 prefix.
293 (seg_prefix): Removed.
294 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
295 for prefix index. Ignore the index if it is invalid and the
296 mandatory prefix isn't required.
297 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
298 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
299 in used_prefixes here. Don't print unused prefixes. Check
300 active_seg_prefix for the active segment register prefix.
301 Restore the DFLAG bit in sizeflag if the data size prefix is
302 unused. Check the unused mandatory PREFIX_XXX prefixes
303 (append_seg): Only print the segment register which gets used.
304 (OP_E_memory): Check active_seg_prefix for the segment register
305 prefix.
306 (OP_OFF): Likewise.
307 (OP_OFF64): Likewise.
308 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
309
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3102014-05-02 H.J. Lu <hongjiu.lu@intel.com>
311
312 PR binutils/16886
313 * config.in: Regenerated.
314 * configure: Likewise.
315 * configure.in: Check if sigsetjmp is available.
316 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
317 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
318 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
319 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
320 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
321 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
322 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
323 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
324 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
325 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
326 (OPCODES_SIGSETJMP): Likewise.
327 (OPCODES_SIGLONGJMP): Likewise.
328 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
329 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
330 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
331 * xtensa-dis.c (dis_private): Replace jmp_buf with
332 OPCODES_SIGJMP_BUF.
333 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
334 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
335 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
336 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
337 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
338
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3392014-05-01 H.J. Lu <hongjiu.lu@intel.com>
340
341 PR binutils/16891
342 * i386-dis.c (print_insn): Handle prefixes before fwait.
343
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3442014-04-26 Alan Modra <amodra@gmail.com>
345
346 * po/POTFILES.in: Regenerate.
347
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3482014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
349
350 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
351 to allow the MIPS XPA ASE.
352 (parse_mips_dis_option): Process the -Mxpa option.
353 * mips-opc.c (XPA): New define.
354 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
355 locations of the ctc0 and cfc0 instructions.
356
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3572014-04-22 Christian Svensson <blue@cmd.nu>
358
359 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
360 * configure.in: Likewise.
361 * disassemble.c: Likewise.
362 * or1k-asm.c: New file.
363 * or1k-desc.c: New file.
364 * or1k-desc.h: New file.
365 * or1k-dis.c: New file.
366 * or1k-ibld.c: New file.
367 * or1k-opc.c: New file.
368 * or1k-opc.h: New file.
369 * or1k-opinst.c: New file.
370 * Makefile.in: Regenerate.
371 * configure: Regenerate.
372 * openrisc-asm.c: Delete.
373 * openrisc-desc.c: Delete.
374 * openrisc-desc.h: Delete.
375 * openrisc-dis.c: Delete.
376 * openrisc-ibld.c: Delete.
377 * openrisc-opc.c: Delete.
378 * openrisc-opc.h: Delete.
379 * or32-dis.c: Delete.
380 * or32-opc.c: Delete.
381
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3822014-04-04 Ilya Tocar <ilya.tocar@intel.com>
383
384 * i386-dis.c (rm_table): Add encls, enclu.
385 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
386 (cpu_flags): Add CpuSE1.
387 * i386-opc.h (enum): Add CpuSE1.
388 (i386_cpu_flags): Add cpuse1.
389 * i386-opc.tbl: Add encls, enclu.
390 * i386-init.h: Regenerated.
391 * i386-tbl.h: Likewise.
392
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3932014-04-02 Anthony Green <green@moxielogic.com>
394
395 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
396 instructions, sex.b and sex.s.
397
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3982014-03-26 Jiong Wang <jiong.wang@arm.com>
399
400 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
401 instructions.
402
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4032014-03-20 Ilya Tocar <ilya.tocar@intel.com>
404
405 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
406 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
407 vscatterqps.
408 * i386-tbl.h: Regenerate.
409
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4102014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
411
412 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
413 %hstick_enable added.
414
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4152014-03-19 Nick Clifton <nickc@redhat.com>
416
417 * rx-decode.opc (bwl): Allow for bogus instructions with a size
418 field of 3.
b41c812c 419 (sbwl, ubwl, SCALE): Likewise.
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420 * rx-decode.c: Regenerate.
421
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4222014-03-12 Alan Modra <amodra@gmail.com>
423
424 * Makefile.in: Regenerate.
425
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4262014-03-05 Alan Modra <amodra@gmail.com>
427
428 Update copyright years.
429
cd0c81e9 4302014-03-04 Heiher <r@hev.cc>
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431
432 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
433
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4342014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
435
436 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
437 so that they come after the Loongson extensions.
438
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4392014-03-03 Alan Modra <amodra@gmail.com>
440
441 * i386-gen.c (process_copyright): Emit copyright notice on one line.
442
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4432014-02-28 Alan Modra <amodra@gmail.com>
444
445 * msp430-decode.c: Regenerate.
446
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4472014-02-27 Jiong Wang <jiong.wang@arm.com>
448
449 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
450 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
451
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4522014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
453
454 * aarch64-opc.c (print_register_offset_address): Call
455 get_int_reg_name to prepare the register name.
456
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4572014-02-25 Ilya Tocar <ilya.tocar@intel.com>
458
459 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
460 * i386-tbl.h: Regenerate.
461
4622014-02-20 Ilya Tocar <ilya.tocar@intel.com>
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IT
463
464 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
465 (cpu_flags): Add CpuPREFETCHWT1.
466 * i386-init.h: Regenerate.
467 * i386-opc.h (CpuPREFETCHWT1): New.
468 (i386_cpu_flags): Add cpuprefetchwt1.
469 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
470 * i386-tbl.h: Regenerate.
471
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IT
4722014-02-20 Ilya Tocar <ilya.tocar@intel.com>
473
474 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
475 to CpuAVX512F.
476 * i386-tbl.h: Regenerate.
477
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4782014-02-19 H.J. Lu <hongjiu.lu@intel.com>
479
480 * i386-gen.c (output_cpu_flags): Don't output trailing space.
481 (output_opcode_modifier): Likewise.
482 (output_operand_type): Likewise.
483 * i386-init.h: Regenerated.
484 * i386-tbl.h: Likewise.
485
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4862014-02-12 Ilya Tocar <ilya.tocar@intel.com>
487
488 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
489 MOD_0FC7_REG_5.
490 (PREFIX enum): Add PREFIX_0FAE_REG_7.
491 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
492 (prefix_table): Add clflusopt.
493 (mod_table): Add xrstors, xsavec, xsaves.
494 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
495 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
496 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
497 * i386-init.h: Regenerate.
498 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
499 xsaves64, xsavec, xsavec64.
500 * i386-tbl.h: Regenerate.
501
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5022014-02-10 Alan Modra <amodra@gmail.com>
503
504 * po/POTFILES.in: Regenerate.
505 * po/opcodes.pot: Regenerate.
506
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5072014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
508 Jan Beulich <jbeulich@suse.com>
509
510 PR binutils/16490
511 * i386-dis.c (OP_E_memory): Fix shift computation for
512 vex_vsib_q_w_dq_mode.
513
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RM
5142014-01-09 Bradley Nelson <bradnelson@google.com>
515 Roland McGrath <mcgrathr@google.com>
516
517 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
518 last_rex_prefix is -1.
519
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L
5202014-01-08 H.J. Lu <hongjiu.lu@intel.com>
521
522 * i386-gen.c (process_copyright): Update copyright year to 2014.
523
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5242014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
525
526 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
527
5fb776a6 528For older changes see ChangeLog-2013
252b5132 529\f
5fb776a6 530Copyright (C) 2014 Free Software Foundation, Inc.
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531
532Copying and distribution of this file, with or without modification,
533are permitted in any medium without royalty provided the copyright
534notice and this notice are preserved.
535
252b5132 536Local Variables:
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537mode: change-log
538left-margin: 8
539fill-column: 74
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540version-control: never
541End:
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