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x86: fold certain AVX512 rotate and shift templates
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
ed438a93
JB		 12018-03-08 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
4 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
5 vpexpandd, vpexpandq): Fold AFX512VF templates.
6 * i386-tlb.h: Re-generate.
7
454172a9
JB		 82018-03-08 Jan Beulich <jbeulich@suse.com>
9
10 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
11 Fold 128- and 256-bit VEX-encoded templates.
12 * i386-tlb.h: Re-generate.
13
36824150
JB		 142018-03-08 Jan Beulich <jbeulich@suse.com>
15
16 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
17 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
18 vpexpandd, vpexpandq): Fold AVX512F templates.
19 * i386-tlb.h: Re-generate.
20
e7f5c0a9
JB		 212018-03-08 Jan Beulich <jbeulich@suse.com>
22
23 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
24 64-bit templates. Drop Disp<N>.
25 * i386-tlb.h: Re-generate.
26
25a4277f
JB		 272018-03-08 Jan Beulich <jbeulich@suse.com>
28
29 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
30 and 256-bit templates.
31 * i386-tlb.h: Re-generate.
32
d2224064
JB		 332018-03-08 Jan Beulich <jbeulich@suse.com>
34
35 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
36 * i386-tlb.h: Re-generate.
37
1b193f0b
JB		 382018-03-08 Jan Beulich <jbeulich@suse.com>
39
40 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
41 Drop NoAVX.
42 * i386-tlb.h: Re-generate.
43
f2f6a710
JB		 442018-03-08 Jan Beulich <jbeulich@suse.com>
45
46 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
47 * i386-tlb.h: Re-generate.
48
38e314eb
JB		 492018-03-08 Jan Beulich <jbeulich@suse.com>
50
51 * i386-gen.c (opcode_modifiers): Delete FloatD.
52 * i386-opc.h (FloatD): Delete.
53 (struct i386_opcode_modifier): Delete floatd.
54 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
55 FloatD by D.
56 * i386-tlb.h: Re-generate.
57
d53e6b98
JB		 582018-03-08 Jan Beulich <jbeulich@suse.com>
59
60 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
61
2907c2f5
JB		 622018-03-08 Jan Beulich <jbeulich@suse.com>
63
64 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
65 * i386-tlb.h: Re-generate.
66
73053c1f
JB		 672018-03-08 Jan Beulich <jbeulich@suse.com>
68
69 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
70 forms.
71 * i386-tlb.h: Re-generate.
72
52fe4420
AM		 732018-03-07 Alan Modra <amodra@gmail.com>
74
75 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
76 bfd_arch_rs6000.
77 * disassemble.h (print_insn_rs6000): Delete.
78 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
79 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
80 (print_insn_rs6000): Delete.
81
a6743a54
AM		 822018-03-03 Alan Modra <amodra@gmail.com>
83
84 * sysdep.h (opcodes_error_handler): Define.
85 (_bfd_error_handler): Declare.
86 * Makefile.am: Remove stray #.
87 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
88 EDIT" comment.
89 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
90 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
91 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
92 opcodes_error_handler to print errors. Standardize error messages.
93 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
94 and include opintl.h.
95 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
96 * i386-gen.c: Standardize error messages.
97 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
98 * Makefile.in: Regenerate.
99 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
100 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
101 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
102 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
103 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
104 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
105 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
106 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
107 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
108 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
109 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
110 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
111 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
112
8305403a
L		 1132018-03-01 H.J. Lu <hongjiu.lu@intel.com>
114
115 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
116 vpsub[bwdq] instructions.
117 * i386-tbl.h: Regenerated.
118
e184813f
AM		 1192018-03-01 Alan Modra <amodra@gmail.com>
120
121 * configure.ac (ALL_LINGUAS): Sort.
122 * configure: Regenerate.
123
5b616bef
TP		 1242018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
125
126 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
127 macro by assignements.
128
b6f8c7c4
L		 1292018-02-27 H.J. Lu <hongjiu.lu@intel.com>
130
131 PR gas/22871
132 * i386-gen.c (opcode_modifiers): Add Optimize.
133 * i386-opc.h (Optimize): New enum.
134 (i386_opcode_modifier): Add optimize.
135 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
136 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
137 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
138 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
139 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
140 vpxord and vpxorq.
141 * i386-tbl.h: Regenerated.
142
e95b887f
AM		 1432018-02-26 Alan Modra <amodra@gmail.com>
144
145 * crx-dis.c (getregliststring): Allocate a large enough buffer
146 to silence false positive gcc8 warning.
147
0bccfb29
JW		 1482018-02-22 Shea Levy <shea@shealevy.com>
149
150 * disassemble.c (ARCH_riscv): Define if ARCH_all.
151
6b6b6807
L		 1522018-02-22 H.J. Lu <hongjiu.lu@intel.com>
153
154 * i386-opc.tbl: Add {rex},
155 * i386-tbl.h: Regenerated.
156
75f31665
MR		 1572018-02-20 Maciej W. Rozycki <macro@mips.com>
158
159 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
160 (mips16_opcodes): Replace `M' with `m' for "restore".
161
e207bc53
TP		 1622018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
163
164 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
165
87993319
MR		 1662018-02-13 Maciej W. Rozycki <macro@mips.com>
167
168 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
169 variable to `function_index'.
170
68d20676
NC		 1712018-02-13 Nick Clifton <nickc@redhat.com>
172
173 PR 22823
174 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
175 about truncation of printing.
176
d2159fdc
HW		 1772018-02-12 Henry Wong <henry@stuffedcow.net>
178
179 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
180
f174ef9f
NC		 1812018-02-05 Nick Clifton <nickc@redhat.com>
182
183 * po/pt_BR.po: Updated Brazilian Portuguese translation.
184
be3a8dca
IT		 1852018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
186
187 * i386-dis.c (enum): Add pconfig.
188 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
189 (cpu_flags): Add CpuPCONFIG.
190 * i386-opc.h (enum): Add CpuPCONFIG.
191 (i386_cpu_flags): Add cpupconfig.
192 * i386-opc.tbl: Add PCONFIG instruction.
193 * i386-init.h: Regenerate.
194 * i386-tbl.h: Likewise.
195
3233d7d0
IT		 1962018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
197
198 * i386-dis.c (enum): Add PREFIX_0F09.
199 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
200 (cpu_flags): Add CpuWBNOINVD.
201 * i386-opc.h (enum): Add CpuWBNOINVD.
202 (i386_cpu_flags): Add cpuwbnoinvd.
203 * i386-opc.tbl: Add WBNOINVD instruction.
204 * i386-init.h: Regenerate.
205 * i386-tbl.h: Likewise.
206
e925c834
JW		 2072018-01-17 Jim Wilson <jimw@sifive.com>
208
209 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
210
d777820b
IT		 2112018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
212
213 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
214 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
215 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
216 (cpu_flags): Add CpuIBT, CpuSHSTK.
217 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
218 (i386_cpu_flags): Add cpuibt, cpushstk.
219 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
220 * i386-init.h: Regenerate.
221 * i386-tbl.h: Likewise.
222
f6efed01
NC		 2232018-01-16 Nick Clifton <nickc@redhat.com>
224
225 * po/pt_BR.po: Updated Brazilian Portugese translation.
226 * po/de.po: Updated German translation.
227
2721d702
JW		 2282018-01-15 Jim Wilson <jimw@sifive.com>
229
230 * riscv-opc.c (match_c_nop): New.
231 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
232
616dcb87
NC		 2332018-01-15 Nick Clifton <nickc@redhat.com>
234
235 * po/uk.po: Updated Ukranian translation.
236
3957a496
NC		 2372018-01-13 Nick Clifton <nickc@redhat.com>
238
239 * po/opcodes.pot: Regenerated.
240
769c7ea5
NC		 2412018-01-13 Nick Clifton <nickc@redhat.com>
242
243 * configure: Regenerate.
244
faf766e3
NC		 2452018-01-13 Nick Clifton <nickc@redhat.com>
246
247 2.30 branch created.
248
888a89da
IT		 2492018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
250
251 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
252 * i386-tbl.h: Regenerate.
253
cbda583a
JB		 2542018-01-10 Jan Beulich <jbeulich@suse.com>
255
256 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
257 * i386-tbl.h: Re-generate.
258
c9e92278
JB		 2592018-01-10 Jan Beulich <jbeulich@suse.com>
260
261 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
262 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
263 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
264 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
265 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
266 Disp8MemShift of AVX512VL forms.
267 * i386-tbl.h: Re-generate.
268
35fd2b2b
JW		 2692018-01-09 Jim Wilson <jimw@sifive.com>
270
271 * riscv-dis.c (maybe_print_address): If base_reg is zero,
272 then the hi_addr value is zero.
273
91d8b670
JG		 2742018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
275
276 * arm-dis.c (arm_opcodes): Add csdb.
277 (thumb32_opcodes): Add csdb.
278
be2e7d95
JG		 2792018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
280
281 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
282 * aarch64-asm-2.c: Regenerate.
283 * aarch64-dis-2.c: Regenerate.
284 * aarch64-opc-2.c: Regenerate.
285
704a705d
L		 2862018-01-08 H.J. Lu <hongjiu.lu@intel.com>
287
288 PR gas/22681
289 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
290 Remove AVX512 vmovd with 64-bit operands.
291 * i386-tbl.h: Regenerated.
292
35eeb78f
JW		 2932018-01-05 Jim Wilson <jimw@sifive.com>
294
295 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
296 jalr.
297
219d1afa
AM		 2982018-01-03 Alan Modra <amodra@gmail.com>
299
300 Update year range in copyright notice of all files.
301
1508bbf5
JB		 3022018-01-02 Jan Beulich <jbeulich@suse.com>
303
304 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
305 and OPERAND_TYPE_REGZMM entries.
306
1e563868 307For older changes see ChangeLog-2017
3499769a 308\f
1e563868 309Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 310
311Copying and distribution of this file, with or without modification,
312are permitted in any medium without royalty provided the copyright
313notice and this notice are preserved.
314
315Local Variables:
316mode: change-log
317left-margin: 8
318fill-column: 74
319version-control: never
320End:
GDB Binutils - Deliverables
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