[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
6fd8e7c2 L	1	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	2
	3	* Makefile.in: Regenerated with automake 1.11.6.
	4	* aclocal.m4: Likewise.
	5
4b0c052e AB	6	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	7
	8	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	9	instructions.
	10	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	11	(extract_nps_cmem_uimm16): New function.
	12	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	13
cb040366 AB	14	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	15
	16	* arc-dis.c (arc_insn_length): New function.
	17	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	18	(find_format): Change insnLen parameter to unsigned.
	19
accc0180 NC	20	2016-04-13 Nick Clifton <nickc@redhat.com>
	21
	22	PR target/19937
	23	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	24	the LD.B and LD.BU instructions.
	25
f36e33da CZ	26	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	27
	28	* arc-dis.c (find_format): Check for extension flags.
	29	(print_flags): New function.
	30	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	31	.extAuxRegister.
	32	* arc-ext.c (arcExtMap_coreRegName): Use
	33	LAST_EXTENSION_CORE_REGISTER.
	34	(arcExtMap_coreReadWrite): Likewise.
	35	(dump_ARC_extmap): Update printing.
	36	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	37	(arc_aux_regs): Add cpu field.
	38	* arc-regs.h: Add cpu field, lower case name aux registers.
	39
1c2e355e CZ	40	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	41
	42	* arc-tbl.h: Add rtsc, sleep with no arguments.
	43
b99747ae CZ	44	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	45
	46	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	47	Initialize.
	48	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	49	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	50	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	51	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	52	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	53	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	54	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	55	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	56	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	57	(arc_opcode arc_opcodes): Null terminate the array.
	58	(arc_num_opcodes): Remove.
	59	* arc-ext.h (INSERT_XOP): Define.
	60	(extInstruction_t): Likewise.
	61	(arcExtMap_instName): Delete.
	62	(arcExtMap_insn): New function.
	63	(arcExtMap_genOpcode): Likewise.
	64	* arc-ext.c (ExtInstruction): Remove.
	65	(create_map): Zero initialize instruction fields.
	66	(arcExtMap_instName): Remove.
	67	(arcExtMap_insn): New function.
	68	(dump_ARC_extmap): More info while debuging.
	69	(arcExtMap_genOpcode): New function.
	70	* arc-dis.c (find_format): New function.
	71	(print_insn_arc): Use find_format.
	72	(arc_get_disassembler): Enable dump_ARC_extmap only when
	73	debugging.
	74
92708cec MR	75	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	76
	77	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	78	instruction bits out.
	79
a42a4f84 AB	80	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	81
	82	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	83	* arc-opc.c (arc_flag_operands): Add new flags.
	84	(arc_flag_classes): Add new classes.
	85
1328504b AB	86	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	87
	88	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	89
820f03ff AB	90	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	91
	92	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	93	encode1, rflt, crc16, and crc32 instructions.
	94	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	95	(arc_flag_classes): Add C_NPS_R.
	96	(insert_nps_bitop_size_2b): New function.
	97	(extract_nps_bitop_size_2b): Likewise.
	98	(insert_nps_bitop_uimm8): Likewise.
	99	(extract_nps_bitop_uimm8): Likewise.
	100	(arc_operands): Add new operand entries.
	101
8ddf6b2a CZ	102	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	103
b99747ae CZ	104	* arc-regs.h: Add a new subclass field. Add double assist
	105	accumulator register values.
	106	* arc-tbl.h: Use DPA subclass to mark the double assist
	107	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	108	* arc-opc.c (RSP): Define instead of SP.
	109	(arc_aux_regs): Add the subclass field.
8ddf6b2a	110
589a7d88 JW	111	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	112
	113	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	114
0a191de9	115	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	116
	117	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	118	NPS_R_SRC1.
	119
0a106562 AB	120	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	121
	122	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	123	issues. No functional changes.
	124
bd05ac5f CZ	125	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	126
b99747ae CZ	127	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	128	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	129	(RTT): Remove duplicate.
	130	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	131	(PCT_CONFIG*): Remove.
	132	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	133
9885948f CZ	134	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	135
b99747ae	136	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	137
f2dd8838 CZ	138	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	139
b99747ae CZ	140	* arc-tbl.h (invld07): Remove.
	141	* arc-ext-tbl.h: New file.
	142	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	143	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	144
0d2f91fe JK	145	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	146
	147	Fix -Wstack-usage warnings.
	148	* aarch64-dis.c (print_operands): Substitute size.
	149	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	150
a6b71f42 JM	151	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	152
	153	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	154	to get a proper diagnostic when an invalid ASR register is used.
	155
9780e045 NC	156	2016-03-22 Nick Clifton <nickc@redhat.com>
	157
	158	* configure: Regenerate.
	159
e23e8ebe AB	160	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	161
	162	* arc-nps400-tbl.h: New file.
	163	* arc-opc.c: Add top level comment.
	164	(insert_nps_3bit_dst): New function.
	165	(extract_nps_3bit_dst): New function.
	166	(insert_nps_3bit_src2): New function.
	167	(extract_nps_3bit_src2): New function.
	168	(insert_nps_bitop_size): New function.
	169	(extract_nps_bitop_size): New function.
	170	(arc_flag_operands): Add nps400 entries.
	171	(arc_flag_classes): Add nps400 entries.
	172	(arc_operands): Add nps400 entries.
	173	(arc_opcodes): Add nps400 include.
	174
1ae8ab47 AB	175	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	176
	177	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	178	the new class enum values.
	179
8699fc3e AB	180	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	181
	182	* arc-dis.c (print_insn_arc): Handle nps400.
	183
24740d83 AB	184	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	185
	186	* arc-opc.c (BASE): Delete.
	187
8678914f NC	188	2016-03-18 Nick Clifton <nickc@redhat.com>
	189
	190	PR target/19721
	191	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	192	of MOV insn that aliases an ORR insn.
	193
cc933301 JW	194	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	195
	196	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	197
f86f5863 TS	198	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	199
	200	* mcore-opc.h: Add const qualifiers.
	201	* microblaze-opc.h (struct op_code_struct): Likewise.
	202	* sh-opc.h: Likewise.
	203	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	204	(tic4x_print_op): Likewise.
	205
62de1c63 AM	206	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	207
d11698cd	208	* or1k-desc.h: Regenerate.
62de1c63	209	* fr30-ibld.c: Regenerate.
c697cf0b	210	* rl78-decode.c: Regenerate.
62de1c63	211
020efce5 NC	212	2016-03-01 Nick Clifton <nickc@redhat.com>
	213
	214	PR target/19747
	215	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	216
b0c11777 RL	217	2016-02-24 Renlin Li <renlin.li@arm.com>
	218
	219	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	220	(print_insn_coprocessor): Support fp16 instructions.
	221
3e309328 RL	222	2016-02-24 Renlin Li <renlin.li@arm.com>
	223
	224	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	225	vminnm, vrint(mpna).
	226
8afc7bea RL	227	2016-02-24 Renlin Li <renlin.li@arm.com>
	228
	229	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	230	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	231
4fd7268a L	232	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	233
	234	* i386-dis.c (print_insn): Parenthesize expression to prevent
	235	truncated addresses.
	236	(OP_J): Likewise.
	237
4670103e CZ	238	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	239	Janek van Oirschot <jvanoirs@synopsys.com>
	240
b99747ae CZ	241	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	242	variable.
4670103e	243
c1d9289f NC	244	2016-02-04 Nick Clifton <nickc@redhat.com>
	245
	246	PR target/19561
	247	* msp430-dis.c (print_insn_msp430): Add a special case for
	248	decoding an RRC instruction with the ZC bit set in the extension
	249	word.
	250
a143b004 AB	251	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	252
	253	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	254	* epiphany-ibld.c: Regenerate.
	255	* fr30-ibld.c: Regenerate.
	256	* frv-ibld.c: Regenerate.
	257	* ip2k-ibld.c: Regenerate.
	258	* iq2000-ibld.c: Regenerate.
	259	* lm32-ibld.c: Regenerate.
	260	* m32c-ibld.c: Regenerate.
	261	* m32r-ibld.c: Regenerate.
	262	* mep-ibld.c: Regenerate.
	263	* mt-ibld.c: Regenerate.
	264	* or1k-ibld.c: Regenerate.
	265	* xc16x-ibld.c: Regenerate.
	266	* xstormy16-ibld.c: Regenerate.
	267
b89807c6 AB	268	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	269
	270	* epiphany-dis.c: Regenerated from latest cpu files.
	271
d8c823c8 MM	272	2016-02-01 Michael McConville <mmcco@mykolab.com>
	273
	274	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	275	test bit.
	276
5bc5ae88 RL	277	2016-01-25 Renlin Li <renlin.li@arm.com>
	278
	279	* arm-dis.c (mapping_symbol_for_insn): New function.
	280	(find_ifthen_state): Call mapping_symbol_for_insn().
	281
0bff6e2d MW	282	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	283
	284	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	285	of MSR UAO immediate operand.
	286
100b4f2e MR	287	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	288
	289	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	290	instruction support.
	291
5c14705f AM	292	2016-01-17 Alan Modra <amodra@gmail.com>
	293
	294	* configure: Regenerate.
	295
4d82fe66 NC	296	2016-01-14 Nick Clifton <nickc@redhat.com>
	297
	298	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	299	instructions that can support stack pointer operations.
	300	* rl78-decode.c: Regenerate.
	301	* rl78-dis.c: Fix display of stack pointer in MOVW based
	302	instructions.
	303
651657fa MW	304	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	305
	306	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	307	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	308	erxtatus_el1 and erxaddr_el1.
	309
105bde57 MW	310	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	311
	312	* arm-dis.c (arm_opcodes): Add "esb".
	313	(thumb_opcodes): Likewise.
	314
afa8d405 PB	315	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	316
	317	* ppc-opc.c <xscmpnedp>: Delete.
	318	<xvcmpnedp>: Likewise.
	319	<xvcmpnedp.>: Likewise.
	320	<xvcmpnesp>: Likewise.
	321	<xvcmpnesp.>: Likewise.
	322
83c3256e AS	323	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	324
	325	PR gas/13050
	326	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	327	addition to ISA_A.
	328
6f2750fe AM	329	2016-01-01 Alan Modra <amodra@gmail.com>
	330
	331	Update year range in copyright notice of all files.
	332
3499769a AM	333	For older changes see ChangeLog-2015
	334	\f
	335	Copyright (C) 2016 Free Software Foundation, Inc.
	336
	337	Copying and distribution of this file, with or without modification,
	338	are permitted in any medium without royalty provided the copyright
	339	notice and this notice are preserved.
	340
	341	Local Variables:
	342	mode: change-log
	343	left-margin: 8
	344	fill-column: 74
	345	version-control: never
	346	End: