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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12016-02-24 Renlin Li <renlin.li@arm.com>
2
3 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
4 (print_insn_coprocessor): Support fp16 instructions.
5
3e309328
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62016-02-24 Renlin Li <renlin.li@arm.com>
7
8 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
9 vminnm, vrint(mpna).
10
8afc7bea
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112016-02-24 Renlin Li <renlin.li@arm.com>
12
13 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
14 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
15
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162016-02-15 H.J. Lu <hongjiu.lu@intel.com>
17
18 * i386-dis.c (print_insn): Parenthesize expression to prevent
19 truncated addresses.
20 (OP_J): Likewise.
21
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222016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
23 Janek van Oirschot <jvanoirs@synopsys.com>
24
25 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
26 variable.
27
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282016-02-04 Nick Clifton <nickc@redhat.com>
29
30 PR target/19561
31 * msp430-dis.c (print_insn_msp430): Add a special case for
32 decoding an RRC instruction with the ZC bit set in the extension
33 word.
34
a143b004
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352016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
36
37 * cgen-ibld.in (insert_normal): Rework calculation of shift.
38 * epiphany-ibld.c: Regenerate.
39 * fr30-ibld.c: Regenerate.
40 * frv-ibld.c: Regenerate.
41 * ip2k-ibld.c: Regenerate.
42 * iq2000-ibld.c: Regenerate.
43 * lm32-ibld.c: Regenerate.
44 * m32c-ibld.c: Regenerate.
45 * m32r-ibld.c: Regenerate.
46 * mep-ibld.c: Regenerate.
47 * mt-ibld.c: Regenerate.
48 * or1k-ibld.c: Regenerate.
49 * xc16x-ibld.c: Regenerate.
50 * xstormy16-ibld.c: Regenerate.
51
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522016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
53
54 * epiphany-dis.c: Regenerated from latest cpu files.
55
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562016-02-01 Michael McConville <mmcco@mykolab.com>
57
58 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
59 test bit.
60
5bc5ae88
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612016-01-25 Renlin Li <renlin.li@arm.com>
62
63 * arm-dis.c (mapping_symbol_for_insn): New function.
64 (find_ifthen_state): Call mapping_symbol_for_insn().
65
0bff6e2d
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662016-01-20 Matthew Wahab <matthew.wahab@arm.com>
67
68 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
69 of MSR UAO immediate operand.
70
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712016-01-18 Maciej W. Rozycki <macro@imgtec.com>
72
73 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
74 instruction support.
75
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762016-01-17 Alan Modra <amodra@gmail.com>
77
78 * configure: Regenerate.
79
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802016-01-14 Nick Clifton <nickc@redhat.com>
81
82 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
83 instructions that can support stack pointer operations.
84 * rl78-decode.c: Regenerate.
85 * rl78-dis.c: Fix display of stack pointer in MOVW based
86 instructions.
87
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882016-01-14 Matthew Wahab <matthew.wahab@arm.com>
89
90 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
91 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
92 erxtatus_el1 and erxaddr_el1.
93
105bde57
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942016-01-12 Matthew Wahab <matthew.wahab@arm.com>
95
96 * arm-dis.c (arm_opcodes): Add "esb".
97 (thumb_opcodes): Likewise.
98
afa8d405
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992016-01-11 Peter Bergner <bergner@vnet.ibm.com>
100
101 * ppc-opc.c <xscmpnedp>: Delete.
102 <xvcmpnedp>: Likewise.
103 <xvcmpnedp.>: Likewise.
104 <xvcmpnesp>: Likewise.
105 <xvcmpnesp.>: Likewise.
106
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1072016-01-08 Andreas Schwab <schwab@linux-m68k.org>
108
109 PR gas/13050
110 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
111 addition to ISA_A.
112
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1132016-01-01 Alan Modra <amodra@gmail.com>
114
115 Update year range in copyright notice of all files.
116
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117For older changes see ChangeLog-2015
118\f
119Copyright (C) 2016 Free Software Foundation, Inc.
120
121Copying and distribution of this file, with or without modification,
122are permitted in any medium without royalty provided the copyright
123notice and this notice are preserved.
124
125Local Variables:
126mode: change-log
127left-margin: 8
128fill-column: 74
129version-control: never
130End:
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