2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
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12009-11-18 Sebastian Pop <sebastian.pop@amd.com>
2
3 * i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
4 (VEX_LEN_XOP_08_A1): Removed.
5 (xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
6 VEX_LEN_XOP_08_A1.
7 (vex_len_table): Same.
8 * i386-gen.c (CPU_CVT16_FLAGS): Removed.
9 (cpu_flags): Remove field for CpuCVT16.
10 * i386-opc.h (CpuCVT16): Removed.
11 (i386_cpu_flags): Remove bitfield cpucvt16.
12 (i386-opc.tbl): Remove CVT16 instructions.
13 * i386-init.h: Regenerated.
14 * i386-tbl.h: Regenerated.
15
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162009-11-17 Sebastian Pop <sebastian.pop@amd.com>
17 Quentin Neill <quentin.neill@amd.com>
18
19 * i386-dis.c (OP_Vex_2src_1): New.
20 (OP_Vex_2src_2): New.
21 (Vex_2src_1): New.
22 (Vex_2src_2): New.
23 (XOP_08): Added.
24 (VEX_LEN_XOP_08_A0): Added.
25 (VEX_LEN_XOP_08_A1): Added.
26 (VEX_LEN_XOP_09_80): Added.
27 (VEX_LEN_XOP_09_81): Added.
28 (xop_table): Added an entry for XOP_08. Handle xop instructions.
29 (vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
30 VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
31 (get_valid_dis386): Handle XOP_08.
32 (OP_Vex_2src): New.
33 * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
34 (cpu_flags): Add CpuXOP and CpuCVT16.
35 (opcode_modifiers): Add XOP08, Vex2Sources.
36 * i386-opc.h (CpuXOP): Added.
37 (CpuCVT16): Added.
38 (i386_cpu_flags): Add cpuxop and cpucvt16.
39 (XOP08): Added.
40 (Vex2Sources): Added.
41 (i386_opcode_modifier): Add xop08, vex2sources.
42 * i386-opc.tbl: Add entries for XOP and CVT16 instructions.
43 * i386-init.h: Regenerated.
44 * i386-tbl.h: Regenerated.
45
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462009-11-17 Nick Clifton <nickc@redhat.com>
47
48 PR binutils/10924
49 * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
50 instruction variants. Add pattern for MRS variant that was being
51 confused with CMP.
52 (arm_decode_shift): Place error message in a comment.
53 (print_insn_arm): Note that writing back to the PC is
54 unpredictable.
55 Only print 'p' variants of cmp/cmn/teq/tst instructions if
56 decoding for pre-V6 architectures.
57
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582009-11-17 Edward Nevill <edward.nevill@arm.com>
59
60 * arm-dis.c (print_insn_thumb32): Handle undefined instruction.
61
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622009-11-14 Doug Evans <dje@sebabeach.org>
63
64 * Makefile.am (stamp-xc16x): Use ../cpu/xc16x.cpu instead of
65 ../cgen/cpu.
66 * Makefile.in: Regenerate.
67
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682009-11-13 H.J. Lu <hongjiu.lu@intel.com>
69
70 * i386-dis.c (OP_E_extended): Removed.
71
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722009-11-13 H.J. Lu <hongjiu.lu@intel.com>
73
74 * i386-dis.c (print_insn): Check rex_ignored.
75
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762009-11-13 H.J. Lu <hongjiu.lu@intel.com>
77
78 * i386-dis.c (ckprefix): Updated to return 0 if number of
79 prefixes > 14 and record the last position for each prefix.
80 (lock_prefix): Removed.
81 (data_prefix): Likewise.
82 (addr_prefix): Likewise.
83 (repz_prefix): Likewise.
84 (repnz_prefix): Likewise.
85 (last_lock_prefix): New.
86 (last_repz_prefix): Likewise.
87 (last_repnz_prefix): Likewise.
88 (last_data_prefix): Likewise.
89 (last_addr_prefix): Likewise.
90 (last_rex_prefix): Likewise.
91 (last_seg_prefix): Likewise.
92 (MAX_CODE_LENGTH): Likewise.
93 (ADDR16_PREFIX): Likewise.
94 (ADDR32_PREFIX): Likewise.
95 (DATA16_PREFIX): Likewise.
96 (DATA32_PREFIX): Likewise.
97 (REP_PREFIX): Likewise.
98 (seg_prefix): Likewise.
99 (all_prefixes): Change size to MAX_CODE_LENGTH - 1.
100 (prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
101 DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
102 (get_valid_dis386): Updated.
103 (OP_C): Likewise.
104 (OP_Monitor): Likewise.
105 (REP_Fixup): Likewise.
106 (print_insn): Display all prefixes.
107 (putop): Set PREFIX_DATA on used_prefixes only if it is used.
108 (intel_operand_size): Likewise.
109 (OP_E_register): Likewise.
110 (OP_G): Likewise.
111 (OP_REG): Likewise.
112 (OP_IMREG): Likewise.
113 (OP_I): Likewise.
114 (OP_I64): Likewise.
115 (OP_sI): Likewise.
116 (CRC32_Fixup): Likewise.
117 (MOVBE_Fixup): Likewise.
118 (OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
119 in 16bit mode.
120 (OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
121 used_prefixes only if it is used.
122
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1232009-11-12 H.J. Lu <hongjiu.lu@intel.com>
124
125 * i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
126 or, sbb, sub, xor and xchg with register only operands.
127 * i386-tbl.h: Regenerated.
128
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1292009-11-12 H.J. Lu <hongjiu.lu@intel.com>
130
131 * i386-gen.c (opcode_modifiers): Add IsLockable.
132
133 * i386-opc.h (IsLockable): New.
134 (i386_opcode_modifier): Add islockable.
135
136 * i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
137 bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
138 xor, xadd and xchg.
139 * i386-tbl.h: Regenerated.
140
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1412009-11-12 Daniel Jacobowitz <dan@codesourcery.com>
142
143 * arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove
144 generic coprocessor instructions for FPA loads and stores.
145 (print_insn_coprocessor): Remove %C support. Display address for
146 PC-relative offsets in %A.
147
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1482009-11-11 H.J. Lu <hongjiu.lu@intel.com>
149
150 * i386-dis.c (all_prefixes): New.
151 (ckprefix): Set all_prefixes.
152 (print_insn): Print all_prefixes instead of lock_prefix,
153 repz_prefix, repnz_prefix, addr_prefix and data_prefix.
154
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1552009-11-11 Nick Clifton <nickc@redhat.com>
156
157 PR binutils/10924
158 * arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
159 (print_insn_arm): Extend %s format control code to check for
160 unpredictable addressing modes. Add support for %S format control
161 code which suppresses this check.
162 (W_BIT, I_BIT, U_BIT, P_BIT): New macros.
163 (WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
164 PRE_BIT_SET): New macros.
165 (print_insn_coprocessor): Use the new macros instead of magic
166 constants.
167 (print_arm_address): Likewise.
168 (pirnt_insn_arm): Likewise.
169 (print_insn_thumb32): Likewise.
170
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1712009-11-11 Nick Clifton <nickc@redhat.com>
172
173 * po/id.po: Updated Indonesian translation.
174
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1752009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com>
176
177 * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
178
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1792009-11-06 Sebastian Pop <sebastian.pop@amd.com>
180
181 * i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
182 reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
183 B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
184 the xop_table.
185 (get_valid_dis386): Removed unused condition (from cut/n/paste) for
186 XOP instructions.
187
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1882009-11-05 Sebastian Pop <sebastian.pop@amd.com>
189 Quentin Neill <quentin.neill@amd.com>
190
191 * opcodes/i386-dis.c (OP_LWPCB_E): New.
192 (OP_LWP_E): New.
193 (OP_LWP_I): New.
194 (USE_XOP_8F_TABLE): New.
195 (XOP_8F_TABLE): New.
196 (REG_XOP_LWPCB): New.
197 (REG_XOP_LWP): New.
198 (XOP_09): New.
199 (XOP_0A): New.
200 (reg_table): Redirect REG_8F to XOP_8F_TABLE.
201 Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
202 (xop_table): New.
203 (get_valid_dis386): Handle USE_XOP_8F_TABLE.
204 Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
205 to access to the vex_table.
206 (OP_LWPCB_E): New.
207 (OP_LWP_E): New.
208 (OP_LWP_I): New.
209 * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
210 (cpu_flags): Add CpuLWP.
211 (opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
212 * opcodes/i386-opc.h (CpuLWP): New.
213 (i386_cpu_flags): Add bit cpulwp.
214 (VexLWP): New.
215 (XOP09): New.
216 (XOP0A): New.
217 (i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
218 * opcodes/i386-opc.tbl (llwpcb): Added.
219 (lwpval): Added.
220 (lwpins): Added.
221
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2222009-11-04 DJ Delorie <dj@redhat.com>
223
224 * rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
225 (mvtcp, mvfcp, opecp): Remove.
226 * rx-decode.c: Regenerate.
227 * rx-dis.c (cpen): Remove.
228
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2292009-11-03 Doug Evans <dje@sebabeach.org>
230
231 * m32c-desc.c: Regenerate.
232 * mep-desc.c: Regenerate.
233
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2342009-11-02 Paul Brook <paul@codesourcery.com>
235
236 * arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
237 Add VFPv4 instructions.
238
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2392009-10-29 Sebastian Pop <sebastian.pop@amd.com>
240
241 * i386-dis.c (OP_VEX_FMA): Removed.
242 (VexFMA): Removed.
243 (Vex128FMA): Removed.
244 (prefix_table): First source operand of FMA4 insns is decoded
245 with Vex not with VexFMA.
246 (OP_EX_VexW): Second source operand is decoded with get_vex_imm8
247 when vex.w is set. Third source operand is decoded with
248
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2492009-10-27 Alan Modra <amodra@bigpond.net.au>
250
251 * Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.
252 * Makefile.in: Regenerate.
253 * po/POTFILES.in: Regenerate.
254
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2552009-10-23 Doug Evans <dje@sebabeach.org>
256
257 * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h.
258 * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h.
259 * cgen-bitset.c: Update.
260 * fr30-desc.h: Regenerate.
261 * frv-desc.h: Regenerate.
262 * ip2k-desc.h: Regenerate.
263 * iq2000-desc.h: Regenerate.
264 * lm32-desc.h: Regenerate.
265 * m32c-desc.h: Regenerate.
266 * m32c-opc.h: Regenerate.
267 * m32r-desc.h: Regenerate.
268 * mep-desc.h: Regenerate.
269 * mt-desc.h: Regenerate.
270 * openrisc-desc.h: Regenerate.
271 * xc16x-desc.h: Regenerate.
272 * xstormy16-desc.h: Regenerate.
273
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2742009-10-22 DJ Delorie <dj@redhat.com>
275
276 * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
277 * rx-decode.c: Regenerated.
278
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2792009-10-20 H.J. Lu <hongjiu.lu@intel.com>
280
281 PR gas/10775
282 * i386-dis.c: Document LB, LS and LV macros.
283 (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
284 with the 64-bit displacement or immediate operand.
285 (putop): Handle LB, LS and LV macros.
286
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2872009-10-18 Doug Evans <dje@sebabeach.org>
288
289 * lm32-opinst.c: Regenerate.
290 * m32c-desc.c: Regenerate.
291 * m32r-opinst.c: Regenerate.
292 * openrisc-ibld.c: Regenerate.
293 * xc16x-desc.c: Regenerate.
294 * xc16x-desc.h: Regenerate.
295
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2962009-10-17 Doug Evans <dje@sebabeach.org>
297
298 * Makefile.am (CGEN_CPUS): Add iq2000, lm32.
299 (FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are
300 sorted alphabetically.
301 (stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen
302 stamp-* rules are sorted alphabetically.
303 * Makefile.in: Regenerate.
304
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3052009-10-16 H.J. Lu <hongjiu.lu@intel.com>
306
307 * i386-opc.h: Use enum instead of nested macros.
308
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3092009-10-16 H.J. Lu <hongjiu.lu@intel.com>
310
311 * i386-dis.c: Simplify enums.
312
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3132009-10-15 H.J. Lu <hongjiu.lu@intel.com>
314 Ineiev <ineiev@gmail.com>
315
316 PR binutils/10767
317 * i386-dis.c: Use enum instead of nested macros.
318
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3192009-10-15 H.J. Lu <hongjiu.lu@intel.com>
320
321 * i386-dis.c (MAX_BYTEMODE): Removed.
322
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3232009-10-14 Tomas Hurka <tom@hukatronic.cz>
324
325 PR 969
326 * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
327
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3282009-10-13 H.J. Lu <hongjiu.lu@intel.com>
329
330 * i386-dis.c (print_insn): Always clear need_vex, need_vex_reg
331 and vex_w_done.
332
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3332009-10-07 Michael Eager <eager@eagercon.com>
334
55b126d4 335 * microblaze-dis.c: Add include for microblaze-dis.h,
ef299415 336 eliminate local extern decls.
55b126d4 337 * microblaze-dis.h: New.
ef299415 338
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3392009-10-06 Nick Clifton <nickc@redhat.com>
340
341 * po/fi.po: Updated Finnish translation.
342
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3432009-10-03 Andreas Schwab <schwab@linux-m68k.org>
344
345 * opc2c.c: Include "libiberty.h" and <errno.h>.
346 (orig_filename): Constify.
347 (dump_lines): Fix line number directive.
348 (main): Set orig_filename to basename of input file. Use
349 xstrerror.
350
351 * Makefile.am (rx-dis.lo): Remove explicit dependencies.
352 ($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD)
353 instead of $(EXEEXT).
354 (opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use
355 $(LINK_FOR_BUILD). Link with libiberty.
356 (MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD).
357 (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c.
358 * Makefile.in: Regenerated.
359 * rx-decode.c: Regenerated.
360
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3612009-10-03 Paul Reed <paulreed@paddedcell.com>
362
363 * arm-dis.c (print_insn): Check symtab_size not *symtab.
364
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3652009-10-02 H.J. Lu <hongjiu.lu@intel.com>
366
367 * i386-opc.tbl: Drop Disp64 on jump and loop instructions.
368 * i386-tbl.h: Regenerated.
369
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3702009-10-02 Peter Bergner <bergner@vnet.ibm.com>
371
372 * ppc-dis.c (ppc_opts): Add "476" entry.
373 * ppc-opc.c (PPC476): Define.
374 (powerpc_opcodes): Update mnemonics where required for 476.
375
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3762009-10-01 Peter Bergner <bergner@vnet.ibm.com>
377
378 * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
379 * ppc-dis.c (ppc_opts): Likewise.
380 Rename "ppca2" to "a2".
381
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3822009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
383
384 * crx-dis.c (match_opcode): Truncate mcode to 32-bit.
385
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3862009-09-29 DJ Delorie <dj@redhat.com>
387
388 * Makefile.am: Add RX files.
389 * configure.in: Add support for RX target.
390 * disassemble.c: Likewise.
391 * Makefile.in: Regenerate.
392 * configure: Regenerate.
393 * opc2c.c: New file.
394 * rx-decode.c: New file.
395 * rx-decode.opc: New file.
396 * rx-dis.c: New file.
397
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3982009-09-29 Peter Bergner <bergner@vnet.ibm.com>
399
400 * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
401 "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
402
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4032009-09-25 Michael Eager <eager@eagercon.com>
404
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405 * microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address,
406 microblaze_decode_insn): Add declarations.
407 (get_delay_slots_microblaze): Remove.
fe2d172c 408
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4092009-09-25 Martin Thuresson <martint@google.com>
410
e0c483d6 411 Update sources to make arc and arm targets compile cleanly with
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412 -Wc++-compat:
413 * arc-dis.c Fix casts.
414 * arc-ext.c: Add casts.
415 * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
416 enum.
417
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4182009-09-24 H.J. Lu <hongjiu.lu@intel.com>
419
420 * i386-gen.c (opcode_modifiers): Remove Vex256.
421 (set_bitfield): Handle XXX=V.
422
423 * i386-opc.h (Vex): Update comments.
424 (Vex256): Removed.
425 (VexNDS): Updated.
e0c483d6 426 (i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
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427
428 * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
429 * i386-tbl.h: Regenerated.
430
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4312009-09-23 Nick Clifton <nickc@redhat.com>
432
433 * po/fr.po: Updated French translation.
434
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4352009-09-21 Ben Elliston <bje@au.ibm.com>
436 Peter Bergner <bergner@vnet.ibm.com>
437
438 * ppc-dis.c (ppc_opts): Add "ppca2" entry.
439 * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
440 eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
441 icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
442 ici mnemonics.
443 (ERAT_T): New operand.
444 (XWC_MASK): New mask.
445 (XOPL2): New macro.
446 (PPCA2): Define.
447
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4482009-09-18 Nick Clifton <nickc@redhat.com>
449
450 * po/es.po: Updated Spanish translation.
451 * po/vi.po: Updated Vietnamese translation.
452
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4532009-09-15 H.J. Lu <hongjiu.lu@intel.com>
454
455 * i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
456 disp == -disp.
457
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4582009-09-14 Nick Clifton <nickc@redhat.com>
459
460 * po/nl.po: Updated Dutch translation.
461
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4622009-09-11 Nick Clifton <nickc@redhat.com>
463
464 * po/opcodes.pot: Updated by the Translation project.
465
4662009-09-11 Martin Thuresson <martint@google.com>
467
468 Updated sources to compile cleanly with -Wc++-compat:
469 * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
470 * ldcref.c: Add casts.
471 * ldctor.c: Add casts.
472 * ldexp.c
473 * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
474 * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
475 * ldlang.h (enum statement_enum): Move to top level.
476 * ldmain.c: Add casts.
477 * ldwrite.c: Add casts.
478 * lexsup.c: Add casts. (enum control_enum): Move to top level.
479 * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
480
c8676ae4 4812009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 482
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483 * s390-dis.c (print_insn_s390): Avoid 'long long'.
484
7330f9c3 4852009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 486
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487 * s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
488 (print_insn_s390): Signextend and shift pcrel operands before printing.
489
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4902009-09-09 H.J. Lu <hongjiu.lu@intel.com>
491
492 * i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
493 VEX_LEN_AE_R_X_M_0 in comments.
494
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4952009-09-08 DJ Delorie <dj@redhat.com>
496
497 * mep-opc.c: Regenerate.
498
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4992009-09-08 Andreas Schwab <schwab@linux-m68k.org>
500
501 * z8kgen.c (struct op): Replace unused flavor with id.
502 (opt): Remove extra xorb entry.
503 (func): Use id field as fallback.
504 (sub): Return new string, caller changed.
505 (internal): Allocate end marker. Assign unique id before sorting.
506 (gas): Likewise. Fix loop end condition.
507 * z8k-opc.h: Regenerate.
508
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5092009-09-08 Alan Modra <amodra@bigpond.net.au>
510
511 * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
512
815c0482
AM
5132009-09-07 Alan Modra <amodra@bigpond.net.au>
514
515 * z8kgen.c (func): Fix thinko last patch.
516
eae14d64
AM
5172009-09-07 Alan Modra <amodra@bigpond.net.au>
518
519 * z8kgen.c (func): Stabilize qsort of identically named entries.
520 * z8k-opc.h: Regenerate.
521
23f938f1
TG
5222009-09-07 Tristan Gingold <gingold@adacore.com>
523
524 * po/opcodes.pot: Regenerate.
525
2eee5593
AM
5262009-09-07 Alan Modra <amodra@bigpond.net.au>
527
528 * configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
529 * configure: Regenerate.
530 * Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
531 (BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
532 (i386-gen, ia64-gen, z8kgen): ..here.
533 * Makefile.in: Regenerate.
534
ae794f60
TG
5352009-09-07 Tristan Gingold <gingold@adacore.com>
536
537 * z8k-opc.h: Regenerate.
538
96d56e9f
NC
5392009-09-05 Martin Thuresson <martin@mtme.org>
540
541 * ia64-dis.c (print_insn_ia64): Update code to use renamed member.
542 * m88k-dis.c (m88kdis): Rename variable class to in_class.
543 * tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol):
544 Rename argument class to symbol_class.
545
66a6900a
JZ
5462009-09-04 Jie Zhang <jie.zhang@analog.com>
547
548 * bfin-dis.c (decode_pseudodbg_assert_0): Change according
549 to the new encoding of DBGA, DBGAH, and DBGAL.
550 (_print_insn_bfin): Likewise.
551
ad15c38e
JZ
5522009-09-03 Jie Zhang <jie.zhang@analog.com>
553
554 * bfin-dis.c (_print_insn_bfin): Don't declare.
555 (print_insn_bfin): Don't declare.
556 (dregs_pair): Remove.
557 (ignore_bits): Remove.
558 (ccstat): Remove.
559
c958a8a8
JZ
5602009-09-03 Jie Zhang <jie.zhang@analog.com>
561
562 * bfin-dis.c (IS_DREG): Define.
563 (IS_PREG): Define.
564 (IS_AREG): Define.
565 (IS_GENREG): Define.
566 (IS_DAGREG): Define.
567 (IS_SYSREG): Define.
568 (decode_REGMV_0): Check illegal register move instructions.
569
3df5879c
DK
5702009-09-03 Dave Korn <dave.korn.cygwin@gmail.com>
571
572 * Makefile.am (BUILD_LIBINTL): New variable.
573 (i386-gen$(EXEEXT_FOR_BUILD)): Use it.
574 (ia64-gen$(EXEEXT_FOR_BUILD)): And here.
575 (z8kgen$(EXEEXT_FOR_BUILD)): And here.
576 * Makefile.in: Regenerate.
577
05316052
DD
5782009-09-01 DJ Delorie <dj@redhat.com>
579
580 * mep-asm.c: Regenerate.
581 * mep-desc.c: Regenerate.
582 * mep-opc.c: Regenerate.
583
e06ae0d4
TG
5842009-09-01 Tristan Gingold <gingold@adacore.com>
585
586 * makefile.vms: Ported to Itanium VMS. Remove useless targets and
587 dependencies. Remove unused FORMAT variable.
588 * configure.com: New file to create build.com DCL script for
589 Itanium VMS or Alpha VMS.
590
d3ce72d0
NC
5912009-08-29 Martin Thuresson <martin@mtme.org>
592
593 * cris-dis.c (bytes_to_skip): Update code to use new name.
594 * i386-dis.c (putop): Update code to use new name.
595 * i386-gen.c (process_i386_opcodes): Update code to use
596 new name.
597 * i386-opc.h (struct template): Rename struct template to
598 insn_template. Update code accordingly.
599 * i386-tbl.h (i386_optab): Update type to use new name.
600 * ia64-dis.c (print_insn_ia64): Rename variable template
601 to template_val.
602 * tic30-dis.c (struct instruction, get_tic30_instruction):
603 Update code to use new name.
604 * tic54x-dis.c (has_lkaddr, get_insn_size)
605 (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
606 Update code to use new name.
607 * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
608 Update type to new name.
609 * z8kgen.c (internal, gas): Rename variable new to new_op.
610
791f3971
L
6112009-08-28 H.J. Lu <hongjiu.lu@intel.com>
612
613 * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
614 Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
615 (LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
616 CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
617 * Makefile.in: Regenerated.
618
573e8a1c
RW
6192009-08-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
620
621 * Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
622 [INSTALL_LIBBFD]: ... here, ...
623 [INSTALL_LIBBFD]: ... and empty overrides here.
624 [!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
625 [!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
626 * Makefile.in: Regenerate.
627 * configure: Regenerate.
628
f7922329
NC
6292009-08-26 Philippe De Muyter <phdm@macqel.be>
630
631 * m68k-dis.c (print_insn_arg): Add movecr register names for
632 coldfire v4e families.
633
ff13a42d
RW
6342009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
635
636 * Makefile.am (SUBDIRS): Build '.' before 'po'.
637 (COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
638 (MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
639 (i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
640 using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
641 (i386-gen.o): New rule.
642 ($(srcdir)/i386-init.h): Adjust.
643 (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
644 (ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
645 (ia64-gen.o): New rule.
646 (ia64_asmtab_deps): New variable.
647 ($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
648 (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
649 (s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
650 likewise.
651 (s390-opc.tab): Adjust.
652 (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
653 rules.
654 (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
655 * Makefile.in: Regenerate.
656 * z8kgen.c (gas): Avoid '/*' in comment.
657 * z8k-opc.h (func): Regenerate.
658
6f01793d
RW
6592009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
660
661 * Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
662 from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
663 i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
664 ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
665 msp430-dis.c added.
666 (LIBOPCODES_CFILES): New variable, adding to
667 TARGET_LIBOPCODES_CFILES also non-target library sources.
668 (CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
669 files.
670 (ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
671 (EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
672 * Makefile.in: Regenerate.
673 * po/POTFILES.in: Regenerate.
674
81ecdfbb
RW
6752009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
676
14ec8efd
RW
677 * Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
678 [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
679 [INSTALL_LIBBFD] (bfdinclude_DATA): New.
680 [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
681 [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
682 is built shared even if it is not to be installed.
683 (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
684 (install_libopcodes, uninstall_libopcodes): Remove.
685 (AM_CPPFLAGS): Renamed from ...
686 (INCLUDES): ... this.
687 * Makefile.in: Regenerate.
688
758227f0
RW
689 * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
690 1.11, foreign, no-dist.
691 (MKDEP, m32c_opc_h): Remove variables.
692 (disassemble.lo): Rewrite using automake-style dependency
693 tracking rules; only list the dependency upon the primary source
694 file, but no included headers.
695 (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
696 (i386-gen.o, ia64-gen.o): Remove dependency statements.
697 (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
698 ensure all dependency fragments are included in the Makefile.
699 (s390-opc.lo): Depend on s390-opc.tab.
700 (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
701 (mkdep section): Remove.
702 * Makefile.in: Regenerate.
703 * po/POTFILES.in: Regenerate.
704
af542c2e
RW
705 * Makefile.am (install-pdf, install-html): Remove.
706 * Makefile.in: Regenerate.
707
81ecdfbb
RW
708 * Makefile.in: Regenerate.
709 * aclocal.m4: Likewise.
710 * config.in: Likewise.
711 * configure: Likewise.
712
7ba29e2a
NC
7132009-08-06 Michael Eager <eager@eagercon.com>
714
715 * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
716 CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
717 * Makefile.in: Regenerate.
718 * configure.in: Add bfd_microblaze_arch target.
719 * configure: Regenerate.
e0c483d6 720 * disassemble.c: Define ARCH_microblaze, return
7ba29e2a
NC
721 print_insn_microblaze().
722 * microblaze-dis.c: New MicroBlaze disassembler.
723 * microblaze-opc.h: New MicroBlaze opcode definitions.
724 * microblaze-opcm.h: New MicroBlaze opcode types.
725
8a9036a4
L
7262009-07-25 H.J. Lu <hongjiu.lu@intel.com>
727
728 * configure.in: Handle bfd_l1om_arch.
729 * disassemble.c (disassembler): Likewise.
730
731 * configure: Regenerated.
732
733 * i386-dis.c (print_insn): Handle bfd_mach_l1om and
734 bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
735
736 * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
737 Add CPU_L1OM_FLAGS.
738 (cpu_flags): Add CpuL1OM.
739 (set_bitfield): Take an argument to set the value field.
740 (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
741 (process_i386_opcode_modifier): Updated.
742 (process_i386_operand_type): Likewise.
743 * i386-init.h: Regenerated.
744 * i386-tbl.h: Likewise.
745
746 * i386-opc.h (CpuL1OM): New.
747 (CpuXsave): Updated.
748 (i386_cpu_flags): Add cpul1om.
749
309d3373
JB
7502009-07-24 Jan Beulich <jbeulich@novell.com>
751
752 * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
753 frstpm.
754 * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
755 (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
756 (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
757 * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
758 Define.
759 (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
760 and cpufisttp.
761 * i386-opc.tbl: Qualify floating point instructions by their
762 respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
763 and fsincos to be avilable only on 387. Fix fstsw ax to be
764 available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
765 and frstpm.
766 * i386-init.h, i386-tbl.h: Regenerate.
767
7769efb2
NC
7682009-07-20 Nick Clifton <nickc@redhat.com>
769
770 PR 10288
771 * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
772 offset or indexed based addressing mode 3.
773
74bdfecf
NC
7742009-07-14 Nick Clifton <nickc@redhat.com>
775
776 PR 10288
777 * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
778 patterns.
779 (arm_decode_shift): Catch illegal register based shifts.
780 (print_insn_arm): Properly handle negative register r0
781 post-indexed addressing.
782
d1aaab3c
DK
7832009-07-10 Doug Kwan <dougkwan@google.com>
784
785 * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
786 lower 32 bits of long types to make hexadecimal output consistent
787 on both 32-bit and 64-bit hosts.
788
87337981
AM
7892009-07-10 Alan Modra <amodra@bigpond.net.au>
790
791 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
792 * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
793 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
794 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
795 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
796 * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
797 * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
798 * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
799 * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
800 * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
e0c483d6 801 * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
87337981
AM
802 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
803
1103f72c
NC
8042009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
805
806 * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
807
78c66db8
NC
8082009-07-07 Nick Clifton <nickc@redhat.com>
809
810 PR 10288
811 * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
812 addressing modes.
813
22102fb0
DD
8142009-07-06 DJ Delorie <dj@redhat.com>
815
816 * mep-desc.c: Regenerate.
817 * mep-desc.h: Regenerate.
818 * mep-opc.c: Regenerate.
819 * mep-opc.h: Regenerate.
820
922d8de8
DR
8212009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
822
823 * i386-opc.h (CpuFMA4): Add CpuFMA4.
824 (i386_cpu_flags): New.
825 * i386-gen.c: Add CPU_FMA4_FLAGS.
826 * i386-opc.tbl: Add FMA4 instructions.
827 * i386-tbl.h: Regenerate.
828 * i386-init.h: Regenerate.
829 * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
830 (OP_XMM_VexW): Ditto.
831 (OP_EX_VexW): Ditto.
832 (VEXI4_Fixup): Ditto.
833 (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
834 (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
835 (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
836 (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
837 (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
838 (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
839 (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
840 (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
841 (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
842 (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
843 (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
844 (get_vex_imm8): New. handle FMA4.
845 (OP_EX_VexReg): Ditto.
e0c483d6 846
fe56b6ce
NC
8472009-06-30 Nick Clifton <nickc@redhat.com>
848
849 PR 10288
850 * arm-dis.c (coprocessor): Print the LDC and STC versions of the
851 LFM and SFM instructions as comments,.
852 Improve consistency of formatting for instructions displayed as
853 comments and decimal values displayed with their hexadecimal
854 equivalents.
855 Formatting tidy ups.
856
05413229
NC
8572009-06-29 Nick Clifton <nickc@redhat.com>
858
859 PR 10288
860 * arm-dis.c (enum opcode_sentinels): New: Used to mark the
861 boundary between variaant and generic coprocessor instuctions.
862 (coprocessor): Use it.
863 Fix architecture version of MCRR and MRRC instructions.
864 (arm_opcdes): Fix patterns for STRB and STRH instructions.
865 (print_insn_coprocessor): Check architecture and extension masks.
866 Print a hexadecimal version of any decimal constant that is
867 outside of the range of -16 to +32.
868 (print_arm_address): Add a return value of the offset used in the
869 adress, if it is worth printing a hexadecimal version of it.
870 (print_insn_neon): Print a hexadecimal version of any decimal
871 constant that is outside of the range of -16 to +32.
872 (print_insn_arm): Likewise.
873 (print_insn_thumb16): Likewise.
874 (print_insn_thumb32): Likewise.
e0c483d6 875
05413229
NC
876 PR 10297
877 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
878 of an undefined instruction.
879 (arm_opcodes): Use it.
880 (thumb_opcod): Use it.
881 (thumb32_opc): Use it.
882
378a0c07
DD
8832009-06-23 DJ Delorie <dj@redhat.com>
884
dab97f24
DD
885 * mep-desc.c: Regenerate.
886 * mep-desc.h: Regenerate.
887 * mep-dis.c: Regenerate.
888 * mep-ibld.c: Regenerate.
889 * mep-opc.c: Regenerate.
890
378a0c07
DD
891 * mep-asm.c: Regenerate.
892 * mep-opc.c: Regenerate.
893 * mep-opc.h: Regenerate.
894
aece7d2e
NC
8952009-06-22 Nick Clifton <nickc@redhat.com>
896
897 * po/fi.po: Updated Finish translation.
898
1998a8e0
AM
8992009-06-22 Alan Modra <amodra@bigpond.net.au>
900
901 * m32c-asm.c: Regenerate.
902
b33bafa0
AM
9032009-06-22 Alan Modra <amodra@bigpond.net.au>
904
905 * score-dis.c (print_insn_score48, print_insn_score32): Move default
906 case label to proper lexical block.
907 * score7-dis.c (print_insn_score32): Likewise.
908
ce21feb4
MS
9092009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
910
911 * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
912 MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
913 * s390-opc.txt (nopr, nop): Use new instruction format.
914
0313a2b8
NC
9152009-06-18 Nick Clifton <nickc@redhat.com>
916
917 PR 10288
918 * arm-dis.c (print_insn_coprocessor): Check that a user specified
919 ARM architecture supports the matched instruction.
920 (print_insn_arm): Likewise.
921 (select_arm_features): New function. Fills in the fields of an
922 arm_feature_set structure based on a given arm machine number.
923 (print_insn): Initialise an arm_feature_set structure.
924
6db7e006
MR
9252009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
926
927 * vax-dis.c (is_function_entry): Return success for synthetic
928 symbols too.
929 (is_plt_tail): New function.
930 (print_insn_vax): Decode PLT entry offset longword.
931
522fe561
NC
9322009-06-15 Nick Clifton <nickc@redhat.com>
933
fe2ceba1
NC
934 PR 10186
935 * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
936 instruction.
937
522fe561
NC
938 PR 10173
939 * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
940
1316c8b3
NC
9412009-06-15 Nick Clifton <nickc@redhat.com>
942
943 PR 10263
944 * arm-dis.c (print_insn): Ignore is_data if the user has requested
945 the disassembly of data as well as instructions.
946
f6475b48
DE
9472009-06-11 Doug Evans <dje@sebabeach.org>
948
949 * cgen.sh: Handle multiple simultaneous runs for parallel makes.
950
f865a31d
AG
9512009-06-11 Anthony Green <green@moxielogic.com>
952
953 * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
954 (moxie_form3_opc_info): Add branch instructions.
955 * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
956 encoded instructions.
957
0e7c7f11
AG
9582009-06-06 Anthony Green <green@moxielogic.com>
959
960 * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
961 * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
962
67a648f1
AM
9632009-06-04 Alan Modra <amodra@bigpond.net.au>
964
965 * dep-in.sed: Don't use \n in replacement part of s command.
966 * Makefile.am (DEP1): LC_ALL for uniq.
967 * Makefile.in: Regenerate.
968
06c582ac
NC
9692009-06-02 Nick Clifton <nickc@redhat.com>
970
971 * po/nl.po: Updated Dutch translation.
972
3164099e
TG
9732009-06-02 Tristan Gingold <gingold@adacore.com>
974
975 * ia64-gen.c (parse_resource_users, print_dependency_table,
976 add_dis_table_ent, finish_distable, insert_bit_table_ent,
977 add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
978 get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
979 insert_completer_entry, print_completer_entry, print_completer_table,
980 opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
981
d285268e
DD
9822009-05-28 DJ Delorie <dj@redhat.com>
983
984 * mep-asm.c: Regenerate.
985 * mep-desc.c: Regenerate.
986
2f3565a3
DD
9872009-05-26 DJ Delorie <dj@redhat.com>
988
989 * mep-asm.c: Regenerate.
990 * mep-desc.c: Regenerate.
991 * mep-desc.h: Regenerate.
992 * mep-dis.c: Regenerate.
993 * mep-ibld.c: Regenerate.
994 * mep-opc.c: Regenerate.
995 * mep-opc.h: Regenerate.
996
f12e7348
NC
9972009-05-26 Nick Clifton <nickc@redhat.com>
998
999 * po/id.po: Updated Indonesian translation.
1000 * po/opcodes.pot: Updated template file.
1001
9e097a72
AM
10022009-05-26 Alan Modra <amodra@bigpond.net.au>
1003
1004 * dep-in.sed: Don't modify .o to .lo here. Output one filename
1005 per line with all lines having continuation backslash. Prefix
1006 first line with "A", following lines with "B".
1007 * Makefile.am (DEP): Don't use dep.sed here.
1008 (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
1009 dep.sed here on dependencies, sort and uniq.
1010 * Makefile.in: Regenerate.
1011
4f8318f8
TG
10122009-05-25 Tristan Gingold <gingold@adacore.com>
1013
1014 * makefile.vms (OPT): New variable.
1015 (CFLAGS): Update compilation flags.
1016
1d74713b
DD
10172009-05-22 DJ Delorie <dj@redhat.com>
1018
1019 * mep-asm.c: Regenerate.
1020 * mep-desc.c: Regenerate.
1021 * mep-desc.h: Regenerate.
1022 * mep-dis.c: Regenerate.
1023 * mep-ibld.c: Regenerate.
1024 * mep-opc.c: Regenerate.
1025 * mep-opc.h: Regenerate.
1026
c1e679ec
DR
10272009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
1028
1029 * i386-opc.h (Cpusse5): Delete.
1030 (i386_cpu_flags): Delete.
1031 * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
1032 * i386-opc.tbl: Remove SSE5 instructions.
1033 * i386-tbl.h: Regenerate.
1034 * i386-init.h: Regenerate.
1035 * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
1036 (print_drex_arg): Delete.
1037 (OP_DREX4): Delete.
1038 (OP_DREX3): Delete.
1039 (OP_DREX_ICMP): Delete.
1040 (OP_DREX_FCMP): Delete.
1041 (DREX_*): Delete.
1042 (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
e0c483d6 1043
2b3decb5
AM
10442009-05-22 Alan Modra <amodra@bigpond.net.au>
1045
1046 * Makefile.am: Run "make dep-am".
1047 * Makefile.in: Regenerate.
1048 * po/POTFILES.in: Regenerate.
1049
eb956800
DD
10502009-05-19 DJ Delorie <dj@redhat.com>
1051
1052 * mep-asm.c: Regenerate.
1053 * mep-opc.c: Regenerate.
1054
3526b680
DD
10552009-04-30 DJ Delorie <dj@redhat.com>
1056
1057 * mep-asm.c: Regenerate.
1058 * mep-desc.c: Regenerate.
1059 * mep-desc.h: Regenerate.
1060 * mep-dis.c: Regenerate.
1061 * mep-ibld.c: Regenerate.
1062 * mep-opc.c: Regenerate.
1063 * mep-opc.h: Regenerate.
1064
45be3704
DD
10652009-04-17 DJ Delorie <dj@redhat.com
1066
1067 * mep-desc.c: Regenerate.
1068 * mep-ibld.c: Regenerate.
1069 * mep-opc.c: Regenerate.
1070 * mep-opc.h: Regenerate.
1071
20135e4c
NC
10722009-04-15 Anthony Green <green@moxielogic.com>
1073
1074 * moxie-opc.c, moxie-dis.c: Created.
1075 * Makefile.am: Build the moxie source files.
1076 * configure.in: Add moxie support.
1077 * Makefile.in, configure: Rebuilt.
1078 * disassemble.c (disassembler): Add moxie support.
1079 (ARCH_moxie): Define.
1080
ac5c19e6
JB
10812009-04-15 Jan Beulich <jbeulich@novell.com>
1082
1083 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
1084 extension to None.
1085 (pshab, pshaw, pshad, pshaq): Likewise.
1086 * i386-tbl.h: Re-generate.
1087
52de720d
DD
10882009-04-08 DJ Delorie <dj@redhat.com
1089
1090 * mep-asm.c: Regenerate.
1091 * mep-desc.c: Regenerate.
1092 * mep-desc.h: Regenerate.
1093 * mep-dis.c: Regenerate.
1094 * mep-ibld.c: Regenerate.
1095 * mep-opc.c: Regenerate.
1096 * mep-opc.h: Regenerate.
1097
858d7a6d
PB
10982009-04-07 Peter Bergner <bergner@vnet.ibm.com>
1099
1100 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
1101 "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
1102 Reorder entries so the extended mnemonics are listed before tlbilx.
1103
70dc4e32
PB
11042009-04-02 Peter Bergner <bergner@vnet.ibm.com>
1105
1106 * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
1107 due to -many/-Many.
1108 (print_insn_powerpc): Make sure we only deprecate instructions using
1109 the original dialect and not a modified dialect due to -Many handling.
1110 Move the handling of the condition register and default operands to
1111 the end of the if/else if/else chain.
1112 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1113 instructions from newer processors are listed before older ones.
1114 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
1115 that have instructions with conflicting opcodes.
1116
e401b04c
PB
11172009-04-01 Peter Bergner <bergner@vnet.ibm.com>
1118
1119 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
1120 E500MC entries.
1121
b8f9ee44
CL
11222009-04-01 Christophe Lyon <christophe.lyon@st.com>
1123
1124 * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
1125
d460e92e
JM
11262009-03-30 Joseph Myers <joseph@codesourcery.com>
1127
1128 * arm-dis.c (print_insn): Also check section matches in backwards
1129 search for mapping symbol.
1130
d34b5006
L
11312009-03-26 H.J. Lu <hongjiu.lu@intel.com>
1132
1133 * i386-dis.c (get_valid_dis386): Abort on unhandled table.
1134
8d25cc3d
AM
11352009-03-18 Alan Modra <amodra@bigpond.net.au>
1136
3889c459 1137 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
8d25cc3d
AM
1138 * Makefile.am: Run "make dep-am".
1139 * Makefile.in: Regenerate.
1140 * openrisc-opc.c: Regenerate.
1141
34dd024a
NC
11422009-03-10 Nick Clifton <nickc@redhat.com>
1143
1144 * po/id.po: Updated Indonesian translation.
1145
69fe9ce5
AM
11462009-03-10 Alan Modra <amodra@bigpond.net.au>
1147
1148 * ppc-dis.c: Include "opintl.h".
1149 (struct ppc_mopt, ppc_opts): New.
1150 (ppc_parse_cpu): New function.
1151 (powerpc_init_dialect): Use it.
1152 (print_ppc_disassembler_options): Dump options from ppc_opts.
1153 Internationalize message.
1154
d11fd249
NC
11552009-03-06 Nick Clifton <nickc@redhat.com>
1156
1157 * po/es.po: Updated Spanish translation.
1158
51dec227
AM
11592009-03-04 Alan Modra <amodra@bigpond.net.au>
1160
1161 PR 6768
1162 * configure.in: Test for ld --as-needed support. Link shared
1163 libopcodes against libm.
1164 * configure: Regenerate.
1165
c72ab5f2
PB
11662009-03-03 Peter Bergner <bergner@vnet.ibm.com>
1167
1168 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1169 instructions from newer processors are listed before older ones.
1170
a1f7ca36
AM
11712009-03-03 Alan Modra <amodra@bigpond.net.au>
1172
1173 * Makefile.am: Run "make dep-am".
1174 (HFILES): Move lm32-desc.h and lm32-opc.h from..
1175 (CFILES): ..here.
1176 * Makefile.in: Regenerate.
1177
c3b7224a
NC
11782009-03-02 Qinwei <qinwei@sunnorth.com.cn>
1179
1180 * score7-dis.c: New file.
1181 * Makefile.am: Add dependencies for score7-dis.c.
1182 * Makefile.in: Regenerate.
1183 * configure.in: Add score7-dis to score files.
1184 * configure: Regenerate.
1185 * score-dis.c: Add support for score7 architecture.
1186 * score-opc.h: Likewise.
1187
58e24671
RW
11882009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
1189
1190 * configure: Regenerate.
1191
d6f574e0
L
11922009-02-27 H.J. Lu <hongjiu.lu@intel.com>
1193
1194 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
1195
066be9f7
PB
11962009-02-26 Peter Bergner <bergner@vnet.ibm.com>
1197
1198 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
1199 the power7 and the isel instructions.
1200 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
1201 (insert_dm, extract_dm): Likewise.
1202 (XB6): Update comment to include XX2 form.
1203 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
1204 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
1205 (RemoveXX3DM): Delete.
1206 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
1207 "mftgpr">: Deprecate for POWER7.
1208 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
1209 "frsqrte.">: Deprecate the three operand form and enable the two
1210 operand form for POWER7 and later.
1211 <"wait">: Extend to accept optional parameter. Enable for POWER7.
1212 <"waitsrv", "waitimpl">: Add extended opcodes.
1213 <"ldbrx", "stdbrx">: Enable for POWER7.
1214 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
1215 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
1216 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
1217 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
1218 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
1219 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
1220 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
1221 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
1222 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
1223 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
1224 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
1225 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
1226 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
1227 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
1228 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
1229 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
1230 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
1231 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
1232 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
1233 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
1234 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
1235 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
1236 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
1237 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
1238 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
1239 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
1240 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
1241 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
1242 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
1243 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
1244 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
1245 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
1246 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
1247 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
1248 "xxspltw", "xxswapd">: Add VSX opcodes.
1249
4c664d7b
L
12502009-02-23 H.J. Lu <hongjiu.lu@intel.com>
1251
1252 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
1253 (operand_types): Remove Vex_Imm4.
1254
1255 * i386-opc.h (Vex_Imm4): Removed.
1256 (OTMax): Updated.
1257 (i386_operand_type): Remove vex_imm4.
1258
1259 * i386-opc.tbl: Remove Vex_Imm4 comments.
1260 * i386-init.h: Regenerated.
1261 * i386-tbl.h: Likewise.
1262
4ce8808b
RE
12632009-02-23 Richard Earnshaw <rearnsha@arm.com>
1264
1265 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
1266 vq{r}shr{u}n.s64 insnstructions.
1267
0e55be16
PB
12682009-02-19 Peter Bergner <bergner@vnet.ibm.com>
1269
1270 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
1271 operand to be a float point register (FRT/FRS).
1272
b1c9882d
AN
12732009-02-18 Adam Nemet <anemet@caviumnetworks.com>
1274
1275 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
1276 dmfc2 and dmtc2 before the architecture-level variants.
1277
137f2437
NC
12782009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
1279
1280 * fr30-opc.c: Regenerate.
1281 * frv-opc.c: Regenerate.
1282 * ip2k-opc.c: Regenerate.
1283 * iq2000-opc.c: Regenerate.
1284 * lm32-opc.c: Regenerate.
1285 * m32c-opc.c: Regenerate.
1286 * m32r-opc.c: Regenerate.
1287 * mep-opc.c: Regenerate.
1288 * mt-opc.c: Regenerate.
1289 * xc16x-opc.c: Regenerate.
1290 * xstormy16-opc.c: Regenerate.
1291 * tic54x-dis.c (print_instruction): Avoid compiler warning on
1292 sprintf call.
1293
87298967
NS
12942009-02-12 Nathan Sidwell <nathan@codesourcery.com>
1295
1296 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
1297
80890a61
PB
12982009-02-05 Peter Bergner <bergner@vnet.ibm.com>
1299
1300 * ppc-opc.c: Update copyright year.
1301 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
1302 ordering for POWER4 and later and use the correct Server ordering.
1303
ce2f5b3c
L
13042009-02-04 H.J. Lu <hongjiu.lu@intel.com>
1305
1306 AVX Programming Reference (January, 2009)
1307 * i386-dis.c (PREFIX_VEX_3A44): New.
1308 (VEX_LEN_3A44_P_2): Likewise.
1309 (PREFIX_VEX_3A48): Updated.
1310 (VEX_LEN_3A4C_P_2): Likewise.
1311 (prefix_table): Add PREFIX_VEX_3A44.
1312 (vex_table): Likewise.
1313 (vex_len_table): Add VEX_LEN_3A44_P_2.
1314
1315 * i386-opc.tbl: Add PCLMUL + AVX instructions.
1316 * i386-tbl.h: Regenerated.
1317
52b6b6b9
JM
13182009-02-03 Sandip Matte <sandip@rmicorp.com>
1319
1320 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
1321 (mips_arch_choices): Add XLR entry.
1322 * mips-opc.c (XLR): Define.
1323 (mips_builtin_opcodes): Add XLR instructions.
1324
31dd3154
JM
13252009-02-03 Carlos O'Donell <carlos@codesourcery.com>
1326
1327 * Makefile.am: Add install-pdf target.
1328 * po/Make-in: Add install-pdf target.
1329 * Makefile.in: Regenerate.
1330
c1a0a41f
DD
13312009-02-02 DJ Delorie <dj@redhat.com>
1332
1333 * mep-asm.c: Regenerate.
1334 * mep-desc.c: Regenerate.
1335 * mep-desc.h: Regenerate.
1336 * mep-dis.c: Regenerate.
1337 * mep-ibld.c: Regenerate.
1338 * mep-opc.c: Regenerate.
1339 * mep-opc.h: Regenerate.
1340
087b80de
JM
13412009-01-29 Mark Mitchell <mark@codesourcery.com>
1342
1343 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
1344 qsub, and qdsub.
1345
159073e6
NC
13462009-01-28 Chao-ying Fu <fu@mips.com>
1347
e0c483d6 1348 * mips-opc.c (suxc1): Add the flag of FP_D.
159073e6 1349
6f3b91a6
AM
13502009-01-20 Alan Modra <amodra@bigpond.net.au>
1351
1352 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
1353 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
1354 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
1355 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
1356 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
1357 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
1358 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
1359 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
1360
29670fb9
AM
13612009-01-16 Alan Modra <amodra@bigpond.net.au>
1362
1363 * configure.in (commonbfdlib): Delete.
1364 (SHARED_LIBADD): Add pic libiberty if such is available.
1365 * configure: Regenerate.
1366 * po/POTFILES.in: Regenerate.
1367
21169fcf
PB
13682009-01-14 Peter Bergner <bergner@vnet.ibm.com>
1369
1370 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
1371 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
1372 operand form and enable the four operand form for POWER6 and later.
1373 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
1374 three operand form for POWER6 and later.
1375
4ca47a51
MF
13762009-01-14 Mike Frysinger <vapier@gentoo.org>
1377
1378 * bfin-dis.c (OUTS): Use "%s" as format string.
1379
8acd5377
L
13802009-01-13 H.J. Lu <hongjiu.lu@intel.com>
1381
1382 * i386-gen.c (cpu_flag_init): Remove a white space.
1383 (operand_type_init): Likewise.
1384
c1ec1875
L
13852009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1386
1387 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
1388 * i386-tbl.h: Regenerated.
1389
c7532693
L
13902009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1391
1392 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
1393 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
1394 subS, xorS and cmpS.
1395
bd5295b2
L
13962009-01-10 H.J. Lu <hongjiu.lu@intel.com>
1397
1398 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
1399 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
1400 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
1401 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
1402 and CpuSYSCALL.
1403 (lineno): Removed.
1404 (set_bitfield): Take an argument, lineno. Don't report lineno
1405 on error if it is -1.
1406 (process_i386_cpu_flag): Take an argument, lineno.
1407 (process_i386_opcode_modifier): Likewise.
1408 (process_i386_operand_type): Likewise.
1409 (output_i386_opcode): Likewise.
1410 (opcode_hash_entry): Add lineno.
1411 (process_i386_opcodes): Updated.
1412 (process_i386_registers): Likewise.
1413 (process_i386_initializers): Likewise.
1414
1415 * i386-opc.h (CpuP4): Removed.
1416 (CpuK6): Likewise.
1417 (CpuK8): Likewise.
1418 (CpuClflush): New.
1419 (CpuSYSCALL): Likewise.
1420 (CpuMMX): Updated.
1421 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
1422 cpuclflush and cpusyscall.
1423
1424 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
1425 syscall and sysret.
1426 * i386-init.h: Regenerated.
1427 * i386-tbl.h: Likewise.
1428
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14292009-01-09 H.J. Lu <hongjiu.lu@intel.com>
1430
1431 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
1432 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
1433 (cpu_flags): Add CpuRdtscp.
1434 (set_bitfield): Remove CpuSledgehammer check.
1435
1436 * i386-opc.h (CpuRdtscp): New.
1437 (CpuLM): Updated.
1438 (i386_cpu_flags): Add cpurdtscp.
1439
1440 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
1441 * i386-init.h: Regenerated.
1442 * i386-tbl.h: Likewise.
1443
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14442009-01-09 Peter Bergner <bergner@vnet.ibm.com>
1445
1446 * ppc-opc.c (PPCNONE): Define.
1447 (NOPOWER4): Delete.
1448 (powerpc_opcodes): Initialize the new "deprecated" field.
1449
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14502009-01-06 H.J. Lu <hongjiu.lu@intel.com>
1451
1452 AVX Programming Reference (December, 2008)
1453 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
1454 (VEX_LEN_E7_P_2_M_0): Likewise.
1455 (VEX_LEN_2C_P_1): Updated.
1456 (VEX_LEN_E8_P_2): Likewise.
1457 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
1458 (mod_table): Likewise.
1459
1460 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
1461 * i386-tbl.h: Regenerated.
1462
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14632009-01-05 H.J. Lu <hongjiu.lu@intel.com>
1464
1465 * i386-gen.c (process_copyright): Update for 2009.
1466
1467 * i386-init.h: Regenerated.
1468 * i386-tbl.h: Likewise.
1469
0bfee649 14702009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 1471
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1472 AVX Programming Reference (December, 2008)
1473 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 1474 (OP_EX_VexW): Likewise.
0bfee649 1475 (OP_EX_VexImmW): Likewise.
c0f3af97 1476 (OP_XMM_VexW): Likewise.
c0f3af97 1477 (VEXI4_Fixup): Likewise.
c0f3af97 1478 (VPERMIL2_Fixup): Likewise.
c0f3af97 1479 (VexI4): Likewise.
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1480 (VexFMA): Likewise.
1481 (Vex128FMA): Likewise.
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1482 (EXVexW): Likewise.
1483 (EXdVexW): Likewise.
1484 (EXqVexW): Likewise.
0bfee649 1485 (EXVexImmW): Likewise.
c0f3af97 1486 (XMVexW): Likewise.
c0f3af97 1487 (VPERMIL2): Likewise.
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1488 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
1489 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
1490 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
1491 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
1492 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
1493 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
1494 (get_vex_imm8): Likewise.
1495 (OP_EX_VexReg): Likewise.
1496 vpermil2_op): Likewise.
1497 (EXVexWdq): New.
1498 (vex_w_dq_mode): Likewise.
1499 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
1500 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
1501 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
1502 (es_reg): Updated.
1503 (PREFIX_VEX_38DB): Likewise.
1504 (PREFIX_VEX_3A4A): Likewise.
1505 (PREFIX_VEX_3A60): Likewise.
1506 (PREFIX_VEX_3ADF): Likewise.
1507 (VEX_LEN_3ADF_P_2): Likewise.
1508 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
e0c483d6 1509 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
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1510 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
1511 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
1512 PREFIX_VEX_3896...PREFIX_VEX_389F,
1513 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
1514 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 1515 (vex_table): Likewise.
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1516 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
1517 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
1518 (putop): Support "%XW".
1519 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 1520
0bfee649 1521 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 1522
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1523 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
1524 instructions. Add new FMA instructions.
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1525 * i386-tbl.h: Regenerated.
1526
e0c483d6 15272009-01-02 Matthias Klose <doko@ubuntu.com>
3fe15143 1528
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1529 * or32-opc.c (or32_print_register, or32_print_immediate,
1530 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 1531
0bfee649 1532For older changes see ChangeLog-2008
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