[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/20141
	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
	CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
	* i386-init.h: Regenerated.

2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
	CPU_ANY_X87_FLAGS.  Add CPU_ANY_MMX_FLAGS.
	* i386-init.h: Regenerated.

2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
	information.
	(print_insn_arc): Set insn_type information.
	* arc-opc.c (C_CC): Add F_CLASS_COND.
	* arc-tbl.h (bbit0, bbit1): Update subclass to COND.
	(beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
	(ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
	(breq, breq_s, brge, brhs, brlo, brlt): Likewise.
	(brne, brne_s, jeq_s, jne_s): Likewise.

2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (neg): New instruction variant.

2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>

	* arc-dis.c (find_format, find_format, get_auxreg)
	(print_insn_arc): Changed.
	* arc-ext.h (INSERT_XOP): Likewise.

2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* tic54x-dis.c (sprint_mmr): Adjust.
	* tic54x-opc.c: Likewise.

2016-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.

2016-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c: Formatting.
	(NSISIGNOPT): Define.
	(powerpc_opcodes <subis>): Use NSISIGNOPT.

2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	replacing references to `micromips_ase' throughout.
	(_print_insn_mips): Don't use file-level microMIPS annotation to
	determine the disassembly mode with the symbol table.

2016-05-13  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.

2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>

	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	mips64r6.
	* mips-opc.c (D34): New macro.
	(mips_builtin_opcodes): Define bposge32c for DSPr3.

2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>

	* i386-dis.c (prefix_table): Add RDPID instruction.
	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	(cpu_flags): Add RDPID bitfield.
	* i386-opc.h (enum): Add RDPID element.
	(i386_cpu_flags): Add RDPID field.
	* i386-opc.tbl: Add RDPID instruction.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Regenerate.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	branch type of a symbol.
	(print_insn): Likewise.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	Mainline Security Extensions instructions.
	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	Extensions instructions.
	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	instructions.
	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	special registers.

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.

2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	(arcExtMap_genOpcode): Likewise.
	* arc-opc.c (arg_32bit_rc): Define new variable.
	(arg_32bit_u6): Likewise.
	(arg_32bit_limm): Likewise.

2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-gen.c (VERIFIER): Define.
	* aarch64-opc.c (VERIFIER): Define.
	(verify_ldpsw): Use static linkage.
	* aarch64-opc.h (verify_ldpsw): Remove.
	* aarch64-tbl.h: Use VERIFIER for verifiers.

2016-04-28  Nick Clifton  <nickc@redhat.com>

	PR target/19722
	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
f1360d58 L	1	2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
	2
	3	PR gas/20141
	4	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
	5	CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
	6	* i386-init.h: Regenerated.
	7
293f5f65 L	8	2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
	9
	10	* i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
	11	CPU_ANY_X87_FLAGS. Add CPU_ANY_MMX_FLAGS.
	12	* i386-init.h: Regenerated.
	13
d9eca1df CZ	14	2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
	15
	16	* arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
	17	information.
	18	(print_insn_arc): Set insn_type information.
	19	* arc-opc.c (C_CC): Add F_CLASS_COND.
	20	* arc-tbl.h (bbit0, bbit1): Update subclass to COND.
	21	(beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
	22	(ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
	23	(breq, breq_s, brge, brhs, brlo, brlt): Likewise.
	24	(brne, brne_s, jeq_s, jne_s): Likewise.
	25
87789e08 CZ	26	2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
	27
	28	* arc-tbl.h (neg): New instruction variant.
	29
c810e0b8 CZ	30	2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
	31
	32	* arc-dis.c (find_format, find_format, get_auxreg)
	33	(print_insn_arc): Changed.
	34	* arc-ext.h (INSERT_XOP): Likewise.
	35
3d207518 TS	36	2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	37
	38	* tic54x-dis.c (sprint_mmr): Adjust.
	39	* tic54x-opc.c: Likewise.
	40
514e58b7 AM	41	2016-05-19 Alan Modra <amodra@gmail.com>
	42
	43	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
	44
e43de63c AM	45	2016-05-19 Alan Modra <amodra@gmail.com>
	46
	47	* ppc-opc.c: Formatting.
	48	(NSISIGNOPT): Define.
	49	(powerpc_opcodes <subis>): Use NSISIGNOPT.
	50
1401d2fe MR	51	2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
	52
	53	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	54	replacing references to `micromips_ase' throughout.
	55	(_print_insn_mips): Don't use file-level microMIPS annotation to
	56	determine the disassembly mode with the symbol table.
	57
1178da44 PB	58	2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
	59
	60	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
	61
8f4f9071 MF	62	2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
	63
	64	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	65	mips64r6.
	66	* mips-opc.c (D34): New macro.
	67	(mips_builtin_opcodes): Define bposge32c for DSPr3.
	68
8bc52696 AF	69	2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
	70
	71	* i386-dis.c (prefix_table): Add RDPID instruction.
	72	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	73	(cpu_flags): Add RDPID bitfield.
	74	* i386-opc.h (enum): Add RDPID element.
	75	(i386_cpu_flags): Add RDPID field.
	76	* i386-opc.tbl: Add RDPID instruction.
	77	* i386-init.h: Regenerate.
	78	* i386-tbl.h: Regenerate.
	79
39d911fc TP	80	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	81
	82	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	83	branch type of a symbol.
	84	(print_insn): Likewise.
	85
16a1fa25 TP	86	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	87
	88	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	89	Mainline Security Extensions instructions.
	90	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	91	Extensions instructions.
	92	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	93	instructions.
	94	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	95	special registers.
	96
d751b79e JM	97	2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
	98
	99	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
	100
945e0f82 CZ	101	2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
	102
	103	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	104	(arcExtMap_genOpcode): Likewise.
	105	* arc-opc.c (arg_32bit_rc): Define new variable.
	106	(arg_32bit_u6): Likewise.
	107	(arg_32bit_limm): Likewise.
	108
20f55f38 SN	109	2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
	110
	111	* aarch64-gen.c (VERIFIER): Define.
	112	* aarch64-opc.c (VERIFIER): Define.
	113	(verify_ldpsw): Use static linkage.
	114	* aarch64-opc.h (verify_ldpsw): Remove.
	115	* aarch64-tbl.h: Use VERIFIER for verifiers.
	116
4bd13cde NC	117	2016-04-28 Nick Clifton <nickc@redhat.com>
	118
	119	PR target/19722
	120	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	121	* aarch64-opc.c (verify_ldpsw): New function.
	122	* aarch64-opc.h (verify_ldpsw): New prototype.
	123	* aarch64-tbl.h: Add initialiser for verifier field.
	124	(LDPSW): Set verifier to verify_ldpsw.
	125
c0f92bf9 L	126	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	127
	128	PR binutils/19983
	129	PR binutils/19984
	130	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	131	smaller than address size.
	132
e6c7cdec TS	133	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	134
	135	* alpha-dis.c: Regenerate.
	136	* crx-dis.c: Likewise.
	137	* disassemble.c: Likewise.
	138	* epiphany-opc.c: Likewise.
	139	* fr30-opc.c: Likewise.
	140	* frv-opc.c: Likewise.
	141	* ip2k-opc.c: Likewise.
	142	* iq2000-opc.c: Likewise.
	143	* lm32-opc.c: Likewise.
	144	* lm32-opinst.c: Likewise.
	145	* m32c-opc.c: Likewise.
	146	* m32r-opc.c: Likewise.
	147	* m32r-opinst.c: Likewise.
	148	* mep-opc.c: Likewise.
	149	* mt-opc.c: Likewise.
	150	* or1k-opc.c: Likewise.
	151	* or1k-opinst.c: Likewise.
	152	* tic80-opc.c: Likewise.
	153	* xc16x-opc.c: Likewise.
	154	* xstormy16-opc.c: Likewise.
	155
537aefaf AB	156	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	157
	158	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	159	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	160	calcsd, and calcxd instructions.
	161	* arc-opc.c (insert_nps_bitop_size): Delete.
	162	(extract_nps_bitop_size): Delete.
	163	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	164	(extract_nps_qcmp_m3): Define.
	165	(extract_nps_qcmp_m2): Define.
	166	(extract_nps_qcmp_m1): Define.
	167	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	168	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	169	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	170	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	171	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	172	NPS_QCMP_M3.
	173
c8f785f2 AB	174	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	175
	176	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	177
6fd8e7c2 L	178	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	179
	180	* Makefile.in: Regenerated with automake 1.11.6.
	181	* aclocal.m4: Likewise.
	182
4b0c052e AB	183	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	184
	185	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	186	instructions.
	187	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	188	(extract_nps_cmem_uimm16): New function.
	189	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	190
cb040366 AB	191	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	192
	193	* arc-dis.c (arc_insn_length): New function.
	194	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	195	(find_format): Change insnLen parameter to unsigned.
	196
accc0180 NC	197	2016-04-13 Nick Clifton <nickc@redhat.com>
	198
	199	PR target/19937
	200	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	201	the LD.B and LD.BU instructions.
	202
f36e33da CZ	203	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	204
	205	* arc-dis.c (find_format): Check for extension flags.
	206	(print_flags): New function.
	207	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	208	.extAuxRegister.
	209	* arc-ext.c (arcExtMap_coreRegName): Use
	210	LAST_EXTENSION_CORE_REGISTER.
	211	(arcExtMap_coreReadWrite): Likewise.
	212	(dump_ARC_extmap): Update printing.
	213	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	214	(arc_aux_regs): Add cpu field.
	215	* arc-regs.h: Add cpu field, lower case name aux registers.
	216
1c2e355e CZ	217	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	218
	219	* arc-tbl.h: Add rtsc, sleep with no arguments.
	220
b99747ae CZ	221	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	222
	223	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	224	Initialize.
	225	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	226	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	227	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	228	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	229	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	230	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	231	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	232	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	233	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	234	(arc_opcode arc_opcodes): Null terminate the array.
	235	(arc_num_opcodes): Remove.
	236	* arc-ext.h (INSERT_XOP): Define.
	237	(extInstruction_t): Likewise.
	238	(arcExtMap_instName): Delete.
	239	(arcExtMap_insn): New function.
	240	(arcExtMap_genOpcode): Likewise.
	241	* arc-ext.c (ExtInstruction): Remove.
	242	(create_map): Zero initialize instruction fields.
	243	(arcExtMap_instName): Remove.
	244	(arcExtMap_insn): New function.
	245	(dump_ARC_extmap): More info while debuging.
	246	(arcExtMap_genOpcode): New function.
	247	* arc-dis.c (find_format): New function.
	248	(print_insn_arc): Use find_format.
	249	(arc_get_disassembler): Enable dump_ARC_extmap only when
	250	debugging.
	251
92708cec MR	252	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	253
	254	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	255	instruction bits out.
	256
a42a4f84 AB	257	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	258
	259	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	260	* arc-opc.c (arc_flag_operands): Add new flags.
	261	(arc_flag_classes): Add new classes.
	262
1328504b AB	263	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	264
	265	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	266
820f03ff AB	267	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	268
	269	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	270	encode1, rflt, crc16, and crc32 instructions.
	271	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	272	(arc_flag_classes): Add C_NPS_R.
	273	(insert_nps_bitop_size_2b): New function.
	274	(extract_nps_bitop_size_2b): Likewise.
	275	(insert_nps_bitop_uimm8): Likewise.
	276	(extract_nps_bitop_uimm8): Likewise.
	277	(arc_operands): Add new operand entries.
	278
8ddf6b2a CZ	279	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	280
b99747ae CZ	281	* arc-regs.h: Add a new subclass field. Add double assist
	282	accumulator register values.
	283	* arc-tbl.h: Use DPA subclass to mark the double assist
	284	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	285	* arc-opc.c (RSP): Define instead of SP.
	286	(arc_aux_regs): Add the subclass field.
8ddf6b2a	287
589a7d88 JW	288	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	289
	290	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	291
0a191de9	292	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	293
	294	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	295	NPS_R_SRC1.
	296
0a106562 AB	297	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	298
	299	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	300	issues. No functional changes.
	301
bd05ac5f CZ	302	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	303
b99747ae CZ	304	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	305	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	306	(RTT): Remove duplicate.
	307	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	308	(PCT_CONFIG*): Remove.
	309	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	310
9885948f CZ	311	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	312
b99747ae	313	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	314
f2dd8838 CZ	315	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	316
b99747ae CZ	317	* arc-tbl.h (invld07): Remove.
	318	* arc-ext-tbl.h: New file.
	319	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	320	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	321
0d2f91fe JK	322	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	323
	324	Fix -Wstack-usage warnings.
	325	* aarch64-dis.c (print_operands): Substitute size.
	326	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	327
a6b71f42 JM	328	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	329
	330	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	331	to get a proper diagnostic when an invalid ASR register is used.
	332
9780e045 NC	333	2016-03-22 Nick Clifton <nickc@redhat.com>
	334
	335	* configure: Regenerate.
	336
e23e8ebe AB	337	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	338
	339	* arc-nps400-tbl.h: New file.
	340	* arc-opc.c: Add top level comment.
	341	(insert_nps_3bit_dst): New function.
	342	(extract_nps_3bit_dst): New function.
	343	(insert_nps_3bit_src2): New function.
	344	(extract_nps_3bit_src2): New function.
	345	(insert_nps_bitop_size): New function.
	346	(extract_nps_bitop_size): New function.
	347	(arc_flag_operands): Add nps400 entries.
	348	(arc_flag_classes): Add nps400 entries.
	349	(arc_operands): Add nps400 entries.
	350	(arc_opcodes): Add nps400 include.
	351
1ae8ab47 AB	352	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	353
	354	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	355	the new class enum values.
	356
8699fc3e AB	357	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	358
	359	* arc-dis.c (print_insn_arc): Handle nps400.
	360
24740d83 AB	361	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	362
	363	* arc-opc.c (BASE): Delete.
	364
8678914f NC	365	2016-03-18 Nick Clifton <nickc@redhat.com>
	366
	367	PR target/19721
	368	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	369	of MOV insn that aliases an ORR insn.
	370
cc933301 JW	371	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	372
	373	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	374
f86f5863 TS	375	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	376
	377	* mcore-opc.h: Add const qualifiers.
	378	* microblaze-opc.h (struct op_code_struct): Likewise.
	379	* sh-opc.h: Likewise.
	380	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	381	(tic4x_print_op): Likewise.
	382
62de1c63 AM	383	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	384
d11698cd	385	* or1k-desc.h: Regenerate.
62de1c63	386	* fr30-ibld.c: Regenerate.
c697cf0b	387	* rl78-decode.c: Regenerate.
62de1c63	388
020efce5 NC	389	2016-03-01 Nick Clifton <nickc@redhat.com>
	390
	391	PR target/19747
	392	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	393
b0c11777 RL	394	2016-02-24 Renlin Li <renlin.li@arm.com>
	395
	396	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	397	(print_insn_coprocessor): Support fp16 instructions.
	398
3e309328 RL	399	2016-02-24 Renlin Li <renlin.li@arm.com>
	400
	401	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	402	vminnm, vrint(mpna).
	403
8afc7bea RL	404	2016-02-24 Renlin Li <renlin.li@arm.com>
	405
	406	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	407	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	408
4fd7268a L	409	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	410
	411	* i386-dis.c (print_insn): Parenthesize expression to prevent
	412	truncated addresses.
	413	(OP_J): Likewise.
	414
4670103e CZ	415	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	416	Janek van Oirschot <jvanoirs@synopsys.com>
	417
b99747ae CZ	418	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	419	variable.
4670103e	420
c1d9289f NC	421	2016-02-04 Nick Clifton <nickc@redhat.com>
	422
	423	PR target/19561
	424	* msp430-dis.c (print_insn_msp430): Add a special case for
	425	decoding an RRC instruction with the ZC bit set in the extension
	426	word.
	427
a143b004 AB	428	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	429
	430	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	431	* epiphany-ibld.c: Regenerate.
	432	* fr30-ibld.c: Regenerate.
	433	* frv-ibld.c: Regenerate.
	434	* ip2k-ibld.c: Regenerate.
	435	* iq2000-ibld.c: Regenerate.
	436	* lm32-ibld.c: Regenerate.
	437	* m32c-ibld.c: Regenerate.
	438	* m32r-ibld.c: Regenerate.
	439	* mep-ibld.c: Regenerate.
	440	* mt-ibld.c: Regenerate.
	441	* or1k-ibld.c: Regenerate.
	442	* xc16x-ibld.c: Regenerate.
	443	* xstormy16-ibld.c: Regenerate.
	444
b89807c6 AB	445	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	446
	447	* epiphany-dis.c: Regenerated from latest cpu files.
	448
d8c823c8 MM	449	2016-02-01 Michael McConville <mmcco@mykolab.com>
	450
	451	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	452	test bit.
	453
5bc5ae88 RL	454	2016-01-25 Renlin Li <renlin.li@arm.com>
	455
	456	* arm-dis.c (mapping_symbol_for_insn): New function.
	457	(find_ifthen_state): Call mapping_symbol_for_insn().
	458
0bff6e2d MW	459	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	460
	461	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	462	of MSR UAO immediate operand.
	463
100b4f2e MR	464	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	465
	466	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	467	instruction support.
	468
5c14705f AM	469	2016-01-17 Alan Modra <amodra@gmail.com>
	470
	471	* configure: Regenerate.
	472
4d82fe66 NC	473	2016-01-14 Nick Clifton <nickc@redhat.com>
	474
	475	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	476	instructions that can support stack pointer operations.
	477	* rl78-decode.c: Regenerate.
	478	* rl78-dis.c: Fix display of stack pointer in MOVW based
	479	instructions.
	480
651657fa MW	481	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	482
	483	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	484	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	485	erxtatus_el1 and erxaddr_el1.
	486
105bde57 MW	487	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	488
	489	* arm-dis.c (arm_opcodes): Add "esb".
	490	(thumb_opcodes): Likewise.
	491
afa8d405 PB	492	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	493
	494	* ppc-opc.c <xscmpnedp>: Delete.
	495	<xvcmpnedp>: Likewise.
	496	<xvcmpnedp.>: Likewise.
	497	<xvcmpnesp>: Likewise.
	498	<xvcmpnesp.>: Likewise.
	499
83c3256e AS	500	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	501
	502	PR gas/13050
	503	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	504	addition to ISA_A.
	505
6f2750fe AM	506	2016-01-01 Alan Modra <amodra@gmail.com>
	507
	508	Update year range in copyright notice of all files.
	509
3499769a AM	510	For older changes see ChangeLog-2015
	511	\f
	512	Copyright (C) 2016 Free Software Foundation, Inc.
	513
	514	Copying and distribution of this file, with or without modification,
	515	are permitted in any medium without royalty provided the copyright
	516	notice and this notice are preserved.
	517
	518	Local Variables:
	519	mode: change-log
	520	left-margin: 8
	521	fill-column: 74
	522	version-control: never
	523	End: