Move NOP from 0x00 to 0x0f.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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f3d55a94
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12010-02-03 Anthony Green <green@moxielogic.com>
2
3 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
4 0x0f, and make 0x00 an illegal instruction.
5
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62010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
7
8 * opcodes/arm-dis.c (struct arm_private_data): New.
9 (print_insn_coprocessor, print_insn_arm): Update to use struct
10 arm_private_data.
11 (is_mapping_symbol, get_map_sym_type): New functions.
12 (get_sym_code_type): Check the symbol's section. Do not check
13 mapping symbols.
14 (print_insn): Default to disassembling ARM mode code. Check
15 for mapping symbols separately from other symbols. Use
16 struct arm_private_data.
17
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182010-01-28 H.J. Lu <hongjiu.lu@intel.com>
19
20 * i386-dis.c (EXVexWdqScalar): New.
21 (vex_scalar_w_dq_mode): Likewise.
22 (prefix_table): Update entries for PREFIX_VEX_3899,
23 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
24 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
25 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
26 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
27 (intel_operand_size): Handle vex_scalar_w_dq_mode.
28 (OP_EX): Likewise.
29
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302010-01-27 H.J. Lu <hongjiu.lu@intel.com>
31
32 * i386-dis.c (XMScalar): New.
33 (EXdScalar): Likewise.
34 (EXqScalar): Likewise.
35 (EXqScalarS): Likewise.
36 (VexScalar): Likewise.
37 (EXdVexScalarS): Likewise.
38 (EXqVexScalarS): Likewise.
39 (XMVexScalar): Likewise.
40 (scalar_mode): Likewise.
41 (d_scalar_mode): Likewise.
42 (d_scalar_swap_mode): Likewise.
43 (q_scalar_mode): Likewise.
44 (q_scalar_swap_mode): Likewise.
45 (vex_scalar_mode): Likewise.
46 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
47 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
48 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
49 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
50 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
51 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
52 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
53 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
54 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
55 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
56 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
57 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
58 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
59 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
60 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
61 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
62 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
63 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
64 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
65 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
66 q_scalar_mode, q_scalar_swap_mode.
67 (OP_XMM): Handle scalar_mode.
68 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
69 and q_scalar_swap_mode.
70 (OP_VEX): Handle vex_scalar_mode.
71
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722010-01-24 H.J. Lu <hongjiu.lu@intel.com>
73
74 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
75
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762010-01-24 H.J. Lu <hongjiu.lu@intel.com>
77
78 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
79
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802010-01-24 H.J. Lu <hongjiu.lu@intel.com>
81
82 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
83
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842010-01-24 H.J. Lu <hongjiu.lu@intel.com>
85
86 * i386-dis.c (Bad_Opcode): New.
87 (bad_opcode): Likewise.
88 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
89 (dis386_twobyte): Likewise.
90 (reg_table): Likewise.
91 (prefix_table): Likewise.
92 (x86_64_table): Likewise.
93 (vex_len_table): Likewise.
94 (vex_w_table): Likewise.
95 (mod_table): Likewise.
96 (rm_table): Likewise.
97 (float_reg): Likewise.
98 (reg_table): Remove trailing "(bad)" entries.
99 (prefix_table): Likewise.
100 (x86_64_table): Likewise.
101 (vex_len_table): Likewise.
102 (vex_w_table): Likewise.
103 (mod_table): Likewise.
104 (rm_table): Likewise.
105 (get_valid_dis386): Handle bytemode 0.
106
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1072010-01-23 H.J. Lu <hongjiu.lu@intel.com>
108
109 * i386-opc.h (VEXScalar): New.
110
111 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
112 instructions.
113 * i386-tbl.h: Regenerated.
114
706e8205 1152010-01-21 H.J. Lu <hongjiu.lu@intel.com>
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116
117 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
118
119 * i386-opc.tbl: Add xsave64 and xrstor64.
120 * i386-tbl.h: Regenerated.
121
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1222010-01-20 Nick Clifton <nickc@redhat.com>
123
124 PR 11170
125 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
126 based post-indexed addressing.
127
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1282010-01-15 Sebastian Pop <sebastian.pop@amd.com>
129
130 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
131 * i386-tbl.h: Regenerated.
132
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1332010-01-14 H.J. Lu <hongjiu.lu@intel.com>
134
135 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
136 comments.
137
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1382010-01-14 H.J. Lu <hongjiu.lu@intel.com>
139
140 * i386-dis.c (names_mm): New.
141 (intel_names_mm): Likewise.
142 (att_names_mm): Likewise.
143 (names_xmm): Likewise.
144 (intel_names_xmm): Likewise.
145 (att_names_xmm): Likewise.
146 (names_ymm): Likewise.
147 (intel_names_ymm): Likewise.
148 (att_names_ymm): Likewise.
149 (print_insn): Set names_mm, names_xmm and names_ymm.
150 (OP_MMX): Use names_mm, names_xmm and names_ymm.
151 (OP_XMM): Likewise.
152 (OP_EM): Likewise.
153 (OP_EMC): Likewise.
154 (OP_MXC): Likewise.
155 (OP_EX): Likewise.
156 (XMM_Fixup): Likewise.
157 (OP_VEX): Likewise.
158 (OP_EX_VexReg): Likewise.
159 (OP_Vex_2src): Likewise.
160 (OP_Vex_2src_1): Likewise.
161 (OP_Vex_2src_2): Likewise.
162 (OP_REG_VexI4): Likewise.
163
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1642010-01-13 H.J. Lu <hongjiu.lu@intel.com>
165
166 * i386-dis.c (print_insn): Update comments.
167
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1682010-01-12 H.J. Lu <hongjiu.lu@intel.com>
169
170 * i386-dis.c (rex_original): Removed.
171 (ckprefix): Remove rex_original.
172 (print_insn): Update comments.
173
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1742010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
175
176 * Makefile.in: Regenerate.
177 * configure: Regenerate.
178
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1792010-01-07 Doug Evans <dje@sebabeach.org>
180
181 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
182 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
183 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
184 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
185 * xstormy16-ibld.c: Regenerate.
186
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1872010-01-06 Quentin Neill <quentin.neill@amd.com>
188
189 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
190 * i386-init.h: Regenerated.
191
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1922010-01-06 Daniel Gutson <dgutson@codesourcery.com>
193
194 * arm-dis.c (print_insn): Fixed search for next symbol and data
195 dumping condition, and the initial mapping symbol state.
196
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1972010-01-05 Doug Evans <dje@sebabeach.org>
198
199 * cgen-ibld.in: #include "cgen/basic-modes.h".
200 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
201 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
202 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
203 * xstormy16-ibld.c: Regenerate.
204
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2052010-01-04 Nick Clifton <nickc@redhat.com>
206
207 PR 11123
208 * arm-dis.c (print_insn_coprocessor): Initialise value.
209
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2102010-01-04 Edmar Wienskoski <edmar@freescale.com>
211
212 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
213
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2142010-01-02 Doug Evans <dje@sebabeach.org>
215
216 * cgen-asm.in: Update copyright year.
217 * cgen-dis.in: Update copyright year.
218 * cgen-ibld.in: Update copyright year.
219 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
220 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
221 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
222 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
223 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
224 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
225 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
226 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
227 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
228 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
229 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
230 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
231 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
232 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
233 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
234 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
235 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
236 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
237 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
238 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
239 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f 240
43ecc30f 241For older changes see ChangeLog-2009
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