This patch adds support to objdump for disassembly of NFP (Netronome Flow Processor...
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
fe944acf
FT
12018-04-30 Francois H. Theron <francois.theron@netronome.com>
2
3 Makefile.am: Added nfp-dis.c.
4 configure.ac: Added bfd_nfp_arch.
5 disassemble.h: Added print_insn_nfp prototype.
6 disassemble.c: Added ARCH_nfp and call to print_insn_nfp
7 nfp-dis.c: New, for NFP support.
8 po/POTFILES.in: Added nfp-dis.c to the list.
9 Makefile.in: Regenerate.
10 configure: Regenerate.
11
e2195274
JB
122018-04-26 Jan Beulich <jbeulich@suse.com>
13
14 * i386-opc.tbl: Fold various non-memory operand AVX512VL
15 templates into their base ones.
16 * i386-tlb.h: Re-generate.
17
59ef5df4
JB
182018-04-26 Jan Beulich <jbeulich@suse.com>
19
20 * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
21 CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
22 CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
23 CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
24 * i386-init.h: Re-generate.
25
6e041cf4
JB
262018-04-26 Jan Beulich <jbeulich@suse.com>
27
28 * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
29 CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
30 CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
31 Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
32 comment.
33 (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
34 and CpuRegMask.
35 * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
36 CpuRegMask: Delete.
37 (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
38 cpuregzmm, and cpuregmask.
39 * i386-init.h: Re-generate.
40 * i386-tbl.h: Re-generate.
41
0e0eea78
JB
422018-04-26 Jan Beulich <jbeulich@suse.com>
43
44 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
45 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
46 * i386-init.h: Re-generate.
47
2f1bada2
JB
482018-04-26 Jan Beulich <jbeulich@suse.com>
49
50 * i386-gen.c (VexImmExt): Delete.
51 * i386-opc.h (VexImmExt, veximmext): Delete.
52 * i386-opc.tbl: Drop all VexImmExt uses.
53 * i386-tlb.h: Re-generate.
54
bacd1457
JB
552018-04-25 Jan Beulich <jbeulich@suse.com>
56
57 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
58 register-only forms.
59 * i386-tlb.h: Re-generate.
60
10bba94b
TC
612018-04-25 Tamar Christina <tamar.christina@arm.com>
62
63 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
64
c48935d7
IT
652018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
66
67 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
68 PREFIX_0F1C.
69 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
70 (cpu_flags): Add CpuCLDEMOTE.
71 * i386-init.h: Regenerate.
72 * i386-opc.h (enum): Add CpuCLDEMOTE,
73 (i386_cpu_flags): Add cpucldemote.
74 * i386-opc.tbl: Add cldemote.
75 * i386-tbl.h: Regenerate.
76
211dc24b
AM
772018-04-16 Alan Modra <amodra@gmail.com>
78
79 * Makefile.am: Remove sh5 and sh64 support.
80 * configure.ac: Likewise.
81 * disassemble.c: Likewise.
82 * disassemble.h: Likewise.
83 * sh-dis.c: Likewise.
84 * sh64-dis.c: Delete.
85 * sh64-opc.c: Delete.
86 * sh64-opc.h: Delete.
87 * Makefile.in: Regenerate.
88 * configure: Regenerate.
89 * po/POTFILES.in: Regenerate.
90
a9a4b302
AM
912018-04-16 Alan Modra <amodra@gmail.com>
92
93 * Makefile.am: Remove w65 support.
94 * configure.ac: Likewise.
95 * disassemble.c: Likewise.
96 * disassemble.h: Likewise.
97 * w65-dis.c: Delete.
98 * w65-opc.h: Delete.
99 * Makefile.in: Regenerate.
100 * configure: Regenerate.
101 * po/POTFILES.in: Regenerate.
102
04cb01fd
AM
1032018-04-16 Alan Modra <amodra@gmail.com>
104
105 * configure.ac: Remove we32k support.
106 * configure: Regenerate.
107
c2bf1eec
AM
1082018-04-16 Alan Modra <amodra@gmail.com>
109
110 * Makefile.am: Remove m88k support.
111 * configure.ac: Likewise.
112 * disassemble.c: Likewise.
113 * disassemble.h: Likewise.
114 * m88k-dis.c: Delete.
115 * Makefile.in: Regenerate.
116 * configure: Regenerate.
117 * po/POTFILES.in: Regenerate.
118
6793974d
AM
1192018-04-16 Alan Modra <amodra@gmail.com>
120
121 * Makefile.am: Remove i370 support.
122 * configure.ac: Likewise.
123 * disassemble.c: Likewise.
124 * disassemble.h: Likewise.
125 * i370-dis.c: Delete.
126 * i370-opc.c: Delete.
127 * Makefile.in: Regenerate.
128 * configure: Regenerate.
129 * po/POTFILES.in: Regenerate.
130
e82aa794
AM
1312018-04-16 Alan Modra <amodra@gmail.com>
132
133 * Makefile.am: Remove h8500 support.
134 * configure.ac: Likewise.
135 * disassemble.c: Likewise.
136 * disassemble.h: Likewise.
137 * h8500-dis.c: Delete.
138 * h8500-opc.h: Delete.
139 * Makefile.in: Regenerate.
140 * configure: Regenerate.
141 * po/POTFILES.in: Regenerate.
142
fceadf09
AM
1432018-04-16 Alan Modra <amodra@gmail.com>
144
145 * configure.ac: Remove tahoe support.
146 * configure: Regenerate.
147
ae1d3843
L
1482018-04-15 H.J. Lu <hongjiu.lu@intel.com>
149
150 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
151 umwait.
152 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
153 64-bit mode.
154 * i386-tbl.h: Regenerated.
155
de89d0a3
IT
1562018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
157
158 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
159 PREFIX_MOD_1_0FAE_REG_6.
160 (va_mode): New.
161 (OP_E_register): Use va_mode.
162 * i386-dis-evex.h (prefix_table):
163 New instructions (see prefixes above).
164 * i386-gen.c (cpu_flag_init): Add WAITPKG.
165 (cpu_flags): Likewise.
166 * i386-opc.h (enum): Likewise.
167 (i386_cpu_flags): Likewise.
168 * i386-opc.tbl: Add umonitor, umwait, tpause.
169 * i386-init.h: Regenerate.
170 * i386-tbl.h: Likewise.
171
a8eb42a8
AM
1722018-04-11 Alan Modra <amodra@gmail.com>
173
174 * opcodes/i860-dis.c: Delete.
175 * opcodes/i960-dis.c: Delete.
176 * Makefile.am: Remove i860 and i960 support.
177 * configure.ac: Likewise.
178 * disassemble.c: Likewise.
179 * disassemble.h: Likewise.
180 * Makefile.in: Regenerate.
181 * configure: Regenerate.
182 * po/POTFILES.in: Regenerate.
183
caf0678c
L
1842018-04-04 H.J. Lu <hongjiu.lu@intel.com>
185
186 PR binutils/23025
187 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
188 to 0.
189 (print_insn): Clear vex instead of vex.evex.
190
4fb0d2b9
NC
1912018-04-04 Nick Clifton <nickc@redhat.com>
192
193 * po/es.po: Updated Spanish translation.
194
c39e5b26
JB
1952018-03-28 Jan Beulich <jbeulich@suse.com>
196
197 * i386-gen.c (opcode_modifiers): Delete VecESize.
198 * i386-opc.h (VecESize): Delete.
199 (struct i386_opcode_modifier): Delete vecesize.
200 * i386-opc.tbl: Drop VecESize.
201 * i386-tlb.h: Re-generate.
202
8e6e0792
JB
2032018-03-28 Jan Beulich <jbeulich@suse.com>
204
205 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
206 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
207 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
208 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
209 * i386-tlb.h: Re-generate.
210
9f123b91
JB
2112018-03-28 Jan Beulich <jbeulich@suse.com>
212
213 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
214 Fold AVX512 forms
215 * i386-tlb.h: Re-generate.
216
9646c87b
JB
2172018-03-28 Jan Beulich <jbeulich@suse.com>
218
219 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
220 (vex_len_table): Drop Y for vcvt*2si.
221 (putop): Replace plain 'Y' handling by abort().
222
c8d59609
NC
2232018-03-28 Nick Clifton <nickc@redhat.com>
224
225 PR 22988
226 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
227 instructions with only a base address register.
228 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
229 handle AARHC64_OPND_SVE_ADDR_R.
230 (aarch64_print_operand): Likewise.
231 * aarch64-asm-2.c: Regenerate.
232 * aarch64_dis-2.c: Regenerate.
233 * aarch64-opc-2.c: Regenerate.
234
b8c169f3
JB
2352018-03-22 Jan Beulich <jbeulich@suse.com>
236
237 * i386-opc.tbl: Drop VecESize from register only insn forms and
238 memory forms not allowing broadcast.
239 * i386-tlb.h: Re-generate.
240
96bc132a
JB
2412018-03-22 Jan Beulich <jbeulich@suse.com>
242
243 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
244 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
245 sha256*): Drop Disp<N>.
246
9f79e886
JB
2472018-03-22 Jan Beulich <jbeulich@suse.com>
248
249 * i386-dis.c (EbndS, bnd_swap_mode): New.
250 (prefix_table): Use EbndS.
251 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
252 * i386-opc.tbl (bndmov): Move misplaced Load.
253 * i386-tlb.h: Re-generate.
254
d6793fa1
JB
2552018-03-22 Jan Beulich <jbeulich@suse.com>
256
257 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
258 templates allowing memory operands and folded ones for register
259 only flavors.
260 * i386-tlb.h: Re-generate.
261
f7768225
JB
2622018-03-22 Jan Beulich <jbeulich@suse.com>
263
264 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
265 256-bit templates. Drop redundant leftover Disp<N>.
266 * i386-tlb.h: Re-generate.
267
0e35537d
JW
2682018-03-14 Kito Cheng <kito.cheng@gmail.com>
269
270 * riscv-opc.c (riscv_insn_types): New.
271
b4a3689a
NC
2722018-03-13 Nick Clifton <nickc@redhat.com>
273
274 * po/pt_BR.po: Updated Brazilian Portuguese translation.
275
d3d50934
L
2762018-03-08 H.J. Lu <hongjiu.lu@intel.com>
277
278 * i386-opc.tbl: Add Optimize to clr.
279 * i386-tbl.h: Regenerated.
280
bd5dea88
L
2812018-03-08 H.J. Lu <hongjiu.lu@intel.com>
282
283 * i386-gen.c (opcode_modifiers): Remove OldGcc.
284 * i386-opc.h (OldGcc): Removed.
285 (i386_opcode_modifier): Remove oldgcc.
286 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
287 instructions for old (<= 2.8.1) versions of gcc.
288 * i386-tbl.h: Regenerated.
289
e771e7c9
JB
2902018-03-08 Jan Beulich <jbeulich@suse.com>
291
292 * i386-opc.h (EVEXDYN): New.
293 * i386-opc.tbl: Fold various AVX512VL templates.
294 * i386-tlb.h: Re-generate.
295
ed438a93
JB
2962018-03-08 Jan Beulich <jbeulich@suse.com>
297
298 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
299 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
300 vpexpandd, vpexpandq): Fold AFX512VF templates.
301 * i386-tlb.h: Re-generate.
302
454172a9
JB
3032018-03-08 Jan Beulich <jbeulich@suse.com>
304
305 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
306 Fold 128- and 256-bit VEX-encoded templates.
307 * i386-tlb.h: Re-generate.
308
36824150
JB
3092018-03-08 Jan Beulich <jbeulich@suse.com>
310
311 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
312 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
313 vpexpandd, vpexpandq): Fold AVX512F templates.
314 * i386-tlb.h: Re-generate.
315
e7f5c0a9
JB
3162018-03-08 Jan Beulich <jbeulich@suse.com>
317
318 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
319 64-bit templates. Drop Disp<N>.
320 * i386-tlb.h: Re-generate.
321
25a4277f
JB
3222018-03-08 Jan Beulich <jbeulich@suse.com>
323
324 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
325 and 256-bit templates.
326 * i386-tlb.h: Re-generate.
327
d2224064
JB
3282018-03-08 Jan Beulich <jbeulich@suse.com>
329
330 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
331 * i386-tlb.h: Re-generate.
332
1b193f0b
JB
3332018-03-08 Jan Beulich <jbeulich@suse.com>
334
335 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
336 Drop NoAVX.
337 * i386-tlb.h: Re-generate.
338
f2f6a710
JB
3392018-03-08 Jan Beulich <jbeulich@suse.com>
340
341 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
342 * i386-tlb.h: Re-generate.
343
38e314eb
JB
3442018-03-08 Jan Beulich <jbeulich@suse.com>
345
346 * i386-gen.c (opcode_modifiers): Delete FloatD.
347 * i386-opc.h (FloatD): Delete.
348 (struct i386_opcode_modifier): Delete floatd.
349 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
350 FloatD by D.
351 * i386-tlb.h: Re-generate.
352
d53e6b98
JB
3532018-03-08 Jan Beulich <jbeulich@suse.com>
354
355 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
356
2907c2f5
JB
3572018-03-08 Jan Beulich <jbeulich@suse.com>
358
359 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
360 * i386-tlb.h: Re-generate.
361
73053c1f
JB
3622018-03-08 Jan Beulich <jbeulich@suse.com>
363
364 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
365 forms.
366 * i386-tlb.h: Re-generate.
367
52fe4420
AM
3682018-03-07 Alan Modra <amodra@gmail.com>
369
370 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
371 bfd_arch_rs6000.
372 * disassemble.h (print_insn_rs6000): Delete.
373 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
374 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
375 (print_insn_rs6000): Delete.
376
a6743a54
AM
3772018-03-03 Alan Modra <amodra@gmail.com>
378
379 * sysdep.h (opcodes_error_handler): Define.
380 (_bfd_error_handler): Declare.
381 * Makefile.am: Remove stray #.
382 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
383 EDIT" comment.
384 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
385 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
386 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
387 opcodes_error_handler to print errors. Standardize error messages.
388 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
389 and include opintl.h.
390 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
391 * i386-gen.c: Standardize error messages.
392 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
393 * Makefile.in: Regenerate.
394 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
395 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
396 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
397 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
398 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
399 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
400 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
401 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
402 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
403 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
404 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
405 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
406 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
407
8305403a
L
4082018-03-01 H.J. Lu <hongjiu.lu@intel.com>
409
410 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
411 vpsub[bwdq] instructions.
412 * i386-tbl.h: Regenerated.
413
e184813f
AM
4142018-03-01 Alan Modra <amodra@gmail.com>
415
416 * configure.ac (ALL_LINGUAS): Sort.
417 * configure: Regenerate.
418
5b616bef
TP
4192018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
420
421 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
422 macro by assignements.
423
b6f8c7c4
L
4242018-02-27 H.J. Lu <hongjiu.lu@intel.com>
425
426 PR gas/22871
427 * i386-gen.c (opcode_modifiers): Add Optimize.
428 * i386-opc.h (Optimize): New enum.
429 (i386_opcode_modifier): Add optimize.
430 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
431 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
432 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
433 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
434 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
435 vpxord and vpxorq.
436 * i386-tbl.h: Regenerated.
437
e95b887f
AM
4382018-02-26 Alan Modra <amodra@gmail.com>
439
440 * crx-dis.c (getregliststring): Allocate a large enough buffer
441 to silence false positive gcc8 warning.
442
0bccfb29
JW
4432018-02-22 Shea Levy <shea@shealevy.com>
444
445 * disassemble.c (ARCH_riscv): Define if ARCH_all.
446
6b6b6807
L
4472018-02-22 H.J. Lu <hongjiu.lu@intel.com>
448
449 * i386-opc.tbl: Add {rex},
450 * i386-tbl.h: Regenerated.
451
75f31665
MR
4522018-02-20 Maciej W. Rozycki <macro@mips.com>
453
454 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
455 (mips16_opcodes): Replace `M' with `m' for "restore".
456
e207bc53
TP
4572018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
458
459 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
460
87993319
MR
4612018-02-13 Maciej W. Rozycki <macro@mips.com>
462
463 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
464 variable to `function_index'.
465
68d20676
NC
4662018-02-13 Nick Clifton <nickc@redhat.com>
467
468 PR 22823
469 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
470 about truncation of printing.
471
d2159fdc
HW
4722018-02-12 Henry Wong <henry@stuffedcow.net>
473
474 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
475
f174ef9f
NC
4762018-02-05 Nick Clifton <nickc@redhat.com>
477
478 * po/pt_BR.po: Updated Brazilian Portuguese translation.
479
be3a8dca
IT
4802018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
481
482 * i386-dis.c (enum): Add pconfig.
483 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
484 (cpu_flags): Add CpuPCONFIG.
485 * i386-opc.h (enum): Add CpuPCONFIG.
486 (i386_cpu_flags): Add cpupconfig.
487 * i386-opc.tbl: Add PCONFIG instruction.
488 * i386-init.h: Regenerate.
489 * i386-tbl.h: Likewise.
490
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IT
4912018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
492
493 * i386-dis.c (enum): Add PREFIX_0F09.
494 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
495 (cpu_flags): Add CpuWBNOINVD.
496 * i386-opc.h (enum): Add CpuWBNOINVD.
497 (i386_cpu_flags): Add cpuwbnoinvd.
498 * i386-opc.tbl: Add WBNOINVD instruction.
499 * i386-init.h: Regenerate.
500 * i386-tbl.h: Likewise.
501
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5022018-01-17 Jim Wilson <jimw@sifive.com>
503
504 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
505
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IT
5062018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
507
508 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
509 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
510 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
511 (cpu_flags): Add CpuIBT, CpuSHSTK.
512 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
513 (i386_cpu_flags): Add cpuibt, cpushstk.
514 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
515 * i386-init.h: Regenerate.
516 * i386-tbl.h: Likewise.
517
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5182018-01-16 Nick Clifton <nickc@redhat.com>
519
520 * po/pt_BR.po: Updated Brazilian Portugese translation.
521 * po/de.po: Updated German translation.
522
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5232018-01-15 Jim Wilson <jimw@sifive.com>
524
525 * riscv-opc.c (match_c_nop): New.
526 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
527
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5282018-01-15 Nick Clifton <nickc@redhat.com>
529
530 * po/uk.po: Updated Ukranian translation.
531
3957a496
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5322018-01-13 Nick Clifton <nickc@redhat.com>
533
534 * po/opcodes.pot: Regenerated.
535
769c7ea5
NC
5362018-01-13 Nick Clifton <nickc@redhat.com>
537
538 * configure: Regenerate.
539
faf766e3
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5402018-01-13 Nick Clifton <nickc@redhat.com>
541
542 2.30 branch created.
543
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IT
5442018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
545
546 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
547 * i386-tbl.h: Regenerate.
548
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5492018-01-10 Jan Beulich <jbeulich@suse.com>
550
551 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
552 * i386-tbl.h: Re-generate.
553
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JB
5542018-01-10 Jan Beulich <jbeulich@suse.com>
555
556 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
557 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
558 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
559 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
560 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
561 Disp8MemShift of AVX512VL forms.
562 * i386-tbl.h: Re-generate.
563
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5642018-01-09 Jim Wilson <jimw@sifive.com>
565
566 * riscv-dis.c (maybe_print_address): If base_reg is zero,
567 then the hi_addr value is zero.
568
91d8b670
JG
5692018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
570
571 * arm-dis.c (arm_opcodes): Add csdb.
572 (thumb32_opcodes): Add csdb.
573
be2e7d95
JG
5742018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
575
576 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
577 * aarch64-asm-2.c: Regenerate.
578 * aarch64-dis-2.c: Regenerate.
579 * aarch64-opc-2.c: Regenerate.
580
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L
5812018-01-08 H.J. Lu <hongjiu.lu@intel.com>
582
583 PR gas/22681
584 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
585 Remove AVX512 vmovd with 64-bit operands.
586 * i386-tbl.h: Regenerated.
587
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JW
5882018-01-05 Jim Wilson <jimw@sifive.com>
589
590 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
591 jalr.
592
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AM
5932018-01-03 Alan Modra <amodra@gmail.com>
594
595 Update year range in copyright notice of all files.
596
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JB
5972018-01-02 Jan Beulich <jbeulich@suse.com>
598
599 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
600 and OPERAND_TYPE_REGZMM entries.
601
1e563868 602For older changes see ChangeLog-2017
3499769a 603\f
1e563868 604Copyright (C) 2018 Free Software Foundation, Inc.
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605
606Copying and distribution of this file, with or without modification,
607are permitted in any medium without royalty provided the copyright
608notice and this notice are preserved.
609
610Local Variables:
611mode: change-log
612left-margin: 8
613fill-column: 74
614version-control: never
615End:
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